/* NOTE: we treat the register stack registers r32-r127 as
pseudo-registers because they may not be accessible via the ptrace
/* NOTE: we treat the register stack registers r32-r127 as
pseudo-registers because they may not be accessible via the ptrace
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
Otherwise, we could possibly store into the shadow parts of the adjacent
placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
breakpoint instruction bits region. */
Otherwise, we could possibly store into the shadow parts of the adjacent
placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
breakpoint instruction bits region. */
/* SHADOW_SLOTNUM saves the original slot number as expected by the caller
for addressing the SHADOW_CONTENTS placement. */
/* SHADOW_SLOTNUM saves the original slot number as expected by the caller
for addressing the SHADOW_CONTENTS placement. */
restoration mechanism kicks in and we would possibly remove parts of the
adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
the real breakpoint instruction bits region. */
restoration mechanism kicks in and we would possibly remove parts of the
adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
the real breakpoint instruction bits region. */
reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
location cannot induce the internal error as they are optimized into
a single instance by update_global_location_list. */
reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
location cannot induce the internal error as they are optimized into
a single instance by update_global_location_list. */
paddress (gdbarch, bp_tgt->placed_address));
replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
paddress (gdbarch, bp_tgt->placed_address));
replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
mechanism kicks in and we would possibly remove parts of the adjacent
placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
breakpoint instruction bits region. */
mechanism kicks in and we would possibly remove parts of the adjacent
placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
breakpoint instruction bits region. */
/* SHADOW_SLOTNUM saves the original slot number as expected by the caller
for addressing the SHADOW_CONTENTS placement. */
/* SHADOW_SLOTNUM saves the original slot number as expected by the caller
for addressing the SHADOW_CONTENTS placement. */
warning (_("Cannot remove breakpoint at address %s from non-existing "
"X-type slot, memory has changed underneath"),
paddress (gdbarch, bp_tgt->placed_address));
warning (_("Cannot remove breakpoint at address %s from non-existing "
"X-type slot, memory has changed underneath"),
paddress (gdbarch, bp_tgt->placed_address));
instr_breakpoint = slotN_contents (bundle_mem, slotnum);
if (instr_breakpoint != IA64_BREAKPOINT)
instr_breakpoint = slotN_contents (bundle_mem, slotnum);
if (instr_breakpoint != IA64_BREAKPOINT)
warning (_("Cannot remove breakpoint at address %s, "
"no break instruction at such address."),
paddress (gdbarch, bp_tgt->placed_address));
warning (_("Cannot remove breakpoint at address %s, "
"no break instruction at such address."),
paddress (gdbarch, bp_tgt->placed_address));
replace_slotN_contents (bundle_mem, instr_saved, slotnum);
val = target_write_raw_memory (addr, bundle_mem, BUNDLE_LEN);
replace_slotN_contents (bundle_mem, instr_saved, slotnum);
val = target_write_raw_memory (addr, bundle_mem, BUNDLE_LEN);
/* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
instruction slots ranges are bit-granular (41 bits) we have to provide an
extended range as described for ia64_memory_insert_breakpoint. We also take
/* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
instruction slots ranges are bit-granular (41 bits) we have to provide an
extended range as described for ia64_memory_insert_breakpoint. We also take
/* Enable the automatic memory restoration from breakpoints while
we read our instruction bundle to match bp_loc_is_permanent. */
/* Enable the automatic memory restoration from breakpoints while
we read our instruction bundle to match bp_loc_is_permanent. */
- cleanup = make_show_memory_breakpoints_cleanup (0);
- val = target_read_memory (addr, bundle, BUNDLE_LEN);
- do_cleanups (cleanup);
+ {
+ scoped_restore restore_memory_0
+ = make_scoped_restore_show_memory_breakpoints (0);
+ val = target_read_memory (addr, bundle, BUNDLE_LEN);
+ }
/* The memory might be unreachable. This can happen, for instance,
when the user inserts a breakpoint at an invalid address. */
/* The memory might be unreachable. This can happen, for instance,
when the user inserts a breakpoint at an invalid address. */
- regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
- regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &pc_value);
+ regcache->cooked_read (IA64_PSR_REGNUM, &psr_value);
+ regcache->cooked_read (IA64_IP_REGNUM, &pc_value);
int regnum, gdb_byte *buf)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int regnum, gdb_byte *buf)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
found sequentially in memory starting at $bof. This
isn't always true, but without libunwind, this is the
best we can do. */
found sequentially in memory starting at $bof. This
isn't always true, but without libunwind, this is the
best we can do. */
- status = regcache_cooked_read_unsigned (regcache,
- IA64_BSP_REGNUM, &bsp);
+ status = regcache->cooked_read (IA64_BSP_REGNUM, &bsp);
- status = regcache_cooked_read_unsigned (regcache,
- IA64_CFM_REGNUM, &cfm);
+ status = regcache->cooked_read (IA64_CFM_REGNUM, &cfm);
int nat_bit;
/* If our nat collection address is bigger than bsp, we have to get
the nat collection from rnat. Otherwise, we fetch the nat
collection from the computed address. */
if (nat_addr >= bsp)
int nat_bit;
/* If our nat collection address is bigger than bsp, we have to get
the nat collection from rnat. Otherwise, we fetch the nat
collection from the computed address. */
if (nat_addr >= bsp)
else
nat_collection = read_memory_integer (nat_addr, 8, byte_order);
nat_bit = (gr_addr >> 3) & 0x3f;
else
nat_collection = read_memory_integer (nat_addr, 8, byte_order);
nat_bit = (gr_addr >> 3) & 0x3f;
if ((cfm & 0x7f) > regnum - V32_REGNUM)
{
ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
if ((cfm & 0x7f) > regnum - V32_REGNUM)
{
ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
{
return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
{
return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
int *optimizedp, int *unavailablep)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
int *optimizedp, int *unavailablep)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
/* Convert to TYPE. */
if (!get_frame_register_bytes (frame, regnum, 0,
/* Convert to TYPE. */
if (!get_frame_register_bytes (frame, regnum, 0,
- convert_typed_floating (in, ia64_ext_type (gdbarch), out, valtype);
+ target_float_convert (in, ia64_ext_type (gdbarch), out, valtype);
struct type *valtype, const gdb_byte *in)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
struct type *valtype, const gdb_byte *in)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
- gdb_byte out[MAX_REGISTER_SIZE];
- convert_typed_floating (in, valtype, out, ia64_ext_type (gdbarch));
+ gdb_byte out[IA64_FP_REGISTER_SIZE];
+ target_float_convert (in, valtype, out, ia64_ext_type (gdbarch));
&& it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
{
/* alloc - start of a regular function. */
&& it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
{
/* alloc - start of a regular function. */
- int sor = (int) ((instr & 0x00078000000LL) >> 27);
- int sol = (int) ((instr & 0x00007f00000LL) >> 20);
- int sof = (int) ((instr & 0x000000fe000LL) >> 13);
+ int sol_bits = (int) ((instr & 0x00007f00000LL) >> 20);
+ int sof_bits = (int) ((instr & 0x000000fe000LL) >> 13);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
/* Verify that the current cfm matches what we think is the
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
/* Verify that the current cfm matches what we think is the
addresses of various registers such as the return address.
We will instead treat the frame as frameless. */
if (!this_frame ||
addresses of various registers such as the return address.
We will instead treat the frame as frameless. */
if (!this_frame ||
- {
- struct gdbarch *gdbarch = get_frame_arch (this_frame);
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- get_frame_register (this_frame, sp_regnum, buf);
- saved_sp = extract_unsigned_integer (buf, 8, byte_order);
- }
+ saved_sp = get_frame_register_unsigned (this_frame,
+ sp_regnum);
cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
cfm = extract_unsigned_integer (buf, 8, byte_order);
get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
cfm = extract_unsigned_integer (buf, 8, byte_order);
ia64_sigtramp_frame_prev_register (struct frame_info *this_frame,
void **this_cache, int regnum)
{
ia64_sigtramp_frame_prev_register (struct frame_info *this_frame,
void **this_cache, int regnum)
{
struct ia64_frame_cache *cache =
ia64_sigtramp_frame_cache (this_frame, this_cache);
struct ia64_frame_cache *cache =
ia64_sigtramp_frame_cache (this_frame, this_cache);
- read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
- pc = extract_unsigned_integer (buf, 8, byte_order);
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ pc = read_memory_unsigned_integer (addr, 8, byte_order);
- unw_word_t bsp, sof, sol, cfm, psr, ip;
- struct frame_info *this_frame = arg;
+ unw_word_t bsp, sof, cfm, psr, ip;
+ struct frame_info *this_frame = (struct frame_info *) arg;
case UNW_REG_IP:
/* Libunwind expects to see the pc value which means the slot number
from the psr must be merged with the ip word address. */
case UNW_REG_IP:
/* Libunwind expects to see the pc value which means the slot number
from the psr must be merged with the ip word address. */
- get_frame_register (this_frame, IA64_IP_REGNUM, buf);
- ip = extract_unsigned_integer (buf, 8, byte_order);
- get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
- psr = extract_unsigned_integer (buf, 8, byte_order);
+ ip = get_frame_register_unsigned (this_frame, IA64_IP_REGNUM);
+ psr = get_frame_register_unsigned (this_frame, IA64_PSR_REGNUM);
register frame so we must account for the fact that
ptrace() will return a value for bsp that points *after*
the current register frame. */
register frame so we must account for the fact that
ptrace() will return a value for bsp that points *after*
the current register frame. */
- get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
- bsp = extract_unsigned_integer (buf, 8, byte_order);
- get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
- cfm = extract_unsigned_integer (buf, 8, byte_order);
+ bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM);
+ cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM);
sof = gdbarch_tdep (gdbarch)->size_of_register_frame (this_frame, cfm);
*val = ia64_rse_skip_regs (bsp, -sof);
break;
sof = gdbarch_tdep (gdbarch)->size_of_register_frame (this_frame, cfm);
*val = ia64_rse_skip_regs (bsp, -sof);
break;
case UNW_IA64_AR_BSPSTORE:
/* Libunwind wants bspstore to be after the current register frame.
This is what ptrace() and gdb treats as the regular bsp value. */
case UNW_IA64_AR_BSPSTORE:
/* Libunwind wants bspstore to be after the current register frame.
This is what ptrace() and gdb treats as the regular bsp value. */
- get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
- *val = extract_unsigned_integer (buf, 8, byte_order);
+ *val = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM);
- get_frame_register (this_frame, regnum, buf);
- *val = extract_unsigned_integer (buf, 8, byte_order);
+ *val = get_frame_register_unsigned (this_frame, regnum);
unw_fpreg_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
unw_fpreg_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
unw_word_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
unw_word_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
- unw_word_t bsp, sof, sol, cfm, psr, ip;
- struct regcache *regcache = arg;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- long new_sof, old_sof;
- gdb_byte buf[MAX_REGISTER_SIZE];
+ unw_word_t bsp, sof, cfm, psr, ip;
+ struct regcache *regcache = (struct regcache *) arg;
+ struct gdbarch *gdbarch = regcache->arch ();
case UNW_REG_IP:
/* Libunwind expects to see the pc value which means the slot number
from the psr must be merged with the ip word address. */
case UNW_REG_IP:
/* Libunwind expects to see the pc value which means the slot number
from the psr must be merged with the ip word address. */
- regcache_cooked_read (regcache, IA64_IP_REGNUM, buf);
- ip = extract_unsigned_integer (buf, 8, byte_order);
- regcache_cooked_read (regcache, IA64_PSR_REGNUM, buf);
- psr = extract_unsigned_integer (buf, 8, byte_order);
+ regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &ip);
+ regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
register frame so we must account for the fact that
ptrace() will return a value for bsp that points *after*
the current register frame. */
register frame so we must account for the fact that
ptrace() will return a value for bsp that points *after*
the current register frame. */
- regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
- bsp = extract_unsigned_integer (buf, 8, byte_order);
- regcache_cooked_read (regcache, IA64_CFM_REGNUM, buf);
- cfm = extract_unsigned_integer (buf, 8, byte_order);
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
+ regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
case UNW_IA64_AR_BSPSTORE:
/* Libunwind wants bspstore to be after the current register frame.
This is what ptrace() and gdb treats as the regular bsp value. */
case UNW_IA64_AR_BSPSTORE:
/* Libunwind wants bspstore to be after the current register frame.
This is what ptrace() and gdb treats as the regular bsp value. */
- regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
- *val = extract_unsigned_integer (buf, 8, byte_order);
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, val);
- regcache_cooked_read (regcache, regnum, buf);
- *val = extract_unsigned_integer (buf, 8, byte_order);
+ regcache_cooked_read_unsigned (regcache, regnum, val);
unw_fpreg_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
unw_fpreg_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
/* FIXME drow/2005-09-10: This code used to call
ia64_linux_xfer_unwind_table directly to fetch the unwind table
for the currently running ia64-linux kernel. That data should
/* FIXME drow/2005-09-10: This code used to call
ia64_linux_xfer_unwind_table directly to fetch the unwind table
for the currently running ia64-linux kernel. That data should
unw_word_t *dilap, void *arg)
{
struct obj_section *text_sec;
unw_word_t *dilap, void *arg)
{
struct obj_section *text_sec;
- get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
- cfm = extract_unsigned_integer (buf, 8, byte_order);
+ cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM);
libunwind_frame_this_id (this_frame, this_cache, &id);
if (frame_id_eq (id, outer_frame_id))
libunwind_frame_this_id (this_frame, this_cache, &id);
if (frame_id_eq (id, outer_frame_id))
struct type *float_elt_type;
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
struct type *float_elt_type;
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
- regcache_cooked_read (regcache, regnum, from);
- convert_typed_floating (from, ia64_ext_type (gdbarch),
- (char *)valbuf + offset, float_elt_type);
+ regcache->cooked_read (regnum, from);
+ target_float_convert (from, ia64_ext_type (gdbarch),
+ valbuf + offset, float_elt_type);
- ULONGEST val;
- regcache_cooked_read_unsigned (regcache, regnum, &val);
- memcpy ((char *)valbuf + offset, &val, reglen);
+ ULONGEST regval;
+ regcache_cooked_read_unsigned (regcache, regnum, ®val);
+ memcpy ((char *)valbuf + offset, ®val, reglen);
struct type *float_elt_type;
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
struct type *float_elt_type;
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
- convert_typed_floating ((char *)valbuf + offset, float_elt_type,
- to, ia64_ext_type (gdbarch));
- regcache_cooked_write (regcache, regnum, to);
+ target_float_convert (valbuf + offset, float_elt_type,
+ to, ia64_ext_type (gdbarch));
+ regcache->cooked_write (regnum, to);
int offset = 0;
int regnum = IA64_GR8_REGNUM;
int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
int offset = 0;
int regnum = IA64_GR8_REGNUM;
int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
memcpy (&val, (char *)valbuf + offset, m);
regcache_cooked_write_unsigned (regcache, regnum, val);
}
memcpy (&val, (char *)valbuf + offset, m);
regcache_cooked_write_unsigned (regcache, regnum, val);
}
ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int nslots, rseslots, memslots, slotnum, nfuncargs;
int floatreg;
ULONGEST bsp;
int nslots, rseslots, memslots, slotnum, nfuncargs;
int floatreg;
ULONGEST bsp;
- char to[MAX_REGISTER_SIZE];
- convert_typed_floating (value_contents (arg) + argoffset,
- float_elt_type, to,
- ia64_ext_type (gdbarch));
- regcache_cooked_write (regcache, floatreg, (void *)to);
+ gdb_byte to[IA64_FP_REGISTER_SIZE];
+ target_float_convert (value_contents (arg) + argoffset,
+ float_elt_type, to,
+ ia64_ext_type (gdbarch));
+ regcache->cooked_write (floatreg, to);
- if (struct_return)
- {
- regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM,
- (ULONGEST) struct_addr);
- }
+ if (return_method == return_method_struct)
+ regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM,
+ (ULONGEST) struct_addr);
ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
{
info->bytes_per_line = SLOT_MULTIPLIER;
ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
{
info->bytes_per_line = SLOT_MULTIPLIER;
set_gdbarch_memory_remove_breakpoint (gdbarch,
ia64_memory_remove_breakpoint);
set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
set_gdbarch_memory_remove_breakpoint (gdbarch,
ia64_memory_remove_breakpoint);
set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
set_gdbarch_read_pc (gdbarch, ia64_read_pc);
set_gdbarch_write_pc (gdbarch, ia64_write_pc);
set_gdbarch_read_pc (gdbarch, ia64_read_pc);
set_gdbarch_write_pc (gdbarch, ia64_write_pc);