+/* Model the semantics of pushing a register onto the stack. This
+ is a helper function for mn10300_analyze_prologue, below. */
+static void
+push_reg (pv_t *regs, struct pv_area *stack, int regnum)
+{
+ regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
+ pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
+}
+
+/* Translate an "r" register number extracted from an instruction encoding
+ into a GDB register number. Adapted from a simulator function
+ of the same name; see am33.igen. */
+static int
+translate_rreg (int rreg)
+{
+ /* The higher register numbers actually correspond to the
+ basic machine's address and data registers. */
+ if (rreg > 7 && rreg < 12)
+ return E_A0_REGNUM + rreg - 8;
+ else if (rreg > 11 && rreg < 16)
+ return E_D0_REGNUM + rreg - 12;
+ else
+ return E_E0_REGNUM + rreg;
+}
+
+/* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
+
+ If VALUE is a saved register, ADDR says it was saved at a constant
+ offset from the frame base, and SIZE indicates that the whole
+ register was saved, record its offset in RESULT_UNTYPED. */
+static void
+check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
+{
+ struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped;
+
+ if (value.kind == pvk_register
+ && value.k == 0
+ && pv_is_register (addr, E_SP_REGNUM)
+ && size == register_size (result->gdbarch, value.reg))
+ result->reg_offset[value.reg] = addr.k;
+}
+
+/* Analyze the prologue to determine where registers are saved,
+ the end of the prologue, etc. The result of this analysis is
+ returned in RESULT. See struct mn10300_prologue above for more
+ information. */
+static void
+mn10300_analyze_prologue (struct gdbarch *gdbarch,
+ CORE_ADDR start_pc, CORE_ADDR limit_pc,
+ struct mn10300_prologue *result)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ CORE_ADDR pc, next_pc;
+ int rn;
+ pv_t regs[MN10300_MAX_NUM_REGS];
+ struct pv_area *stack;
+ struct cleanup *back_to;
+ CORE_ADDR after_last_frame_setup_insn = start_pc;
+ int am33_mode = AM33_MODE (gdbarch);
+
+ memset (result, 0, sizeof (*result));
+ result->gdbarch = gdbarch;
+
+ for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++)
+ {
+ regs[rn] = pv_register (rn, 0);
+ result->reg_offset[rn] = 1;
+ }
+ stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
+ back_to = make_cleanup_free_pv_area (stack);
+
+ /* The typical call instruction will have saved the return address on the
+ stack. Space for the return address has already been preallocated in
+ the caller's frame. It's possible, such as when using -mrelax with gcc
+ that other registers were saved as well. If this happens, we really
+ have no chance of deciphering the frame. DWARF info can save the day
+ when this happens. */
+ pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
+
+ pc = start_pc;
+ while (pc < limit_pc)
+ {
+ int status;
+ gdb_byte instr[2];
+
+ /* Instructions can be as small as one byte; however, we usually
+ need at least two bytes to do the decoding, so fetch that many
+ to begin with. */
+ status = target_read_memory (pc, instr, 2);
+ if (status != 0)
+ break;
+
+ /* movm [regs], sp */
+ if (instr[0] == 0xcf)
+ {
+ gdb_byte save_mask;
+
+ save_mask = instr[1];
+
+ if ((save_mask & movm_exreg0_bit) && am33_mode)
+ {
+ push_reg (regs, stack, E_E2_REGNUM);
+ push_reg (regs, stack, E_E3_REGNUM);
+ }
+ if ((save_mask & movm_exreg1_bit) && am33_mode)
+ {
+ push_reg (regs, stack, E_E4_REGNUM);
+ push_reg (regs, stack, E_E5_REGNUM);
+ push_reg (regs, stack, E_E6_REGNUM);
+ push_reg (regs, stack, E_E7_REGNUM);
+ }
+ if ((save_mask & movm_exother_bit) && am33_mode)
+ {
+ push_reg (regs, stack, E_E0_REGNUM);
+ push_reg (regs, stack, E_E1_REGNUM);
+ push_reg (regs, stack, E_MDRQ_REGNUM);
+ push_reg (regs, stack, E_MCRH_REGNUM);
+ push_reg (regs, stack, E_MCRL_REGNUM);
+ push_reg (regs, stack, E_MCVF_REGNUM);
+ }
+ if (save_mask & movm_d2_bit)
+ push_reg (regs, stack, E_D2_REGNUM);
+ if (save_mask & movm_d3_bit)
+ push_reg (regs, stack, E_D3_REGNUM);
+ if (save_mask & movm_a2_bit)
+ push_reg (regs, stack, E_A2_REGNUM);
+ if (save_mask & movm_a3_bit)
+ push_reg (regs, stack, E_A3_REGNUM);
+ if (save_mask & movm_other_bit)
+ {
+ push_reg (regs, stack, E_D0_REGNUM);
+ push_reg (regs, stack, E_D1_REGNUM);
+ push_reg (regs, stack, E_A0_REGNUM);
+ push_reg (regs, stack, E_A1_REGNUM);
+ push_reg (regs, stack, E_MDR_REGNUM);
+ push_reg (regs, stack, E_LIR_REGNUM);
+ push_reg (regs, stack, E_LAR_REGNUM);
+ /* The `other' bit leaves a blank area of four bytes at
+ the beginning of its block of saved registers, making
+ it 32 bytes long in total. */
+ regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
+ }
+
+ pc += 2;
+ after_last_frame_setup_insn = pc;
+ }
+ /* mov sp, aN */
+ else if ((instr[0] & 0xfc) == 0x3c)
+ {
+ int aN = instr[0] & 0x03;
+
+ regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM];
+
+ pc += 1;
+ if (aN == 3)
+ after_last_frame_setup_insn = pc;
+ }
+ /* mov aM, aN */
+ else if ((instr[0] & 0xf0) == 0x90
+ && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
+ {
+ int aN = instr[0] & 0x03;
+ int aM = (instr[0] & 0x0c) >> 2;
+
+ regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM];
+
+ pc += 1;
+ }
+ /* mov dM, dN */
+ else if ((instr[0] & 0xf0) == 0x80
+ && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
+ {
+ int dN = instr[0] & 0x03;
+ int dM = (instr[0] & 0x0c) >> 2;
+
+ regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM];
+
+ pc += 1;
+ }
+ /* mov aM, dN */
+ else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0)
+ {
+ int dN = instr[1] & 0x03;
+ int aM = (instr[1] & 0x0c) >> 2;
+
+ regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM];
+
+ pc += 2;
+ }
+ /* mov dM, aN */
+ else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0)
+ {
+ int aN = instr[1] & 0x03;
+ int dM = (instr[1] & 0x0c) >> 2;
+
+ regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM];
+
+ pc += 2;
+ }
+ /* add imm8, SP */
+ else if (instr[0] == 0xf8 && instr[1] == 0xfe)
+ {
+ gdb_byte buf[1];
+ LONGEST imm8;
+
+
+ status = target_read_memory (pc + 2, buf, 1);
+ if (status != 0)
+ break;
+
+ imm8 = extract_signed_integer (buf, 1, byte_order);
+ regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8);
+
+ pc += 3;
+ /* Stack pointer adjustments are frame related. */
+ after_last_frame_setup_insn = pc;
+ }
+ /* add imm16, SP */
+ else if (instr[0] == 0xfa && instr[1] == 0xfe)
+ {
+ gdb_byte buf[2];
+ LONGEST imm16;
+
+ status = target_read_memory (pc + 2, buf, 2);
+ if (status != 0)
+ break;
+
+ imm16 = extract_signed_integer (buf, 2, byte_order);
+ regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16);
+
+ pc += 4;
+ /* Stack pointer adjustments are frame related. */
+ after_last_frame_setup_insn = pc;
+ }
+ /* add imm32, SP */
+ else if (instr[0] == 0xfc && instr[1] == 0xfe)
+ {
+ gdb_byte buf[4];
+ LONGEST imm32;
+
+ status = target_read_memory (pc + 2, buf, 4);
+ if (status != 0)
+ break;
+
+
+ imm32 = extract_signed_integer (buf, 4, byte_order);
+ regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32);
+
+ pc += 6;
+ /* Stack pointer adjustments are frame related. */
+ after_last_frame_setup_insn = pc;
+ }
+ /* add imm8, aN */
+ else if ((instr[0] & 0xfc) == 0x20)
+ {
+ int aN;
+ LONGEST imm8;
+
+ aN = instr[0] & 0x03;
+ imm8 = extract_signed_integer (&instr[1], 1, byte_order);
+
+ regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
+ imm8);
+
+ pc += 2;
+ }
+ /* add imm16, aN */
+ else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0)
+ {
+ int aN;
+ LONGEST imm16;
+ gdb_byte buf[2];
+
+ aN = instr[1] & 0x03;
+
+ status = target_read_memory (pc + 2, buf, 2);
+ if (status != 0)
+ break;
+
+
+ imm16 = extract_signed_integer (buf, 2, byte_order);
+
+ regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
+ imm16);
+
+ pc += 4;
+ }
+ /* add imm32, aN */
+ else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0)
+ {
+ int aN;
+ LONGEST imm32;
+ gdb_byte buf[4];
+
+ aN = instr[1] & 0x03;
+
+ status = target_read_memory (pc + 2, buf, 4);
+ if (status != 0)
+ break;
+
+ imm32 = extract_signed_integer (buf, 2, byte_order);
+
+ regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
+ imm32);
+ pc += 6;
+ }
+ /* fmov fsM, (rN) */
+ else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30)
+ {
+ int fsM, sM, Y, rN;
+ gdb_byte buf[1];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 1);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ rN = buf[0] & 0x0f;
+ fsM = (Y << 4) | sM;
+
+ pv_area_store (stack, regs[translate_rreg (rN)], 4,
+ regs[E_FS0_REGNUM + fsM]);
+
+ pc += 3;
+ }
+ /* fmov fsM, (sp) */
+ else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34)
+ {
+ int fsM, sM, Y;
+ gdb_byte buf[1];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 1);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ fsM = (Y << 4) | sM;
+
+ pv_area_store (stack, regs[E_SP_REGNUM], 4,
+ regs[E_FS0_REGNUM + fsM]);
+
+ pc += 3;
+ }
+ /* fmov fsM, (rN, rI) */
+ else if (instr[0] == 0xfb && instr[1] == 0x37)
+ {
+ int fsM, sM, Z, rN, rI;
+ gdb_byte buf[2];
+
+
+ status = target_read_memory (pc + 2, buf, 2);
+ if (status != 0)
+ break;
+
+ rI = (buf[0] & 0xf0) >> 4;
+ rN = buf[0] & 0x0f;
+ sM = (buf[1] & 0xf0) >> 4;
+ Z = (buf[1] & 0x02) >> 1;
+ fsM = (Z << 4) | sM;
+
+ pv_area_store (stack,
+ pv_add (regs[translate_rreg (rN)],
+ regs[translate_rreg (rI)]),
+ 4, regs[E_FS0_REGNUM + fsM]);
+
+ pc += 4;
+ }
+ /* fmov fsM, (d8, rN) */
+ else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30)
+ {
+ int fsM, sM, Y, rN;
+ LONGEST d8;
+ gdb_byte buf[2];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 2);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ rN = buf[0] & 0x0f;
+ fsM = (Y << 4) | sM;
+ d8 = extract_signed_integer (&buf[1], 1, byte_order);
+
+ pv_area_store (stack,
+ pv_add_constant (regs[translate_rreg (rN)], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
+
+ pc += 4;
+ }
+ /* fmov fsM, (d24, rN) */
+ else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30)
+ {
+ int fsM, sM, Y, rN;
+ LONGEST d24;
+ gdb_byte buf[4];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 4);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ rN = buf[0] & 0x0f;
+ fsM = (Y << 4) | sM;
+ d24 = extract_signed_integer (&buf[1], 3, byte_order);
+
+ pv_area_store (stack,
+ pv_add_constant (regs[translate_rreg (rN)], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
+
+ pc += 6;
+ }
+ /* fmov fsM, (d32, rN) */
+ else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30)
+ {
+ int fsM, sM, Y, rN;
+ LONGEST d32;
+ gdb_byte buf[5];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 5);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ rN = buf[0] & 0x0f;
+ fsM = (Y << 4) | sM;
+ d32 = extract_signed_integer (&buf[1], 4, byte_order);
+
+ pv_area_store (stack,
+ pv_add_constant (regs[translate_rreg (rN)], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
+
+ pc += 7;
+ }
+ /* fmov fsM, (d8, SP) */
+ else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34)
+ {
+ int fsM, sM, Y;
+ LONGEST d8;
+ gdb_byte buf[2];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 2);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ fsM = (Y << 4) | sM;
+ d8 = extract_signed_integer (&buf[1], 1, byte_order);
+
+ pv_area_store (stack,
+ pv_add_constant (regs[E_SP_REGNUM], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
+
+ pc += 4;
+ }
+ /* fmov fsM, (d24, SP) */
+ else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34)
+ {
+ int fsM, sM, Y;
+ LONGEST d24;
+ gdb_byte buf[4];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 4);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ fsM = (Y << 4) | sM;
+ d24 = extract_signed_integer (&buf[1], 3, byte_order);
+
+ pv_area_store (stack,
+ pv_add_constant (regs[E_SP_REGNUM], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
+
+ pc += 6;
+ }
+ /* fmov fsM, (d32, SP) */
+ else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34)
+ {
+ int fsM, sM, Y;
+ LONGEST d32;
+ gdb_byte buf[5];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 5);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ fsM = (Y << 4) | sM;
+ d32 = extract_signed_integer (&buf[1], 4, byte_order);
+
+ pv_area_store (stack,
+ pv_add_constant (regs[E_SP_REGNUM], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
+
+ pc += 7;
+ }
+ /* fmov fsM, (rN+) */
+ else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31)
+ {
+ int fsM, sM, Y, rN, rN_regnum;
+ gdb_byte buf[1];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 1);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ rN = buf[0] & 0x0f;
+ fsM = (Y << 4) | sM;
+
+ rN_regnum = translate_rreg (rN);
+
+ pv_area_store (stack, regs[rN_regnum], 4,
+ regs[E_FS0_REGNUM + fsM]);
+ regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
+
+ pc += 3;
+ }
+ /* fmov fsM, (rN+, imm8) */
+ else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31)
+ {
+ int fsM, sM, Y, rN, rN_regnum;
+ LONGEST imm8;
+ gdb_byte buf[2];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 2);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ rN = buf[0] & 0x0f;
+ fsM = (Y << 4) | sM;
+ imm8 = extract_signed_integer (&buf[1], 1, byte_order);
+
+ rN_regnum = translate_rreg (rN);
+
+ pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
+
+ pc += 4;
+ }
+ /* fmov fsM, (rN+, imm24) */
+ else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31)
+ {
+ int fsM, sM, Y, rN, rN_regnum;
+ LONGEST imm24;
+ gdb_byte buf[4];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 4);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ rN = buf[0] & 0x0f;
+ fsM = (Y << 4) | sM;
+ imm24 = extract_signed_integer (&buf[1], 3, byte_order);
+
+ rN_regnum = translate_rreg (rN);
+
+ pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
+
+ pc += 6;
+ }
+ /* fmov fsM, (rN+, imm32) */
+ else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31)
+ {
+ int fsM, sM, Y, rN, rN_regnum;
+ LONGEST imm32;
+ gdb_byte buf[5];
+
+ Y = (instr[1] & 0x02) >> 1;
+
+ status = target_read_memory (pc + 2, buf, 5);
+ if (status != 0)
+ break;
+
+ sM = (buf[0] & 0xf0) >> 4;
+ rN = buf[0] & 0x0f;
+ fsM = (Y << 4) | sM;
+ imm32 = extract_signed_integer (&buf[1], 4, byte_order);
+
+ rN_regnum = translate_rreg (rN);
+
+ pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
+
+ pc += 7;
+ }
+ /* mov imm8, aN */
+ else if ((instr[0] & 0xf0) == 0x90)
+ {
+ int aN = instr[0] & 0x03;
+ LONGEST imm8;
+
+ imm8 = extract_signed_integer (&instr[1], 1, byte_order);
+
+ regs[E_A0_REGNUM + aN] = pv_constant (imm8);
+ pc += 2;
+ }
+ /* mov imm16, aN */
+ else if ((instr[0] & 0xfc) == 0x24)
+ {
+ int aN = instr[0] & 0x03;
+ gdb_byte buf[2];
+ LONGEST imm16;
+
+ status = target_read_memory (pc + 1, buf, 2);
+ if (status != 0)
+ break;
+
+ imm16 = extract_signed_integer (buf, 2, byte_order);
+ regs[E_A0_REGNUM + aN] = pv_constant (imm16);
+ pc += 3;
+ }
+ /* mov imm32, aN */
+ else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc))
+ {
+ int aN = instr[1] & 0x03;
+ gdb_byte buf[4];
+ LONGEST imm32;
+
+ status = target_read_memory (pc + 2, buf, 4);
+ if (status != 0)
+ break;
+
+ imm32 = extract_signed_integer (buf, 4, byte_order);
+ regs[E_A0_REGNUM + aN] = pv_constant (imm32);
+ pc += 6;
+ }
+ /* mov imm8, dN */
+ else if ((instr[0] & 0xf0) == 0x80)
+ {
+ int dN = instr[0] & 0x03;
+ LONGEST imm8;
+
+ imm8 = extract_signed_integer (&instr[1], 1, byte_order);
+
+ regs[E_D0_REGNUM + dN] = pv_constant (imm8);
+ pc += 2;
+ }
+ /* mov imm16, dN */
+ else if ((instr[0] & 0xfc) == 0x2c)
+ {
+ int dN = instr[0] & 0x03;
+ gdb_byte buf[2];
+ LONGEST imm16;
+
+ status = target_read_memory (pc + 1, buf, 2);
+ if (status != 0)
+ break;
+
+ imm16 = extract_signed_integer (buf, 2, byte_order);
+ regs[E_D0_REGNUM + dN] = pv_constant (imm16);
+ pc += 3;
+ }
+ /* mov imm32, dN */
+ else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc))
+ {
+ int dN = instr[1] & 0x03;
+ gdb_byte buf[4];
+ LONGEST imm32;
+
+ status = target_read_memory (pc + 2, buf, 4);
+ if (status != 0)
+ break;
+
+ imm32 = extract_signed_integer (buf, 4, byte_order);
+ regs[E_D0_REGNUM + dN] = pv_constant (imm32);
+ pc += 6;
+ }
+ else
+ {
+ /* We've hit some instruction that we don't recognize. Hopefully,
+ we have enough to do prologue analysis. */
+ break;
+ }
+ }
+
+ /* Is the frame size (offset, really) a known constant? */
+ if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM))
+ result->frame_size = regs[E_SP_REGNUM].k;
+
+ /* Was the frame pointer initialized? */
+ if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM))
+ {
+ result->has_frame_ptr = 1;
+ result->frame_ptr_offset = regs[E_A3_REGNUM].k;
+ }
+
+ /* Record where all the registers were saved. */
+ pv_area_scan (stack, check_for_saved, (void *) result);
+
+ result->prologue_end = after_last_frame_setup_insn;
+
+ do_cleanups (back_to);
+}
+