+#include "prologue-value.h"
+
+enum s390_abi_kind
+{
+ ABI_NONE,
+ ABI_LINUX_S390,
+ ABI_LINUX_ZSERIES
+};
+
+enum s390_vector_abi_kind
+{
+ S390_VECTOR_ABI_NONE,
+ S390_VECTOR_ABI_128
+};
+
+/* The tdep structure. */
+
+struct gdbarch_tdep
+{
+ /* Target description. */
+ const struct target_desc *tdesc;
+
+ /* ABI version. */
+ enum s390_abi_kind abi;
+
+ /* Vector ABI. */
+ enum s390_vector_abi_kind vector_abi;
+
+ /* Pseudo register numbers. */
+ int gpr_full_regnum;
+ int pc_regnum;
+ int cc_regnum;
+ int v0_full_regnum;
+
+ bool have_upper;
+ bool have_linux_v1;
+ bool have_linux_v2;
+ bool have_tdb;
+ bool have_vx;
+ bool have_gs;
+
+ /* Hook to record OS specific systemcall. */
+ int (*s390_syscall_record) (struct regcache *regcache, LONGEST svc_number);
+};
+
+/* Decoding S/390 instructions. */
+
+/* Named opcode values for the S/390 instructions we recognize. Some
+ instructions have their opcode split across two fields; those are the
+ op1_* and op2_* enums. */
+
+enum
+{
+ op1_lhi = 0xa7, op2_lhi = 0x08,
+ op1_lghi = 0xa7, op2_lghi = 0x09,
+ op1_lgfi = 0xc0, op2_lgfi = 0x01,
+ op_lr = 0x18,
+ op_lgr = 0xb904,
+ op_l = 0x58,
+ op1_ly = 0xe3, op2_ly = 0x58,
+ op1_lg = 0xe3, op2_lg = 0x04,
+ op_lm = 0x98,
+ op1_lmy = 0xeb, op2_lmy = 0x98,
+ op1_lmg = 0xeb, op2_lmg = 0x04,
+ op_st = 0x50,
+ op1_sty = 0xe3, op2_sty = 0x50,
+ op1_stg = 0xe3, op2_stg = 0x24,
+ op_std = 0x60,
+ op_stm = 0x90,
+ op1_stmy = 0xeb, op2_stmy = 0x90,
+ op1_stmg = 0xeb, op2_stmg = 0x24,
+ op1_aghi = 0xa7, op2_aghi = 0x0b,
+ op1_ahi = 0xa7, op2_ahi = 0x0a,
+ op1_agfi = 0xc2, op2_agfi = 0x08,
+ op1_afi = 0xc2, op2_afi = 0x09,
+ op1_algfi= 0xc2, op2_algfi= 0x0a,
+ op1_alfi = 0xc2, op2_alfi = 0x0b,
+ op_ar = 0x1a,
+ op_agr = 0xb908,
+ op_a = 0x5a,
+ op1_ay = 0xe3, op2_ay = 0x5a,
+ op1_ag = 0xe3, op2_ag = 0x08,
+ op1_slgfi= 0xc2, op2_slgfi= 0x04,
+ op1_slfi = 0xc2, op2_slfi = 0x05,
+ op_sr = 0x1b,
+ op_sgr = 0xb909,
+ op_s = 0x5b,
+ op1_sy = 0xe3, op2_sy = 0x5b,
+ op1_sg = 0xe3, op2_sg = 0x09,
+ op_nr = 0x14,
+ op_ngr = 0xb980,
+ op_la = 0x41,
+ op1_lay = 0xe3, op2_lay = 0x71,
+ op1_larl = 0xc0, op2_larl = 0x00,
+ op_basr = 0x0d,
+ op_bas = 0x4d,
+ op_bcr = 0x07,
+ op_bc = 0x0d,
+ op_bctr = 0x06,
+ op_bctgr = 0xb946,
+ op_bct = 0x46,
+ op1_bctg = 0xe3, op2_bctg = 0x46,
+ op_bxh = 0x86,
+ op1_bxhg = 0xeb, op2_bxhg = 0x44,
+ op_bxle = 0x87,
+ op1_bxleg= 0xeb, op2_bxleg= 0x45,
+ op1_bras = 0xa7, op2_bras = 0x05,
+ op1_brasl= 0xc0, op2_brasl= 0x05,
+ op1_brc = 0xa7, op2_brc = 0x04,
+ op1_brcl = 0xc0, op2_brcl = 0x04,
+ op1_brct = 0xa7, op2_brct = 0x06,
+ op1_brctg= 0xa7, op2_brctg= 0x07,
+ op_brxh = 0x84,
+ op1_brxhg= 0xec, op2_brxhg= 0x44,
+ op_brxle = 0x85,
+ op1_brxlg= 0xec, op2_brxlg= 0x45,
+ op_svc = 0x0a,
+};
+
+/* Hardware capabilities. */
+
+#ifndef HWCAP_S390_HIGH_GPRS
+#define HWCAP_S390_HIGH_GPRS 512
+#endif
+
+#ifndef HWCAP_S390_TE
+#define HWCAP_S390_TE 1024
+#endif
+
+#ifndef HWCAP_S390_VX
+#define HWCAP_S390_VX 2048
+#endif
+
+#ifndef HWCAP_S390_GS
+#define HWCAP_S390_GS 16384
+#endif
+