+2018-10-03 Tamar Christina <tamar.christina@arm.com>
+
+ * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
+ extend flags field size.
+ (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
+
+2018-10-03 John Darrington <john@darrington.wattle.id.au>
+
+ * dis-asm.h (print_insn_s12z): New declaration.
+
+2018-10-02 Palmer Dabbelt <palmer@sifive.com>
+
+ * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
+ (MASK_FENCE_TSO): Likewise.
+
+2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
+
+ * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
+
+2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/23694
+ * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
+ include zero size sections at start of PT_NOTE segment.
+
+2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
+
+ * elf/nds32.h: Remove the unused target features.
+ * dis-asm.h (disassemble_init_nds32): Declared.
+ * elf/nds32.h (E_NDS32_NULL): Removed.
+ (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
+ * opcode/nds32.h: Ident.
+ (N32_SUB6, INSN_LW): New macros.
+ (enum n32_opcodes): Updated.
+ * elf/nds32.h: Doc fixes.
+ * elf/nds32.h: Add R_NDS32_LSI.
+ * elf/nds32.h: Add new relocations for TLS.
+
+2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * elf/common.h (AT_SUN_HWCAP): Rename to ...
+ (AT_SUN_CAP_HW1): ... this. Retain old name for backward
+ compatibility.
+ (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
+ (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
+
+2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
+
+ * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
+
+2018-08-31 Alan Modra <amodra@gmail.com>
+
+ * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
+ (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
+ (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
+ (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
+
+2018-08-30 Kito Cheng <kito@andestech.com>
+
+ * opcode/riscv.h (MAX_SUBSET_NUM): New.
+ (riscv_opcode): Add xlen_requirement field and change type of
+ subset.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
+ * opcode/mips.h (CPU_XXX): New CPU_GS264E.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
+ * opcode/mips.h (CPU_XXX): New CPU_GS464E.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
+ E_MIPS_MACH_GS464.
+ (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
+ * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
+ (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
+ * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
+ (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
+ * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
+ (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
+ * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
+ * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
+ (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
+ * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
+
+2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
+ (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
+ (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
+ (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
+ (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
+ (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
+ (GNU_PROPERTY_X86_UINT32_AND_LO): New.
+ (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
+ (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
+ (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
+ (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
+ (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
+ (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
+ (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
+ (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
+ (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
+ (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
+ (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
+ (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
+ (GNU_PROPERTY_X86_ISA_1_USED): Defined to
+ (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
+ (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
+ (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
+
+2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
+
+2018-08-21 John Darrington <john@darrington.wattle.id.au>
+
+ * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
+
+2018-08-21 Alan Modra <amodra@gmail.com>
+
+ * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
+ Mention use of "extract" function to provide default value.
+ (PPC_OPERAND_OPTIONAL_VALUE): Delete.
+ (ppc_optional_operand_value): Rewrite to use extract function.
+
+2018-08-18 John Darrington <john@darrington.wattle.id.au>
+
+ * opcode/s12z.h: New file.
+
+2018-08-09 Richard Earnshaw <rearnsha@arm.com>
+
+ * elf/arm.h: Updated comments for e_flags definitions.
+
+2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * elf/arc.h (Tag_ARC_ATR_version): New tag.
+
+2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
+
+2018-08-01 Richard Earnshaw <rearnsha@arm.com>
+
+ Copy over from GCC
+ 2018-07-26 Martin Liska <mliska@suse.cz>
+
+ PR lto/86548
+ * libiberty.h (make_temp_file_with_prefix): New function.
+
+2018-07-30 Jim Wilson <jimw@sifive.com>
+
+ * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
+ (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
+ (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
+
+2018-07-30 Andrew Jenner <andrew@codesourcery.com>
+
+ * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
+ * elf/csky.h: New file.
+
+2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
+ Maciej W. Rozycki <macro@linux-mips.org>
+
+ * elf/mips.h (AFL_ASE_MASK): Correct typo.
+
+2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
+
+ * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
+
+2018-07-26 Alan Modra <amodra@gmail.com>
+
+ * elf/ppc64.h: Specify byte offset to local entry for values
+ of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
+ value for such functions when entering via global entry point.
+ Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
+
+2018-07-24 Alan Modra <amodra@gmail.com>
+
+ PR 23430
+ * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
+
+2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
+ Maciej W. Rozycki <macro@mips.com>
+
+ * elf/mips.h (AFL_ASE_MMI): New macro.
+ (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
+ * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
+
+2018-07-17 Maciej W. Rozycki <macro@mips.com>
+
+ * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
+
+2018-07-06 Alan Modra <amodra@gmail.com>
+
+ * diagnostics.h: Comment on macro usage.
+
+2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
+
+ * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
+ Define for clang.
+
+2018-07-02 Maciej W. Rozycki <macro@mips.com>
+
+ PR tdep/8282
+ * dis-asm.h (disasm_option_arg_t): New typedef.
+ (disasm_options_and_args_t): Likewise.
+ (disasm_options_t): Add `arg' member, document members.
+ (disassembler_options_mips): New prototype.
+ (disassembler_options_arm, disassembler_options_powerpc)
+ (disassembler_options_s390): Update prototypes.
+
+2018-06-29 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/23192
+ *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
+
+2018-06-26 Alan Modra <amodra@gmail.com>
+
+ * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
+
+2018-06-24 Nick Clifton <nickc@redhat.com>
+
+ 2.31 branch created.
+
+2018-06-21 Alan Hayward <alan.hayward@arm.com>
+
+ * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
+ for non SHT_NOBITS.
+
+2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
+
+ Sync with GCC
+
+ 2018-05-24 Tom Rix <trix@juniper.net>
+
+ * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
+
+ 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
+
+ * longlong.h [__riscv] (__umulsidi3): Define.
+ [__riscv] (umul_ppmm): Likewise.
+ [__riscv] (__muluw3): Likewise.
+
+2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
+
+ * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
+ (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
+ * opcode/mips.h: Document "+\" operand format.
+ (ASE_GINV): New macro.
+
+2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
+ Faraz Shahbazker <Faraz.Shahbazker@mips.com>
+
+ * elf/mips.h (AFL_ASE_CRC): New macro.
+ (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
+ * opcode/mips.h (ASE_CRC): New macro.
+ * opcode/mips.h (ASE_CRC64): Likewise.
+
+2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
+
+ * elf/xtensa.h (xtensa_read_table_entries)
+ (xtensa_compute_fill_extra_space): New declarations.
+
+2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
+ define for GCC.
+
+2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
+ (DIAGNOSTIC_STRINGIFY): Likewise.
+ (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
+ (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
+ (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
+ (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
+ (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
+ (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
+
+2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
+
+2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ * splay-tree.h (splay_tree_compare_strings,
+ splay_tree_delete_pointers): Declare new utility functions.
+
+2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
+
+ * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
+
+2018-05-18 Kito Cheng <kito.cheng@gmail.com>
+
+ * elf/riscv.h (EF_RISCV_RVE): New define.
+
+2018-05-18 John Darrington <john@darrington.wattle.id.au>
+
+ * elf/s12z.h: New header.
+
+2018-05-15 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
+
+2018-05-15 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
+ (aarch64_print_operand): Support notes.
+