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Merge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git]
/
include
/
linux
/
fsl_ifc.h
diff --git
a/include/linux/fsl_ifc.h
b/include/linux/fsl_ifc.h
index 0023088b253b4d928669f9841a1f08dbeaf5307a..3f9778cbc79d0b1bb3b73e0a12695b722fa7a179 100644
(file)
--- a/
include/linux/fsl_ifc.h
+++ b/
include/linux/fsl_ifc.h
@@
-39,6
+39,10
@@
#define FSL_IFC_VERSION_MASK 0x0F0F0000
#define FSL_IFC_VERSION_1_0_0 0x01000000
#define FSL_IFC_VERSION_1_1_0 0x01010000
#define FSL_IFC_VERSION_MASK 0x0F0F0000
#define FSL_IFC_VERSION_1_0_0 0x01000000
#define FSL_IFC_VERSION_1_1_0 0x01010000
+#define FSL_IFC_VERSION_2_0_0 0x02000000
+
+#define PGOFFSET_64K (64*1024)
+#define PGOFFSET_4K (4*1024)
/*
* CSPR - Chip Select Property Register
/*
* CSPR - Chip Select Property Register
@@
-723,20
+727,26
@@
struct fsl_ifc_nand {
__be32 nand_evter_en;
u32 res17[0x2];
__be32 nand_evter_intr_en;
__be32 nand_evter_en;
u32 res17[0x2];
__be32 nand_evter_intr_en;
- u32 res18[0x2];
+ __be32 nand_vol_addr_stat;
+ u32 res18;
__be32 nand_erattr0;
__be32 nand_erattr1;
u32 res19[0x10];
__be32 nand_fsr;
__be32 nand_erattr0;
__be32 nand_erattr1;
u32 res19[0x10];
__be32 nand_fsr;
- u32 res20;
- __be32 nand_eccstat[
4
];
- u32 res21[0x
20
];
+ u32 res20
[0x3]
;
+ __be32 nand_eccstat[
6
];
+ u32 res21[0x
1c
];
__be32 nanndcr;
u32 res22[0x2];
__be32 nand_autoboot_trgr;
u32 res23;
__be32 nand_mdr;
__be32 nanndcr;
u32 res22[0x2];
__be32 nand_autoboot_trgr;
u32 res23;
__be32 nand_mdr;
- u32 res24[0x5C];
+ u32 res24[0x1C];
+ __be32 nand_dll_lowcfg0;
+ __be32 nand_dll_lowcfg1;
+ u32 res25;
+ __be32 nand_dll_lowstat;
+ u32 res26[0x3c];
};
/*
};
/*
@@
-771,13
+781,12
@@
struct fsl_ifc_gpcm {
__be32 gpcm_erattr1;
__be32 gpcm_erattr2;
__be32 gpcm_stat;
__be32 gpcm_erattr1;
__be32 gpcm_erattr2;
__be32 gpcm_stat;
- u32 res4[0x1F3];
};
/*
* IFC Controller Registers
*/
};
/*
* IFC Controller Registers
*/
-struct fsl_ifc_
regs
{
+struct fsl_ifc_
global
{
__be32 ifc_rev;
u32 res1[0x2];
struct {
__be32 ifc_rev;
u32 res1[0x2];
struct {
@@
-803,21
+812,26
@@
struct fsl_ifc_regs {
} ftim_cs[FSL_IFC_BANK_COUNT];
u32 res9[0x30];
__be32 rb_stat;
} ftim_cs[FSL_IFC_BANK_COUNT];
u32 res9[0x30];
__be32 rb_stat;
- u32 res10[0x2];
+ __be32 rb_map;
+ __be32 wb_map;
__be32 ifc_gcr;
__be32 ifc_gcr;
- u32 res1
1
[0x2];
+ u32 res1
0
[0x2];
__be32 cm_evter_stat;
__be32 cm_evter_stat;
- u32 res1
2
[0x2];
+ u32 res1
1
[0x2];
__be32 cm_evter_en;
__be32 cm_evter_en;
- u32 res1
3
[0x2];
+ u32 res1
2
[0x2];
__be32 cm_evter_intr_en;
__be32 cm_evter_intr_en;
- u32 res1
4
[0x2];
+ u32 res1
3
[0x2];
__be32 cm_erattr0;
__be32 cm_erattr1;
__be32 cm_erattr0;
__be32 cm_erattr1;
- u32 res1
5
[0x2];
+ u32 res1
4
[0x2];
__be32 ifc_ccr;
__be32 ifc_csr;
__be32 ifc_ccr;
__be32 ifc_csr;
- u32 res16[0x2EB];
+ __be32 ddr_ccr_low;
+};
+
+
+struct fsl_ifc_runtime {
struct fsl_ifc_nand ifc_nand;
struct fsl_ifc_nor ifc_nor;
struct fsl_ifc_gpcm ifc_gpcm;
struct fsl_ifc_nand ifc_nand;
struct fsl_ifc_nor ifc_nor;
struct fsl_ifc_gpcm ifc_gpcm;
@@
-831,7
+845,8
@@
extern int fsl_ifc_find(phys_addr_t addr_base);
struct fsl_ifc_ctrl {
/* device info */
struct device *dev;
struct fsl_ifc_ctrl {
/* device info */
struct device *dev;
- struct fsl_ifc_regs __iomem *regs;
+ struct fsl_ifc_global __iomem *gregs;
+ struct fsl_ifc_runtime __iomem *rregs;
int irq;
int nand_irq;
spinlock_t lock;
int irq;
int nand_irq;
spinlock_t lock;
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