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Add support for ARC instruction relaxation in the assembler.
[deliverable/binutils-gdb.git]
/
include
/
opcode
/
arc.h
diff --git
a/include/opcode/arc.h
b/include/opcode/arc.h
index a69a561312f468bd65e7645b944713e7ad8060f3..6f5bc98f6a650a72557a1696f3baa4425d63dfbc 100644
(file)
--- a/
include/opcode/arc.h
+++ b/
include/opcode/arc.h
@@
-24,8
+24,13
@@
#ifndef OPCODE_ARC_H
#define OPCODE_ARC_H
#ifndef OPCODE_ARC_H
#define OPCODE_ARC_H
+#ifndef MAX_INSN_ARGS
#define MAX_INSN_ARGS 6
#define MAX_INSN_ARGS 6
+#endif
+
+#ifndef MAX_INSN_FLGS
#define MAX_INSN_FLGS 3
#define MAX_INSN_FLGS 3
+#endif
/* Instruction Class. */
typedef enum
/* Instruction Class. */
typedef enum
@@
-410,4
+415,7
@@
struct arc_aux_reg
extern const struct arc_aux_reg arc_aux_regs[];
extern const unsigned arc_num_aux_regs;
extern const struct arc_aux_reg arc_aux_regs[];
extern const unsigned arc_num_aux_regs;
+extern const struct arc_opcode arc_relax_opcodes[];
+extern const unsigned arc_num_relax_opcodes;
+
#endif /* OPCODE_ARC_H */
#endif /* OPCODE_ARC_H */
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