+ /* Bitmap of selected machine(s) (a la BFD machine number). */
+ int machs;
+
+ /* Bitmap of selected isa(s). */
+ CGEN_BITSET *isas;
+#define CGEN_CPU_ISAS(cd) ((cd)->isas)
+
+ /* Current endian. */
+ enum cgen_endian endian;
+#define CGEN_CPU_ENDIAN(cd) ((cd)->endian)
+
+ /* Current insn endian. */
+ enum cgen_endian insn_endian;
+#define CGEN_CPU_INSN_ENDIAN(cd) ((cd)->insn_endian)
+
+ /* Word size (in bits). */
+ /* ??? Or maybe maximum word size - might we ever need to allow a cpu table
+ to be opened for both sparc32/sparc64?
+ ??? Another alternative is to create a table of selected machs and
+ lazily fetch the data from there. */
+ unsigned int word_bitsize;
+
+ /* Instruction chunk size (in bits), for purposes of endianness
+ conversion. */
+ unsigned int insn_chunk_bitsize;
+
+ /* Indicator if sizes are unknown.
+ This is used by default_insn_bitsize,base_insn_bitsize if there is a
+ difference between the selected isa's. */
+#define CGEN_SIZE_UNKNOWN 65535
+
+ /* Default instruction size (in bits).
+ This is used by the assembler when it encounters an unknown insn. */
+ unsigned int default_insn_bitsize;
+
+ /* Base instruction size (in bits).
+ For non-LIW cpus this is generally the length of the smallest insn.
+ For LIW cpus its wip (work-in-progress). For the m32r its 32. */
+ unsigned int base_insn_bitsize;
+
+ /* Minimum/maximum instruction size (in bits). */
+ unsigned int min_insn_bitsize;
+ unsigned int max_insn_bitsize;
+
+ /* Instruction set variants. */
+ const CGEN_ISA *isa_table;
+
+ /* Machine variants. */
+ const CGEN_MACH *mach_table;
+
+ /* Hardware elements. */
+ CGEN_HW_TABLE hw_table;
+
+ /* Instruction fields. */
+ const CGEN_IFLD *ifld_table;
+
+ /* Operands. */
+ CGEN_OPERAND_TABLE operand_table;
+
+ /* Main instruction table. */
+ CGEN_INSN_TABLE insn_table;
+#define CGEN_CPU_INSN_TABLE(cd) (& (cd)->insn_table)
+
+ /* Macro instructions are defined separately and are combined with real
+ insns during hash table computation. */
+ CGEN_INSN_TABLE macro_insn_table;
+
+ /* Copy of CGEN_INT_INSN_P. */
+ int int_insn_p;
+
+ /* Called to rebuild the tables after something has changed. */
+ void (*rebuild_tables) (CGEN_CPU_DESC);
+
+ /* Operand parser callback. */
+ cgen_parse_operand_fn * parse_operand_fn;
+
+ /* Parse/insert/extract/print cover fns for operands. */
+ const char * (*parse_operand)
+ (CGEN_CPU_DESC, int opindex_, const char **, CGEN_FIELDS *fields_);
+#ifdef __BFD_H_SEEN__
+ const char * (*insert_operand)
+ (CGEN_CPU_DESC, int opindex_, CGEN_FIELDS *fields_,
+ CGEN_INSN_BYTES_PTR, bfd_vma pc_);
+ int (*extract_operand)
+ (CGEN_CPU_DESC, int opindex_, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
+ CGEN_FIELDS *fields_, bfd_vma pc_);
+ void (*print_operand)
+ (CGEN_CPU_DESC, int opindex_, void * info_, CGEN_FIELDS * fields_,
+ void const *attrs_, bfd_vma pc_, int length_);
+#else
+ const char * (*insert_operand) ();
+ int (*extract_operand) ();
+ void (*print_operand) ();
+#endif
+#define CGEN_CPU_PARSE_OPERAND(cd) ((cd)->parse_operand)
+#define CGEN_CPU_INSERT_OPERAND(cd) ((cd)->insert_operand)
+#define CGEN_CPU_EXTRACT_OPERAND(cd) ((cd)->extract_operand)
+#define CGEN_CPU_PRINT_OPERAND(cd) ((cd)->print_operand)
+
+ /* Size of CGEN_FIELDS struct. */
+ unsigned int sizeof_fields;
+#define CGEN_CPU_SIZEOF_FIELDS(cd) ((cd)->sizeof_fields)
+
+ /* Set the bitsize field. */
+ void (*set_fields_bitsize) (CGEN_FIELDS *fields_, int size_);
+#define CGEN_CPU_SET_FIELDS_BITSIZE(cd) ((cd)->set_fields_bitsize)
+
+ /* CGEN_FIELDS accessors. */
+ int (*get_int_operand)
+ (CGEN_CPU_DESC, int opindex_, const CGEN_FIELDS *fields_);
+ void (*set_int_operand)
+ (CGEN_CPU_DESC, int opindex_, CGEN_FIELDS *fields_, int value_);
+#ifdef __BFD_H_SEEN__
+ bfd_vma (*get_vma_operand)
+ (CGEN_CPU_DESC, int opindex_, const CGEN_FIELDS *fields_);
+ void (*set_vma_operand)
+ (CGEN_CPU_DESC, int opindex_, CGEN_FIELDS *fields_, bfd_vma value_);
+#else
+ long (*get_vma_operand) ();
+ void (*set_vma_operand) ();
+#endif
+#define CGEN_CPU_GET_INT_OPERAND(cd) ((cd)->get_int_operand)
+#define CGEN_CPU_SET_INT_OPERAND(cd) ((cd)->set_int_operand)
+#define CGEN_CPU_GET_VMA_OPERAND(cd) ((cd)->get_vma_operand)
+#define CGEN_CPU_SET_VMA_OPERAND(cd) ((cd)->set_vma_operand)
+
+ /* Instruction parse/insert/extract/print handlers. */
+ /* FIXME: make these types uppercase. */
+ cgen_parse_fn * const *parse_handlers;
+ cgen_insert_fn * const *insert_handlers;
+ cgen_extract_fn * const *extract_handlers;
+ cgen_print_fn * const *print_handlers;
+#define CGEN_PARSE_FN(cd, insn) (cd->parse_handlers[(insn)->opcode->handlers.parse])
+#define CGEN_INSERT_FN(cd, insn) (cd->insert_handlers[(insn)->opcode->handlers.insert])
+#define CGEN_EXTRACT_FN(cd, insn) (cd->extract_handlers[(insn)->opcode->handlers.extract])
+#define CGEN_PRINT_FN(cd, insn) (cd->print_handlers[(insn)->opcode->handlers.print])
+
+ /* Return non-zero if insn should be added to hash table. */
+ int (* asm_hash_p) (const CGEN_INSN *);