- V — Vector fetch: always an aligned word read, lasts for at least one RISC core cycle
- P — Program word fetch: always an aligned word read, lasts for at least one RISC core cycle
- r — 8-bit data read: lasts for at least one RISC core cycle
- R — 16-bit data read: lasts for at least one RISC core cycle
- w — 8-bit data write: lasts for at least one RISC core cycle
- W — 16-bit data write: lasts for at least one RISC core cycle
- A — Alignment cycle: no read or write, lasts for zero or one RISC core cycles
- f — Free cycle: no read or write, lasts for one RISC core cycles. */
+ V - Vector fetch: always an aligned word read, lasts for at least one RISC core cycle
+ P - Program word fetch: always an aligned word read, lasts for at least one RISC core cycle
+ r - 8-bit data read: lasts for at least one RISC core cycle
+ R - 16-bit data read: lasts for at least one RISC core cycle
+ w - 8-bit data write: lasts for at least one RISC core cycle
+ W - 16-bit data write: lasts for at least one RISC core cycle
+ A - Alignment cycle: no read or write, lasts for zero or one RISC core cycles
+ f - Free cycle: no read or write, lasts for one RISC core cycles. */