+start-sanitize-am33
+Thu Jul 16 18:04:46 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c (mn10300_opcodes): Fix opcode for 4 operand "mul" and
+ "mulu".
+
+end-sanitize-am33
+start-sanitize-r5900
+Mon Jul 13 18:14:24 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mips-opc.c (pref): Enabled for the r5900.
+
+end-sanitize-r5900
+Mon Jul 13 14:53:59 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (ckprefix): Handle fwait specially only when it isn't
+ the first prefix.
+ (dofloat): Correct test for fnstsw. Print `fnstsw %ax' rather
+ than `fnstsw %eax'.
+ (OP_J): Remove unnecessary subtraction when 16-bit displacement
+ will be masked later.
+
+start-sanitize-am33
+Fri Jul 10 23:09:56 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c (mn10300_opcodes): Fix destination operand for 3 operand
+ instructions.
+
+Wed Jul 8 11:32:44 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-dis.c (disassemble): When printing RREGs and XRREGs, map
+ from raw register #s to symbolic names to make debugging easier.
+
+end-sanitize-am33
+Thu Jul 2 17:11:27 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * m32r-opc.h (CGEN_MIN_INSN_SIZE): New #define.
+
+Wed Jul 1 16:11:16 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
+start-sanitize-cygnus
+ * Makefile.am (CGENDIR): Set via configure.
+ (CGEN): New variable.
+ (CGENFILES): object.scm renamed to cos.scm.
+ (run-cgen): Renamed from cgen. stamp file renamed to stamp-$prefix.
+ (stamp-m32r): Pass prefix to run-cgen.
+ * Makefile.in: Regenerate.
+ * cgen-asm.in: @arch@-opc.h renamed to @prefix@-opc.h.
+ * cgen-dis.in: Ditto.
+ * cgen-opc.in: Ditto.
+ * cgen.sh: New args cgen,prefix. Delete args scheme,schemeflags.
+ * configure.in: AC_SUBST cgen,cgendir. No longer look for guile.
+ * configure: Regenerate.
+end-sanitize-cygnus
+
+start-sanitize-am33
+Tue Jun 30 09:59:37 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Reorder "movbu" and "movhu" instructions too.
+
+Mon Jun 29 14:54:32 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Reorder more instructions so that we do not
+ accidentally match a mn10300 instruction when we really
+ wanted an am33 instruction.
+
+end-sanitize-am33
+Fri Jun 26 11:08:55 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-dis.c: Only recognize instructions from the currently
+ selected machine.
+ * m10300-opc.c: Add field indicating the particular variant of
+ the mn10300 each instruction is available on.
+
+Fri Jun 26 12:04:21 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: For bfd_vax_arch, build vax-dis.lo.
+ * Makefile.am: Rebuild dependencies.
+ (CFILES): Add vax-dis.c.
+ (ALL_MACHINES): Add vax-dis.lo.
+ * aclocal.m4: Rebuild with current libtool.
+ * configure, Makefile.in: Rebuild.
+
+Fri Jun 26 12:03:20 1998 Klaus Kaempf <kkaempf@progis.de>
+
+ * vax-dis.c: New file, from work by Pauline Middelink
+ <middelin@polyware.iaf.nl>.
+ * disassemble.c (ARCH_vax): Define if ARCH_all.
+ (disassembler): Add case for ARCH_vax.
+ * makefile.vms: Support compilation on vms/vax.
+
+start-sanitize-sky
+Wed Jun 24 17:14:01 1998 Ian Carmichael <iancarm@cygnus.com>
+
+ * dvp-opc.c (DVP_OPERAND_RELOC_11_S4): Temporarily back out
+ the DVP_OPERAND_RELOC_11_S4 relocation.
+
+end-sanitize-sky
+start-sanitize-am33
+Wed Jun 24 09:53:06 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-dis.c (print_insn_mn10300): 0xf7 opcode prefix specifies
+ 4 byte instructions.
+ (disassemble): Correctly handle FMT_D10 instructions.
+
+ * m10300-opc.c (mn10300_opcodes): Fix typo in IMM24 versions of the
+ am33 shift instructions.
+
+ * m10300-dis.c (print_insn_mn10300): 0xf9 opcode prefix specifies
+ 3 byte instructions.
+ (disassemble): Handle new instruction formats FMT_D6, FMT_D7, FMT_D8
+ FMT_D9 and FMT_D10. Handle various new opcode flags for the am33.
+
+ * m10300-opc.c (IMM32_HIGH8_MEM): New operand type.
+ (mn10300_opcodes): Reorder so as to try and select opcodes from
+ the core chip when multiple alternatives exist. Change several
+ am33 instructions to use IMM32_HIGH8_MEM. Fix typos in "mac" and
+ "macbu" instructions. Fix typos in a couple DSP instructions too.
+
+end-sanitize-am33
+Tue Jun 23 19:42:18 1998 Mark Alexander <marka@cygnus.com>
+
+ * m10200-dis.c (print_insn_mn10200): Fix various non-portabilities
+ related to sign extension and the size of ints.
+
+Tue Jun 23 10:59:26 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Support one operand "asr", "lsr" and "asl"
+ instructions. Support (sp) addressing mode by expanding it into
+ (0,sp).
+
+start-sanitize-sky
+Mon Jun 22 15:48:29 1998 Ian Carmichael <iancarm@cygnus.com>
+
+ * dvp-opc.c (LIMM11, LUIMM15): New symbol types
+ DVP_OPERAND_RELOC_U15_S3 and DVP_OPERAND_RELOC_11_S4 to allow labels to
+ be used as immediate values.
+
+end-sanitize-sky
+start-sanitize-am33
+Mon Jun 22 13:36:27 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Support 4 byte DSP instructions.
+
+end-sanitize-am33
+Sat Jun 20 14:46:20 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * mips-dis.c (_print_insn_mips): Fix argument interchange typo.
+
+start-sanitize-am33
+Fri Jun 19 16:47:06 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Support 6 and 7 byte am33 instructions.
+
+end-sanitize-am33
+Fri Jun 19 09:16:42 1998 Mark Alexander <marka@cygnus.com>
+
+ * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
+
+start-sanitize-am33
+Fri Jun 19 09:42:51 1998 Jeffrey A Law (law@cygnus.com)
+
+ * m10300-opc.c: Support for 3 byte and 4 byte extended instructions
+ found on the mn10300.
+
+end-sanitize-am33
+1998-06-18 Ulrich Drepper <drepper@cygnus.com>
+
+ * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
+ sysexit.
+
+Thu Jun 18 10:22:24 1998 John Metzler <jmetzler@cygnus.com>
+
+ * mips-dis.c (print_insn_little_mips): Previously, instruction
+ printing references the symbol table to determine whether the
+ instruction resides in a block regular instructions or mips16
+ instructions. However, when the disassembler gets used in other
+ environments where the symbol table is not present, we no longer
+ rely in the symbol table, rather, use the low bit of the
+ instructions address to guess. There should be no change for usage
+ of the disassembler in host based programse, gdb ,objdump.
+ (print_insn_big_mips): ditto.
+ (print_insn_mips): ditto
+
+Wed Jun 17 21:19:01 1998 Mark Alexander <marka@cygnus.com>
+
+ * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
+
+Wed Jun 17 17:49:23 1998 Jeffrey A Law (law@cygnus.com)
+
+start-sanitize-am33
+ * m10300-opc.c (USP, SSP, MSP, PC, IMM4, EPSW, RN0, RM1): New
+ operands for the am33.
+ (mn10300_opcodes): Add new instructions from the am33.
+end-sanitize-am33
+ * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
+
+Tue Jun 16 13:10:51 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c (index16): Add '%' to register names. Use ','
+ instead of '+'.
+
+Sat Jun 13 11:33:55 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * i386-dis.c: Don't print opcode suffix when we can figure out the
+ size (and gas can!) by register operands, or from the default
+ size.
+ (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
+ macro to 'E'.
+ (dis386, dis386_twobyte, grps): Use new suffix macros.
+ (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
+ consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
+ order of cmps operands to agree with Intel docs. Correct operand
+ of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
+ agree with Intel docs.
+ (print_insn_x86): Print orphan fwait before other prefixes.
+ Return correct byte count for orphan fwait with prefixes. Don't
+ print `bound' operands in reverse order.
+ (ckprefix): Stop accumulating prefixes if we get fwait.
+ (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
+
+Fri Jun 12 13:40:38 1998 Tom Tromey <tromey@cygnus.com>
+
+ * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
+ ($(PACKAGE).pot): Unconditionally depend on POTFILES.
+
+Fri Jun 12 11:04:06 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ Fix problems when bfd_vma is wider than long.
+ * i386-dis.c: Make op_address and start_pc unsigned.
+ (set_op): Make parameter unsigned.
+ (print_insn_x86): Cast to bfd_vma when passing a value to
+ print_address_func.
+ * ns32k-dis.c (CORE_ADDR): Don't define.
+ (print_insn_ns32k): Change type of addr to bfd_vma. Use
+ bfd_scan_vma to read back address.
+ (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
+ to format it.
+ * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
+ (NEXTULONG): New definition.
+ (print_insn_m68k): Avoid overflow when computing third argument of
+ print_insn_arg.
+ (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
+ Use disp instead of val to store offset values.
+ (print_indexed): Use base_disp instead of word to store base
+ displacement, to avoid overflow.
+ * m10300-dis.c (disassemble): Cast value to long when computing
+ pc-relative address, to get correct sign extension.
+
+Wed Jun 10 15:58:37 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-opc.c: Regenerate.
+