NS32K arg_bufs uninitialised

[deliverable/binutils-gdb.git] / opcodes / aarch64-asm.c

diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 67ebad687cc7473842e258858c0838dd5459cf2e..fc70ffcc7b6324fe8a174b0fd9ba9709a3fd2284 100644 (file)
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1,5 +1,5 @@
 /* aarch64-asm.c -- AArch64 assembler support.
 /* aarch64-asm.c -- AArch64 assembler support.

-   Copyright (C) 2012-2019 Free Software Foundation, Inc.
+   Copyright (C) 2012-2020 Free Software Foundation, Inc.

    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.
    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.


@@ -130,6 +130,7 @@ aarch64_ins_reglane (const aarch64_operand *self, const aarch64_opnd_info *info,
       switch (info->qualifier)
        {
        case AARCH64_OPND_QLF_S_4B:
       switch (info->qualifier)
        {
        case AARCH64_OPND_QLF_S_4B:

+       case AARCH64_OPND_QLF_S_2H:

          /* L:H */
          assert (reglane_index < 4);
          insert_fields (code, reglane_index, 0, 2, FLD_L, FLD_H);
          /* L:H */
          assert (reglane_index < 4);
          insert_fields (code, reglane_index, 0, 2, FLD_L, FLD_H);


@@ -1966,7 +1967,7 @@ convert_to_real (aarch64_inst *inst, const aarch64_opcode *real)
       break;
     }
 
       break;
     }
 

-convert_to_real_return:
+ convert_to_real_return:

   aarch64_replace_opcode (inst, real);
 }
 
   aarch64_replace_opcode (inst, real);
 }
 


@@ -2098,7 +2099,7 @@ aarch64_opcode_encode (const aarch64_opcode *opcode,
     }
 
 
     }
 
 

-encoding_exit:
+ encoding_exit:

   DEBUG_TRACE ("exit with %s", opcode->name);
 
   *code = inst->value;
   DEBUG_TRACE ("exit with %s", opcode->name);
 
   *code = inst->value;