+/* mulu.l $Dst32RnPrefixedSI,r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DST32RNPREFIXEDSI), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI, { 0x1890f }
+ },
+/* mulu.l $Dst32AnPrefixedSI,r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DST32ANPREFIXEDSI), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_An_direct_Prefixed_SI, { 0x1818f }
+ },
+/* mulu.l [$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI, { 0x1810f }
+ },
+/* mulu.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI, { 0x1830f00 }
+ },
+/* mulu.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI, { 0x1850f00 }
+ },
+/* mulu.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI, { 0x1870f00 }
+ },
+/* mulu.l ${Dsp-24-u8}[sb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI, { 0x1838f00 }
+ },
+/* mulu.l ${Dsp-24-u16}[sb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI, { 0x1858f00 }
+ },
+/* mulu.l ${Dsp-24-s8}[fb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI, { 0x183cf00 }
+ },
+/* mulu.l ${Dsp-24-s16}[fb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI, { 0x185cf00 }
+ },
+/* mulu.l ${Dsp-24-u16},r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI, { 0x187cf00 }
+ },
+/* mulu.l ${Dsp-24-u24},r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U24), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI, { 0x1878f00 }
+ },
+/* mul.l $Dst32RnPrefixedSI,r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DST32RNPREFIXEDSI), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI, { 0x1891f }
+ },
+/* mul.l $Dst32AnPrefixedSI,r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DST32ANPREFIXEDSI), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_An_direct_Prefixed_SI, { 0x1819f }
+ },
+/* mul.l [$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI, { 0x1811f }
+ },
+/* mul.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U8), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI, { 0x1831f00 }
+ },
+/* mul.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI, { 0x1851f00 }
+ },
+/* mul.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U24), '[', OP (DST32ANPREFIXED), ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI, { 0x1871f00 }
+ },
+/* mul.l ${Dsp-24-u8}[sb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U8), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI, { 0x1839f00 }
+ },
+/* mul.l ${Dsp-24-u16}[sb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI, { 0x1859f00 }
+ },
+/* mul.l ${Dsp-24-s8}[fb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_S8), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI, { 0x183df00 }
+ },
+/* mul.l ${Dsp-24-s16}[fb],r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_S16), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI, { 0x185df00 }
+ },
+/* mul.l ${Dsp-24-u16},r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U16), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI, { 0x187df00 }
+ },
+/* mul.l ${Dsp-24-u24},r2r0 */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, ' ', OP (DSP_24_U24), ',', 'r', '2', 'r', '0', 0 } },
+ & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI, { 0x1879f00 }
+ },