+/* lf.sfune.d $rAD32F,$rBD32F */
+ {
+ OR1K_INSN_LF_SFUNE_D32, "lf-sfune-d32", "lf.sfune.d", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
+ },
+/* lf.sfugt.s $rASF,$rBSF */
+ {
+ OR1K_INSN_LF_SFUGT_S, "lf-sfugt-s", "lf.sfugt.s", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfugt.d $rADF,$rBDF */
+ {
+ OR1K_INSN_LF_SFUGT_D, "lf-sfugt-d", "lf.sfugt.d", 32,
+ { 0, { { { (1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfugt.d $rAD32F,$rBD32F */
+ {
+ OR1K_INSN_LF_SFUGT_D32, "lf-sfugt-d32", "lf.sfugt.d", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
+ },
+/* lf.sfuge.s $rASF,$rBSF */
+ {
+ OR1K_INSN_LF_SFUGE_S, "lf-sfuge-s", "lf.sfuge.s", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfuge.d $rADF,$rBDF */
+ {
+ OR1K_INSN_LF_SFUGE_D, "lf-sfuge-d", "lf.sfuge.d", 32,
+ { 0, { { { (1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfuge.d $rAD32F,$rBD32F */
+ {
+ OR1K_INSN_LF_SFUGE_D32, "lf-sfuge-d32", "lf.sfuge.d", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
+ },
+/* lf.sfult.s $rASF,$rBSF */
+ {
+ OR1K_INSN_LF_SFULT_S, "lf-sfult-s", "lf.sfult.s", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfult.d $rADF,$rBDF */
+ {
+ OR1K_INSN_LF_SFULT_D, "lf-sfult-d", "lf.sfult.d", 32,
+ { 0, { { { (1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfult.d $rAD32F,$rBD32F */
+ {
+ OR1K_INSN_LF_SFULT_D32, "lf-sfult-d32", "lf.sfult.d", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
+ },
+/* lf.sfule.s $rASF,$rBSF */
+ {
+ OR1K_INSN_LF_SFULE_S, "lf-sfule-s", "lf.sfule.s", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfule.d $rADF,$rBDF */
+ {
+ OR1K_INSN_LF_SFULE_D, "lf-sfule-d", "lf.sfule.d", 32,
+ { 0, { { { (1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfule.d $rAD32F,$rBD32F */
+ {
+ OR1K_INSN_LF_SFULE_D32, "lf-sfule-d32", "lf.sfule.d", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
+ },
+/* lf.sfun.s $rASF,$rBSF */
+ {
+ OR1K_INSN_LF_SFUN_S, "lf-sfun-s", "lf.sfun.s", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND)|(1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfun.d $rADF,$rBDF */
+ {
+ OR1K_INSN_LF_SFUN_D, "lf-sfun-d", "lf.sfun.d", 32,
+ { 0, { { { (1<<MACH_OR64)|(1<<MACH_OR64ND), 0 } } } }
+ },
+/* lf.sfun.d $rAD32F,$rBD32F */
+ {
+ OR1K_INSN_LF_SFUN_D32, "lf-sfun-d32", "lf.sfun.d", 32,
+ { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
+ },