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Power10 Set boolean extension
[deliverable/binutils-gdb.git]
/
opcodes
/
visium-dis.c
diff --git
a/opcodes/visium-dis.c
b/opcodes/visium-dis.c
index e72172f908d481dd9cae85904686df5b5ba44a13..851c5460c97eca10f5df9ccf41dace96884388b5 100644
(file)
--- a/
opcodes/visium-dis.c
+++ b/
opcodes/visium-dis.c
@@
-1,6
+1,6
@@
/* Single instruction disassembler for the Visium.
/* Single instruction disassembler for the Visium.
- Copyright (C) 2002-20
18
Free Software Foundation, Inc.
+ Copyright (C) 2002-20
20
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
This file is part of the GNU opcodes library.
@@
-94,7
+94,7
@@
disassem_class0 (disassemble_info *info, unsigned int ins)
/* BRR instruction. */
{
unsigned cbf = (ins >> 27) & 0x000f;
/* BRR instruction. */
{
unsigned cbf = (ins >> 27) & 0x000f;
- int displacement = ((in
t) (ins << 16)) >> 16
;
+ int displacement = ((in
s & 0xffff) ^ 0x8000) - 0x8000
;
if (ins == 0)
(*info->fprintf_func) (info->stream, "nop");
if (ins == 0)
(*info->fprintf_func) (info->stream, "nop");
@@
-166,7
+166,7
@@
disassem_class0 (disassemble_info *info, unsigned int ins)
}
return 0;
}
return 0;
-illegal_opcode:
+
illegal_opcode:
return -1;
}
return -1;
}
@@
-421,7
+421,7
@@
disassem_class1 (disassemble_info *info, unsigned int ins)
return 0;
return 0;
-illegal_opcode:
+
illegal_opcode:
return -1;
}
return -1;
}
@@
-518,7
+518,7
@@
disassem_class2 (disassemble_info *info, unsigned int ins)
return 0;
return 0;
-illegal_opcode:
+
illegal_opcode:
return -1;
}
return -1;
}
@@
-747,7
+747,7
@@
disassem_class3 (disassemble_info *info, unsigned int ins)
return 0;
return 0;
-illegal_opcode:
+
illegal_opcode:
return -1;
}
return -1;
}
@@
-789,7
+789,7
@@
print_insn_visium (bfd_vma addr, disassemble_info *info)
/* Get 32-bit instruction word. */
FETCH_DATA (info, buffer + 4);
/* Get 32-bit instruction word. */
FETCH_DATA (info, buffer + 4);
- ins = buffer[0] << 24;
+ ins =
(unsigned)
buffer[0] << 24;
ins |= buffer[1] << 16;
ins |= buffer[2] << 8;
ins |= buffer[3];
ins |= buffer[1] << 16;
ins |= buffer[2] << 8;
ins |= buffer[3];
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