- { XSTORMY16_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_RD, "f-Rd", 0, 32, 12, 4, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_RDM, "f-Rdm", 0, 32, 13, 3, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_RM, "f-Rm", 0, 32, 4, 3, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_RS, "f-Rs", 0, 32, 8, 4, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_RB, "f-Rb", 0, 32, 17, 3, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_RBJ, "f-Rbj", 0, 32, 11, 1, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP1, "f-op1", 0, 32, 0, 4, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP2, "f-op2", 0, 32, 4, 4, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP2A, "f-op2a", 0, 32, 4, 3, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP2M, "f-op2m", 0, 32, 7, 1, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP3, "f-op3", 0, 32, 8, 4, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP3A, "f-op3a", 0, 32, 8, 2, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP3B, "f-op3b", 0, 32, 8, 3, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP4, "f-op4", 0, 32, 12, 4, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP4M, "f-op4m", 0, 32, 12, 1, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP4B, "f-op4b", 0, 32, 15, 1, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP5, "f-op5", 0, 32, 16, 4, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP5A, "f-op5a", 0, 32, 16, 1, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_OP, "f-op", 0, 32, 0, 16, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_IMM2, "f-imm2", 0, 32, 10, 2, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_IMM3, "f-imm3", 0, 32, 4, 3, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_IMM3B, "f-imm3b", 0, 32, 17, 3, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_IMM4, "f-imm4", 0, 32, 8, 4, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_IMM8, "f-imm8", 0, 32, 8, 8, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_IMM12, "f-imm12", 0, 32, 20, 12, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_IMM16, "f-imm16", 0, 32, 16, 16, { 0|A(SIGN_OPT), { (1<<MACH_BASE) } } },
- { XSTORMY16_F_LMEM8, "f-lmem8", 0, 32, 8, 8, { 0|A(ABS_ADDR), { (1<<MACH_BASE) } } },
- { XSTORMY16_F_HMEM8, "f-hmem8", 0, 32, 8, 8, { 0|A(ABS_ADDR), { (1<<MACH_BASE) } } },
- { XSTORMY16_F_REL8_2, "f-rel8-2", 0, 32, 8, 8, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
- { XSTORMY16_F_REL8_4, "f-rel8-4", 0, 32, 8, 8, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
- { XSTORMY16_F_REL12, "f-rel12", 0, 32, 20, 12, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
- { XSTORMY16_F_REL12A, "f-rel12a", 0, 32, 4, 11, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
- { XSTORMY16_F_ABS24_1, "f-abs24-1", 0, 32, 8, 8, { 0, { (1<<MACH_BASE) } } },
- { XSTORMY16_F_ABS24_2, "f-abs24-2", 0, 32, 16, 16, { 0, { (1<<MACH_BASE) } } },
- { 0, 0, 0, 0, 0, 0, {0, {0}} }
+ { XSTORMY16_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_RD, "f-Rd", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_RDM, "f-Rdm", 0, 32, 13, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_RM, "f-Rm", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_RS, "f-Rs", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_RB, "f-Rb", 0, 32, 17, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_RBJ, "f-Rbj", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP1, "f-op1", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP2, "f-op2", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP2A, "f-op2a", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP2M, "f-op2m", 0, 32, 7, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP3, "f-op3", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP3A, "f-op3a", 0, 32, 8, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP3B, "f-op3b", 0, 32, 8, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP4, "f-op4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP4M, "f-op4m", 0, 32, 12, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP4B, "f-op4b", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP5, "f-op5", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP5A, "f-op5a", 0, 32, 16, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_OP, "f-op", 0, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_IMM2, "f-imm2", 0, 32, 10, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_IMM3, "f-imm3", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_IMM3B, "f-imm3b", 0, 32, 17, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_IMM4, "f-imm4", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_IMM8, "f-imm8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_IMM12, "f-imm12", 0, 32, 20, 12, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_IMM16, "f-imm16", 0, 32, 16, 16, { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_LMEM8, "f-lmem8", 0, 32, 8, 8, { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_HMEM8, "f-hmem8", 0, 32, 8, 8, { 0|A(ABS_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_REL8_2, "f-rel8-2", 0, 32, 8, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_REL8_4, "f-rel8-4", 0, 32, 8, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_REL12, "f-rel12", 0, 32, 20, 12, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_REL12A, "f-rel12a", 0, 32, 4, 11, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_ABS24_1, "f-abs24-1", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_ABS24_2, "f-abs24-2", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+ { XSTORMY16_F_ABS24, "f-abs24", 0, 0, 0, 0,{ 0|A(ABS_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+ { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }