Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[deliverable/linux.git] / arch / arm / boot / dts / exynos4412-trats2.dts

diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index dd9ac66770f705eb638335029de5c61bf6541f16..29231b4526433ef0fbae30e81d81088671dc3ac1 100644 (file)
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -543,6 +543,12 @@
                                        regulator-max-microamp = <2580000>;
                                };
                        };
+
+                       max77693_haptic {
+                               compatible = "maxim,max77693-haptic";
+                               haptic-supply = <&ldo26_reg>;
+                               pwms = <&pwm 0 38022 0>;
+                       };
                };
        };
 
@@ -563,6 +569,16 @@
                cap-mmc-highspeed;
        };
 
+       sdhci@12530000 {
+               bus-width = <4>;
+               cd-gpios = <&gpx3 4 0>;
+               cd-inverted;
+               pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
+               pinctrl-names = "default";
+               vmmc-supply = <&ldo21_reg>;
+               status = "okay";
+       };
+
        serial@13800000 {
                status = "okay";
        };
@@ -579,6 +595,11 @@
                status = "okay";
        };
 
+       tmu@100C0000 {
+               vtmu-supply = <&ldo10_reg>;
+               status = "okay";
+       };
+
        i2c_ak8975: i2c-gpio-0 {
                compatible = "i2c-gpio";
                gpios = <&gpy2 4 0>, <&gpy2 5 0>;
@@ -626,6 +647,13 @@
                };
        };
 
+       pwm: pwm@139D0000 {
+               pinctrl-0 = <&pwm0_out>;
+               pinctrl-names = "default";
+               samsung,pwm-outputs = <0>;
+               status = "okay";
+       };
+
        dsi_0: dsi@11C80000 {
                vddcore-supply = <&ldo8_reg>;
                vddio-supply = <&ldo10_reg>;
@@ -691,28 +719,51 @@
                pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
                pinctrl-names = "default";
                status = "okay";
+               assigned-clocks = <&clock CLK_MOUT_CAM0>,
+                                 <&clock CLK_MOUT_CAM1>;
+               assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>,
+                                        <&clock CLK_MOUT_MPLL_USER_T>;
 
                fimc_0: fimc@11800000 {
                        status = "okay";
+                       assigned-clocks = <&clock CLK_MOUT_FIMC0>,
+                                       <&clock CLK_SCLK_FIMC0>;
+                       assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
+                       assigned-clock-rates = <0>, <176000000>;
                };
 
                fimc_1: fimc@11810000 {
                        status = "okay";
+                       assigned-clocks = <&clock CLK_MOUT_FIMC1>,
+                                       <&clock CLK_SCLK_FIMC1>;
+                       assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
+                       assigned-clock-rates = <0>, <176000000>;
                };
 
                fimc_2: fimc@11820000 {
                        status = "okay";
+                       assigned-clocks = <&clock CLK_MOUT_FIMC2>,
+                                       <&clock CLK_SCLK_FIMC2>;
+                       assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
+                       assigned-clock-rates = <0>, <176000000>;
                };
 
                fimc_3: fimc@11830000 {
                        status = "okay";
+                       assigned-clocks = <&clock CLK_MOUT_FIMC3>,
+                                       <&clock CLK_SCLK_FIMC3>;
+                       assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
+                       assigned-clock-rates = <0>, <176000000>;
                };
 
                csis_0: csis@11880000 {
                        status = "okay";
                        vddcore-supply = <&ldo8_reg>;
                        vddio-supply = <&ldo10_reg>;
-                       clock-frequency = <176000000>;
+                       assigned-clocks = <&clock CLK_MOUT_CSIS0>,
+                                       <&clock CLK_SCLK_CSIS0>;
+                       assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
+                       assigned-clock-rates = <0>, <176000000>;
 
                        /* Camera C (3) MIPI CSI-2 (CSIS0) */
                        port@3 {
@@ -726,10 +777,13 @@
                };
 
                csis_1: csis@11890000 {
+                       status = "okay";
                        vddcore-supply = <&ldo8_reg>;
                        vddio-supply = <&ldo10_reg>;
-                       clock-frequency = <160000000>;
-                       status = "okay";
+                       assigned-clocks = <&clock CLK_MOUT_CSIS1>,
+                                       <&clock CLK_SCLK_CSIS1>;
+                       assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
+                       assigned-clock-rates = <0>, <176000000>;
 
                        /* Camera D (4) MIPI CSI-2 (CSIS1) */
                        port@4 {