Merge remote-tracking branches 'regulator/fix/as3722', 'regulator/fix/ltc3589' and...

[deliverable/linux.git] / arch / arm / boot / dts / imx27-phytec-phycore-som.dtsi

diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
index cefaa6994623f2a135aa7c74b65680a8a11b27dd..31e9f7049f73351f325c3e58b1fb6e4e116763df 100644 (file)
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
@@ -41,6 +41,20 @@
                        regulator-max-microvolt = <5000000>;
                };
        };
+
+       usbphy {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               usbphy0: usbphy@0 {
+                       compatible = "usb-nop-xceiv";
+                       reg = <0>;
+                       vcc-supply = <&sw3_reg>;
+                       clocks = <&clks 0>;
+                       clock-names = "main_clk";
+               };
+       };
 };
 
 &audmux {
@@ -66,9 +80,9 @@
        status = "okay";
 
        pmic: mc13783@0 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "fsl,mc13783";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pmic>;
                reg = <0>;
                spi-cs-high;
                spi-max-frequency = <20000000>;
@@ -166,7 +180,7 @@
 
 &fec {
        phy-mode = "mii";
-       phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
+       phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
        phy-supply = <&reg_3v3>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_fec1>;
@@ -204,7 +218,6 @@
                                MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
                                MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
                                MX27_PAD_CSPI1_SS0__GPIO4_28    0x0 /* SPI1 CS0 */
-                               MX27_PAD_USB_PWR__GPIO2_23      0x0 /* PMIC IRQ */
                        >;
                };
 
@@ -251,6 +264,21 @@
                        >;
                };
 
+               pinctrl_pmic: pmicgrp {
+                       fsl,pins = <
+                               MX27_PAD_USB_PWR__GPIO2_23      0x0 /* PMIC IRQ */
+                       >;
+               };
+
+               pinctrl_ssi1: ssi1grp {
+                       fsl,pins = <
+                               MX27_PAD_SSI1_FS__SSI1_FS 0x0
+                               MX27_PAD_SSI1_RXDAT__SSI1_RXDAT 0x0
+                               MX27_PAD_SSI1_TXDAT__SSI1_TXDAT 0x0
+                               MX27_PAD_SSI1_CLK__SSI1_CLK 0x0
+                       >;
+               };
+
                pinctrl_usbotg: usbotggrp {
                        fsl,pins = <
                                MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
@@ -279,23 +307,28 @@
        status = "okay";
 };
 
+&ssi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ssi1>;
+       fsl,mode = "i2s-slave";
+       status = "okay";
+};
+
 &usbotg {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usbotg>;
        dr_mode = "otg";
        phy_type = "ulpi";
+       fsl,usbphy = <&usbphy0>;
        vbus-supply = <&sw3_reg>;
+       disable-over-current;
        status = "okay";
 };
 
-&usbphy0 {
-       vcc-supply = <&sw3_reg>;
-};
-
 &weim {
        status = "okay";
 
-       nor: nor@c0000000 {
+       nor: nor@0,0 {
                compatible = "cfi-flash";
                reg = <0 0x00000000 0x02000000>;
                bank-width = <2>;
@@ -305,7 +338,7 @@
                #size-cells = <1>;
        };
 
-       sram: sram@c8000000 {
+       sram: sram@1,0 {
                compatible = "mtd-ram";
                reg = <1 0x00000000 0x00800000>;
                bank-width = <2>;