ARM i.MX6q: Add LDB device to device tree

[deliverable/linux.git] / arch / arm / boot / dts / imx6qdl.dtsi

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 06ec460b4581c4163e4053953e84acfaad01a76b..804c0ec3239966a6ccafdbd94f831a07efa67c00 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -10,7 +10,7 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
 
 / {
        aliases {
@@ -101,6 +101,11 @@
                        cache-level = <2>;
                };
 
+               pmu {
+                       compatible = "arm,cortex-a9-pmu";
+                       interrupts = <0 94 0x04>;
+               };
+
                aips-bus@02000000 { /* AIPS1 */
                        compatible = "fsl,aips-bus", "simple-bus";
                        #address-cells = <1>;
@@ -277,6 +282,8 @@
                                compatible = "fsl,imx6q-gpt";
                                reg = <0x02098000 0x4000>;
                                interrupts = <0 55 0x04>;
+                               clocks = <&clks 119>, <&clks 120>;
+                               clock-names = "ipg", "per";
                        };
 
                        gpio1: gpio@0209c000 {
@@ -529,6 +536,26 @@
                                reg = <0x020e0000 0x38>;
                        };
 
+                       ldb: ldb@020e0008 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
+                               gpr = <&gpr>;
+                               status = "disabled";
+
+                               lvds-channel@0 {
+                                       reg = <0>;
+                                       crtcs = <&ipu1 0>;
+                                       status = "disabled";
+                               };
+
+                               lvds-channel@1 {
+                                       reg = <1>;
+                                       crtcs = <&ipu1 1>;
+                                       status = "disabled";
+                               };
+                       };
+
                        dcic1: dcic@020e4000 {
                                reg = <0x020e4000 0x4000>;
                                interrupts = <0 124 0x04>;