Merge branch 'for-linus' of git://git.kernel.dk/linux-block

[deliverable/linux.git] / arch / arm / boot / dts / sun8i-h3.dtsi

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 1524130e43c94c97097b7389dd3951459a1af7ee..dadb7f60c06237054a22e9ec247a0d05126f75f6 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -276,6 +276,33 @@
                        clocks = <&osc24M>, <&pll6 1>, <&pll5>;
                        clock-output-names = "mbus";
                };
+
+               apb0: apb0_clk {
+                       compatible = "fixed-factor-clock";
+                       #clock-cells = <0>;
+                       clock-div = <1>;
+                       clock-mult = <1>;
+                       clocks = <&osc24M>;
+                       clock-output-names = "apb0";
+               };
+
+               apb0_gates: clk@01f01428 {
+                       compatible = "allwinner,sun8i-h3-apb0-gates-clk",
+                                    "allwinner,sun4i-a10-gates-clk";
+                       reg = <0x01f01428 0x4>;
+                       #clock-cells = <1>;
+                       clocks = <&apb0>;
+                       clock-indices = <0>, <1>;
+                       clock-output-names = "apb0_pio", "apb0_ir";
+               };
+
+               ir_clk: ir_clk@01f01454 {
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       reg = <0x01f01454 0x4>;
+                       #clock-cells = <0>;
+                       clocks = <&osc32k>, <&osc24M>;
+                       clock-output-names = "ir";
+               };
        };
 
        soc {
@@ -359,7 +386,7 @@
                        gpio-controller;
                        #gpio-cells = <3>;
                        interrupt-controller;
-                       #interrupt-cells = <2>;
+                       #interrupt-cells = <3>;
 
                        uart0_pins_a: uart0@0 {
                                allwinner,pins = "PA4", "PA5";
@@ -493,5 +520,40 @@
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                };
+
+               apb0_reset: reset@01f014b0 {
+                       reg = <0x01f014b0 0x4>;
+                       compatible = "allwinner,sun6i-a31-clock-reset";
+                       #reset-cells = <1>;
+               };
+
+               ir: ir@01f02000 {
+                       compatible = "allwinner,sun5i-a13-ir";
+                       clocks = <&apb0_gates 1>, <&ir_clk>;
+                       clock-names = "apb", "ir";
+                       resets = <&apb0_reset 1>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       reg = <0x01f02000 0x40>;
+                       status = "disabled";
+               };
+
+               r_pio: pinctrl@01f02c00 {
+                       compatible = "allwinner,sun8i-h3-r-pinctrl";
+                       reg = <0x01f02c00 0x400>;
+                       interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&apb0_gates 0>;
+                       resets = <&apb0_reset 0>;
+                       gpio-controller;
+                       #gpio-cells = <3>;
+                       interrupt-controller;
+                       #interrupt-cells = <3>;
+
+                       ir_pins_a: ir@0 {
+                               allwinner,pins = "PL11";
+                               allwinner,function = "s_cir_rx";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+               };
        };
 };