ARM: shmobile: r8a7790: tidyup SDHI register size on DTSI

[deliverable/linux.git] / arch / arm / boot / dts / zynq-7000.dtsi

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index ee3e5d675b053fca340ec8a3ca98c0cc012f044c..a5cd2eda3edf4fdb4d616999532d8f94da2d7bd3 100644 (file)
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -237,7 +237,7 @@
                slcr: slcr@f8000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       compatible = "xlnx,zynq-slcr", "syscon";
+                       compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
                        reg = <0xF8000000 0x1000>;
                        ranges;
                        clkc: clkc@100 {
@@ -257,6 +257,12 @@
                                                "dbg_trc", "dbg_apb";
                                reg = <0x100 0x100>;
                        };
+
+                       pinctrl0: pinctrl@700 {
+                               compatible = "xlnx,pinctrl-zynq";
+                               reg = <0x700 0x200>;
+                               syscon = <&slcr>;
+                       };
                };
 
                dmac_s: dmac@f8003000 {
@@ -314,14 +320,32 @@
                        clocks = <&clkc 4>;
                };
 
+               usb0: usb@e0002000 {
+                       compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
+                       status = "disabled";
+                       clocks = <&clkc 28>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <0 21 4>;
+                       reg = <0xe0002000 0x1000>;
+                       phy_type = "ulpi";
+               };
+
+               usb1: usb@e0003000 {
+                       compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
+                       status = "disabled";
+                       clocks = <&clkc 29>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <0 44 4>;
+                       reg = <0xe0003000 0x1000>;
+                       phy_type = "ulpi";
+               };
+
                watchdog0: watchdog@f8005000 {
                        clocks = <&clkc 45>;
-                       compatible = "xlnx,zynq-wdt-r1p2";
-                       device_type = "watchdog";
+                       compatible = "cdns,wdt-r1p2";
                        interrupt-parent = <&intc>;
                        interrupts = <0 9 1>;
                        reg = <0xf8005000 0x1000>;
-                       reset = <0>;
                        timeout-sec = <10>;
                };
        };