ARM/ARM64: arch_timer: add macros for bits in control register

[deliverable/linux.git] / arch / arm64 / include / asm / arch_timer.h

diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index 98abd476992db38b3acb227393a3e856cefa648e..2b9722f42729e2eaf80d011e59776dc7747f415d 100644 (file)
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -26,7 +26,13 @@
 
 #include <clocksource/arm_arch_timer.h>
 
-static inline void arch_timer_reg_write(int access, int reg, u32 val)
+/*
+ * These register accessors are marked inline so the compiler can
+ * nicely work out which register we want, and chuck away the rest of
+ * the code.
+ */
+static __always_inline
+void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
 {
        if (access == ARCH_TIMER_PHYS_ACCESS) {
                switch (reg) {
@@ -36,8 +42,6 @@ static inline void arch_timer_reg_write(int access, int reg, u32 val)
                case ARCH_TIMER_REG_TVAL:
                        asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
                        break;
-               default:
-                       BUILD_BUG();
                }
        } else if (access == ARCH_TIMER_VIRT_ACCESS) {
                switch (reg) {
@@ -47,17 +51,14 @@ static inline void arch_timer_reg_write(int access, int reg, u32 val)
                case ARCH_TIMER_REG_TVAL:
                        asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
                        break;
-               default:
-                       BUILD_BUG();
                }
-       } else {
-               BUILD_BUG();
        }
 
        isb();
 }
 
-static inline u32 arch_timer_reg_read(int access, int reg)
+static __always_inline
+u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
 {
        u32 val;
 
@@ -69,8 +70,6 @@ static inline u32 arch_timer_reg_read(int access, int reg)
                case ARCH_TIMER_REG_TVAL:
                        asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
                        break;
-               default:
-                       BUILD_BUG();
                }
        } else if (access == ARCH_TIMER_VIRT_ACCESS) {
                switch (reg) {
@@ -80,11 +79,7 @@ static inline u32 arch_timer_reg_read(int access, int reg)
                case ARCH_TIMER_REG_TVAL:
                        asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));
                        break;
-               default:
-                       BUILD_BUG();
                }
-       } else {
-               BUILD_BUG();
        }
 
        return val;
@@ -101,12 +96,16 @@ static inline void arch_counter_set_user_access(void)
 {
        u32 cntkctl;
 
-       /* Disable user access to the timers and the physical counter. */
        asm volatile("mrs       %0, cntkctl_el1" : "=r" (cntkctl));
-       cntkctl &= ~((3 << 8) | (1 << 0));
 
-       /* Enable user access to the virtual counter and frequency. */
-       cntkctl |= (1 << 1);
+       /* Disable user access to the timers and the physical counter */
+       cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
+                       | ARCH_TIMER_USR_VT_ACCESS_EN
+                       | ARCH_TIMER_USR_PCT_ACCESS_EN);
+
+       /* Enable user access to the virtual counter */
+       cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN;
+
        asm volatile("msr       cntkctl_el1, %0" : : "r" (cntkctl));
 }