always reserve elfcore header memory in crash kernel

[deliverable/linux.git] / arch / ia64 / kernel / setup.c

diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 593279f33e96e71fae02c6c335f20d2b699e23c6..916ba898237f27a6eca8d5b79cc92cce86b716f1 100644 (file)
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -352,7 +352,7 @@ reserve_memory (void)
        }
 #endif
 
-#ifdef CONFIG_PROC_VMCORE
+#ifdef CONFIG_CRASH_KERNEL
        if (reserve_elfcorehdr(&rsvd_region[n].start,
                               &rsvd_region[n].end) == 0)
                n++;
@@ -478,7 +478,12 @@ static __init int setup_nomca(char *s)
 }
 early_param("nomca", setup_nomca);
 
-#ifdef CONFIG_PROC_VMCORE
+/*
+ * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
+ * is_kdump_kernel() to determine if we are booting after a panic. Hence
+ * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
+ */
+#ifdef CONFIG_CRASH_DUMP
 /* elfcorehdr= specifies the location of elf core header
  * stored by the crashed kernel.
  */
@@ -502,11 +507,11 @@ int __init reserve_elfcorehdr(unsigned long *start, unsigned long *end)
         * to work properly.
         */
 
-       if (elfcorehdr_addr >= ELFCORE_ADDR_MAX)
+       if (!is_vmcore_usable())
                return -EINVAL;
 
        if ((length = vmcore_find_descriptor_size(elfcorehdr_addr)) == 0) {
-               elfcorehdr_addr = ELFCORE_ADDR_MAX;
+               vmcore_unusable();
                return -EINVAL;
        }
 
@@ -616,7 +621,9 @@ setup_arch (char **cmdline_p)
                ia64_mca_init();
 
        platform_setup(cmdline_p);
+#ifndef CONFIG_IA64_HP_SIM
        check_sal_cache_flush();
+#endif
        paging_init();
 }
 
@@ -927,17 +934,19 @@ cpu_init (void)
        if (smp_processor_id() == 0) {
                cpu_set(0, per_cpu(cpu_sibling_map, 0));
                cpu_set(0, cpu_core_map[0]);
+       } else {
+               /*
+                * Set ar.k3 so that assembly code in MCA handler can compute
+                * physical addresses of per cpu variables with a simple:
+                *   phys = ar.k3 + &per_cpu_var
+                * and the alt-dtlb-miss handler can set per-cpu mapping into
+                * the TLB when needed. head.S already did this for cpu0.
+                */
+               ia64_set_kr(IA64_KR_PER_CPU_DATA,
+                           ia64_tpa(cpu_data) - (long) __per_cpu_start);
        }
 #endif
 
-       /*
-        * We set ar.k3 so that assembly code in MCA handler can compute
-        * physical addresses of per cpu variables with a simple:
-        *   phys = ar.k3 + &per_cpu_var
-        */
-       ia64_set_kr(IA64_KR_PER_CPU_DATA,
-                   ia64_tpa(cpu_data) - (long) __per_cpu_start);
-
        get_max_cacheline_size();
 
        /*