Merge tag 'regulator-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...

[deliverable/linux.git] / arch / mips / include / asm / processor.h

diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 1470b7b68b0e98996d271b25b86584fb6f3261a5..3605b844ad873b72f0881fbd48de0e8c7a3538a7 100644 (file)
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -137,7 +137,7 @@ union mips_watch_reg_state {
        struct mips3264_watch_reg_state mips3264;
 };
 
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
+#if defined(CONFIG_CPU_CAVIUM_OCTEON)
 
 struct octeon_cop2_state {
        /* DMFC2 rt, 0x0201 */
@@ -182,13 +182,26 @@ struct octeon_cop2_state {
        /* DMFC2 rt, 0x025A; DMFC2 rt, 0x025B - Pass2 */
        unsigned long   cop2_gfm_result[2];
 };
-#define INIT_OCTEON_COP2 {0,}
+#define COP2_INIT                                              \
+       .cp2                    = {0,},
 
 struct octeon_cvmseg_state {
        unsigned long cvmseg[CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE]
                            [cpu_dcache_line_size() / sizeof(unsigned long)];
 };
 
+#elif defined(CONFIG_CPU_XLP)
+struct nlm_cop2_state {
+       u64     rx[4];
+       u64     tx[4];
+       u32     tx_msg_status;
+       u32     rx_msg_status;
+};
+
+#define COP2_INIT                                              \
+       .cp2                    = {{0}, {0}, 0, 0},
+#else
+#define COP2_INIT
 #endif
 
 typedef struct {
@@ -231,8 +244,11 @@ struct thread_struct {
        unsigned long cp0_baduaddr;     /* Last kernel fault accessing USEG */
        unsigned long error_code;
 #ifdef CONFIG_CPU_CAVIUM_OCTEON
-    struct octeon_cop2_state cp2 __attribute__ ((__aligned__(128)));
-    struct octeon_cvmseg_state cvmseg __attribute__ ((__aligned__(128)));
+       struct octeon_cop2_state cp2 __attribute__ ((__aligned__(128)));
+       struct octeon_cvmseg_state cvmseg __attribute__ ((__aligned__(128)));
+#endif
+#ifdef CONFIG_CPU_XLP
+       struct nlm_cop2_state cp2;
 #endif
        struct mips_abi *abi;
 };
@@ -245,13 +261,6 @@ struct thread_struct {
 #define FPAFF_INIT
 #endif /* CONFIG_MIPS_MT_FPAFF */
 
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
-#define OCTEON_INIT                                            \
-       .cp2                    = INIT_OCTEON_COP2,
-#else
-#define OCTEON_INIT
-#endif /* CONFIG_CPU_CAVIUM_OCTEON */
-
 #define INIT_THREAD  {                                         \
        /*                                                      \
         * Saved main processor registers                       \
@@ -300,9 +309,9 @@ struct thread_struct {
        .cp0_baduaddr           = 0,                            \
        .error_code             = 0,                            \
        /*                                                      \
-        * Cavium Octeon specifics (null if not Octeon)         \
+        * Platform specific cop2 registers(null if no COP2)    \
         */                                                     \
-       OCTEON_INIT                                             \
+       COP2_INIT                                               \
 }
 
 struct task_struct;