PCI: mips: use generic pci_swizzle_interrupt_pin()

[deliverable/linux.git] / arch / mips / pci / pci.c

diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index a377e9d2d029be681072a265908ba7f0f9a2dd17..fa63dc25125d0c46b46cd2b0fbce0676f97900f4 100644 (file)
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -149,19 +149,12 @@ out:
               "Skipping PCI bus scan due to resource conflict\n");
 }
 
-/* Most MIPS systems have straight-forward swizzling needs.  */
-
-static inline u8 bridge_swizzle(u8 pin, u8 slot)
-{
-       return (((pin - 1) + slot) % 4) + 1;
-}
-
 static u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
 {
        u8 pin = *pinp;
 
        while (dev->bus->parent) {
-               pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
+               pin = pci_swizzle_interrupt_pin(dev, pin);
                /* Move up the chain of bridges. */
                dev = dev->bus->self;
         }
@@ -354,6 +347,30 @@ EXPORT_SYMBOL(PCIBIOS_MIN_IO);
 EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
 #endif
 
+int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+                       enum pci_mmap_state mmap_state, int write_combine)
+{
+       unsigned long prot;
+
+       /*
+        * I/O space can be accessed via normal processor loads and stores on
+        * this platform but for now we elect not to do this and portable
+        * drivers should not do this anyway.
+        */
+       if (mmap_state == pci_mmap_io)
+               return -EINVAL;
+
+       /*
+        * Ignore write-combine; for now only return uncached mappings.
+        */
+       prot = pgprot_val(vma->vm_page_prot);
+       prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
+       vma->vm_page_prot = __pgprot(prot);
+
+       return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+               vma->vm_end - vma->vm_start, vma->vm_page_prot);
+}
+
 char * (*pcibios_plat_setup)(char *str) __devinitdata;
 
 char *__devinit pcibios_setup(char *str)