Merge branch 'sh/dmaengine'

[deliverable/linux.git] / arch / sh / kernel / cpu / sh4a / setup-sh7780.c

diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index c310558490d590a52ffa5e1cbdb7055ca3d09fae..f8f21618d78597f9b3a7b1ca352abb9b6a4d0ce7 100644 (file)
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -461,17 +461,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
        /* disable IRQ7-0 */
-       ctrl_outl(0xff000000, INTC_INTMSK0);
+       __raw_writel(0xff000000, INTC_INTMSK0);
 
        /* disable IRL3-0 + IRL7-4 */
-       ctrl_outl(0xc0000000, INTC_INTMSK1);
-       ctrl_outl(0xfffefffe, INTC_INTMSK2);
+       __raw_writel(0xc0000000, INTC_INTMSK1);
+       __raw_writel(0xfffefffe, INTC_INTMSK2);
 
        /* select IRL mode for IRL3-0 + IRL7-4 */
-       ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+       __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
        /* disable holding function, ie enable "SH-4 Mode" */
-       ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+       __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
        register_intc_controller(&intc_desc);
 }
@@ -481,27 +481,27 @@ void __init plat_irq_setup_pins(int mode)
        switch (mode) {
        case IRQ_MODE_IRQ:
                /* select IRQ mode for IRL3-0 + IRL7-4 */
-               ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+               __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                register_intc_controller(&intc_irq_desc);
                break;
        case IRQ_MODE_IRL7654:
                /* enable IRL7-4 but don't provide any masking */
-               ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-               ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+               __raw_writel(0x40000000, INTC_INTMSKCLR1);
+               __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                break;
        case IRQ_MODE_IRL3210:
                /* enable IRL0-3 but don't provide any masking */
-               ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-               ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+               __raw_writel(0x80000000, INTC_INTMSKCLR1);
+               __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                break;
        case IRQ_MODE_IRL7654_MASK:
                /* enable IRL7-4 and mask using cpu intc controller */
-               ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+               __raw_writel(0x40000000, INTC_INTMSKCLR1);
                register_intc_controller(&intc_irl7654_desc);
                break;
        case IRQ_MODE_IRL3210_MASK:
                /* enable IRL0-3 and mask using cpu intc controller */
-               ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+               __raw_writel(0x80000000, INTC_INTMSKCLR1);
                register_intc_controller(&intc_irl3210_desc);
                break;
        default: