RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2

[deliverable/binutils-gdb.git] / bfd / ChangeLog

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+2017-10-24  Andrew Waterman  <andrew@sifive.com>
+
+       * elfnn-riscv.c (_bfd_riscv_relax_lui): Don't relax to c.lui
+       when rd is x0.
+
 2017-10-24  Renlin Li  <renlin.li@arm.com>
 
        PR ld/21703