+2021-03-12 Clément Chigot <clement.chigot@atos.net>
+
+ * reloc.c (BFD_RELOC_PPC_TOC16_HI, BFD_RELOC_PPC_TOC16_LO):
+ New relocations.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+ * coff-rs6000.c (xcoff_calculate_relocation): Call
+ xcoff_reloc_type_toc for R_TOCU and R_TOCL.
+ (xcoff_howto_table): Remove src_mask for TOC relocations.
+ Add R_TOCU and R_TOCL howtos.
+ (_bfd_xcoff_reloc_type_lookup): Add cases for
+ BFD_RELOC_PPC_TOC16_HI and BFD_RELOC_PPC_TOC16_LO.
+ (xcoff_reloc_type_toc): Compute the whole offset.
+ Implement R_TOCU and R_TOCL.
+ * coff64-rs6000.c (xcoff64_calculate_relocation):
+ Likewise.
+ (xcoff64_howto_table): Likewise.
+ (xcoff64_reloc_type_lookup): Likewise.
+
+2021-03-12 Clément Chigot <clement.chigot@atos.net>
+
+ * coff-rs6000.c (xcoff_calculate_relocation): Correct and
+ add new relocations.
+ (xcoff_howto_table): Likewise.
+ (xcoff_rtype2howto): Increase r_type maximum value.
+ (xcoff_ppc_relocate_section): Reuse predefined HOWTOs instead
+ of create a new one from scratch. Enable only some relocations
+ to have a changing r_size.
+ * coff64-rs6000.c (xcoff64_calculate_relocation): Likewise.
+ (xcoff64_howto_table): Likewise.
+ (xcoff64_rtype2howto): Likewise.
+ (xcoff64_ppc_relocate_section): Likewise.
+ * libxcoff.h (XCOFF_MAX_CALCULATE_RELOCATION): Fix value.
+
+2021-03-12 Clément Chigot <clement.chigot@atos.net>
+
+ * coff64-rs6000.c (xcoff64_ppc_relocate_section): Move.
+
+2021-03-12 Clément Chigot <clement.chigot@atos.net>
+
+ * coff64-rs6000.c (xcoff64_write_object_contents): Remove.
+ * coffcode.h (coff_write_object_contents): Add bfd_mach_ppc_620
+ support for o_cputype field. Avoid creating an empty a.out header
+ for XCOFF64.
+
+2021-03-12 Clément Chigot <clement.chigot@atos.net>
+
+ * coff64-rs6000.c (xcoff64_create_csect_from_smclas): Add
+ missing smclass.
+
+2021-03-11 Nelson Chu <nelson.chu@sifive.com>
+
+ * elfnn-riscv.c (riscv_elf_link_hash_table): New boolean
+ restart_relax, used to check if we need to run the whole
+ relaxations from relax pass 0 to 2 again.
+ (riscv_elf_link_hash_table_create): Init restart_relax to FALSE.
+ (_bfd_riscv_relax_align): Remove obsolete sec_flg0 set.
+ (_bfd_riscv_relax_delete): Set again to TRUE if we do delete the code.
+ (bfd_elfNN_riscv_restart_relax_sections): New function. Called by
+ after_allocation to check if we need to run the whole relaxations again.
+ (_bfd_riscv_relax_section): We will only enter into the relax pass 3
+ when the restart_relax is FALSE; At last set restart_relax to TRUE if
+ again is TRUE, too.
+ * elfxx-riscv.h (bfd_elf32_riscv_restart_relax_sections): Declaration.
+ (bfd_elf64_riscv_restart_relax_sections): Likewise.
+
+2021-03-10 Jan Beulich <jbeulich@suse.com>
+
+ * cofflink.c (_bfd_coff_write_global_sym): Range-check symbol
+ offset.
+
+2021-03-10 Alan Modra <amodra@gmail.com>
+ Jan Beulich <jbeulich@suse.com>
+
+ * elf.c (bfd_elf_generic_reloc): Make references between debug
+ sections use section relative values.
+
+2021-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Diagnose out of range RVA.
+
+2021-03-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/27425
+ PR ld/27432
+ * bfd.c (_bfd_get_link_info): New function.
+ * elf-bfd.h (output_elf_obj_tdata): Add link_info.
+ (elf_link_info): New.
+ * libbfd-in.h (_bfd_get_link_info): New prototype.
+ * coff-x86_64.c (coff_amd64_reloc): Also subtract __ImageBase for
+ R_AMD64_IMAGEBASE when generating x86-64 ELF executable.
+ * pe-x86_64.c: Include "coff/internal.h" and "libcoff.h".
+ (pex64_link_add_symbols): New function.
+ (coff_bfd_link_add_symbols): New macro.
+ * libbfd.h: Regenerated.
+
+2021-03-05 Craig Blackmore <craig.blackmore@embecosm.com>
+ Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * elf-bfd.h (elfcore_write_riscv_csr): Declare.
+ * elf.c (elfcore_grok_riscv_csr): New function.
+ (elfcore_grok_note): Handle NT_RISCV_CSR.
+ (elfcore_write_riscv_csr): New function.
+ (elfcore_write_register_note): Handle '.reg-riscv-csr'.
+
+2021-03-05 Craig Blackmore <craig.blackmore@embecosm.com>
+ Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * elfnn-riscv.c (PRPSINFO_PR_FNAME_LENGTH): Define.
+ (PRPSINFO_PR_PSARGS_LENGTH): Define.
+ (riscv_write_core_note): New function.
+ (riscv_elf_grok_psinfo): Make use of two new length defines.
+ (elf_backend_write_core_note): Define.
+
+2021-03-05 Craig Blackmore <craig.blackmore@embecosm.com>
+ Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * elf-bfd.h (elfcore_write_gdb_tdesc): Declare new function.
+ * elf.c (elfcore_grok_gdb_tdesc): New function.
+ (elfcore_grok_note): Handle NT_GDB_TDESC.
+ (elfcore_write_gdb_tdesc): New function.
+ (elfcore_write_register_note): Handle NT_GDB_TDESC.
+
+2021-03-05 Nick Clifton <nickc@redhat.com>
+
+ PR 27521
+ * dwarf2.c (is_str_attr): Add DW_FORM_strx* forms.
+ (read_indexed_string): Placeholder function.
+ (read_attribute_value): Handle DW_FORM_strx* and DW_FORM_addrx*
+ forms.
+
+2021-03-05 Alan Modra <amodra@gmail.com>
+
+ * reloc.c (bfd_perform_relocation): Revert 2021-01-12 and
+ 2020-09-16 changes.
+ * coff-x86_64.c (coff_amd64_reloc): Do more or less the same
+ adjustments here instead. Separate pc-relative adjustments
+ from symbol related adjustments. Tidy comments and formatting.
+
+2021-03-04 Jan Beulich <jbeulich@suse.com>
+
+ * coffcode.h (sec_to_styp_flags): Don't set IMAGE_SCN_LNK_* in
+ final PE images.
+
+2021-03-04 Alan Modra <amodra@gmail.com>
+
+ * rs6000-core.c (rs6000coff_core_p): Correct prototype.
+
+2021-03-03 Alan Modra <amodra@gmail.com>
+
+ PR 27500
+ * elflink.c (_bfd_elf_gc_mark_rsec): Do special start/stop
+ processing not when start/stop symbol section is unmarked but
+ on first time a start/stop symbol is processed.
+
+2021-03-03 Alan Modra <amodra@gmail.com>
+
+ * reloc.c: Include x86_64.h rather than internal.h.
+
2021-03-02 Nick Clifton <nickc@redhat.com>
PR 27484