/* BFD library support routines for architectures.
- Copyright (C) 1990, 91-97, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1990, 91, 92, 93, 94, 95, 96, 97, 98, 1999, 2000
+ Free Software Foundation, Inc.
Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
.#define bfd_mach_sparc_v9_p(mach) \
. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a)
. bfd_arch_mips, {* MIPS Rxxxx *}
-. {* start-sanitize-tx19 *}
-.#define bfd_mach_mips1900 1900
-. {* end-sanitize-tx19 *}
.#define bfd_mach_mips3000 3000
.#define bfd_mach_mips3900 3900
.#define bfd_mach_mips4000 4000
.#define bfd_mach_mips4010 4010
.#define bfd_mach_mips4100 4100
-. {* start-sanitize-vr4xxx *}
-.#define bfd_mach_mips4121 4121
-. {* end-sanitize-vr4xxx *}
+.#define bfd_mach_mips4111 4111
.#define bfd_mach_mips4300 4300
.#define bfd_mach_mips4400 4400
.#define bfd_mach_mips4600 4600
.#define bfd_mach_mips4650 4650
-. {* start-sanitize-vr4320 *}
-.#define bfd_mach_mips4320 4320
-. {* end-sanitize-vr4320 *}
-. {* start-sanitize-tx49 *}
-.#define bfd_mach_mips4900 4900
-. {* end-sanitize-tx49 *}
.#define bfd_mach_mips5000 5000
-. {* start-sanitize-cygnus *}
-.#define bfd_mach_mips5400 5400
-. {* end-sanitize-cygnus *}
-. {* start-sanitize-r5900 *}
-.#define bfd_mach_mips5900 5900
-. {* end-sanitize-r5900 *}
.#define bfd_mach_mips6000 6000
.#define bfd_mach_mips8000 8000
.#define bfd_mach_mips10000 10000
.#define bfd_mach_mips16 16
-. {* start-sanitize-sky *}
-. {* The DVP is a machine within the mips architecture. *}
-.#define bfd_mach_dvp_dma 42000
-.#define bfd_mach_dvp_vif 42001
-.#define bfd_mach_dvp_vu 42002
-.#define bfd_mach_dvp_gif 42003
-.#define bfd_mach_dvp_p(mach) ((mach) >= 42000 && (mach) <= 42003)
-. {* end-sanitize-sky *}
. bfd_arch_i386, {* Intel 386 *}
.#define bfd_mach_i386_i386 0
.#define bfd_mach_i386_i8086 1
+.#define bfd_mach_i386_i386_intel_syntax 2
. bfd_arch_we32k, {* AT&T WE32xxx *}
. bfd_arch_tahoe, {* CCI/Harris Tahoe *}
. bfd_arch_i860, {* Intel 860 *}
+. bfd_arch_i370, {* IBM 360/370 Mainframes *}
. bfd_arch_romp, {* IBM ROMP PC/RT *}
. bfd_arch_alliant, {* Alliant *}
. bfd_arch_convex, {* Convex *}
. bfd_arch_rs6000, {* IBM RS/6000 *}
. bfd_arch_hppa, {* HP PA RISC *}
. bfd_arch_d10v, {* Mitsubishi D10V *}
+.#define bfd_mach_d10v 0
+.#define bfd_mach_d10v_ts2 2
+.#define bfd_mach_d10v_ts3 3
. bfd_arch_d30v, {* Mitsubishi D30V *}
. bfd_arch_z8k, {* Zilog Z8000 *}
.#define bfd_mach_z8001 1
. bfd_arch_h8500, {* Hitachi H8/500 *}
. bfd_arch_sh, {* Hitachi SH *}
.#define bfd_mach_sh 0
+.#define bfd_mach_sh2 0x20
+.#define bfd_mach_sh_dsp 0x2d
.#define bfd_mach_sh3 0x30
+.#define bfd_mach_sh3_dsp 0x3d
.#define bfd_mach_sh3e 0x3e
.#define bfd_mach_sh4 0x40
. bfd_arch_alpha, {* Dec Alpha *}
.#define bfd_mach_alpha_ev6 0x30
. bfd_arch_arm, {* Advanced Risc Machines ARM *}
.#define bfd_mach_arm_2 1
-.#define bfd_mach_arm_2a 2
+.#define bfd_mach_arm_2a 2
.#define bfd_mach_arm_3 3
.#define bfd_mach_arm_3M 4
-.#define bfd_mach_arm_4 5
+.#define bfd_mach_arm_4 5
.#define bfd_mach_arm_4T 6
+.#define bfd_mach_arm_5 7
+.#define bfd_mach_arm_5T 8
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
-. {* start-sanitize-tic80 *}
+. bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
-. {* end-sanitize-tic80 *}
. bfd_arch_v850, {* NEC V850 *}
.#define bfd_mach_v850 0
-. {* start-sanitize-v850e *}
.#define bfd_mach_v850e 'E'
.#define bfd_mach_v850ea 'A'
-. {* end-sanitize-v850e *}
. bfd_arch_arc, {* Argonaut RISC Core *}
.#define bfd_mach_arc_base 0
. bfd_arch_m32r, {* Mitsubishi M32R/D *}
.#define bfd_mach_m32r 0 {* backwards compatibility *}
-. {* start-sanitize-m32rx *}
.#define bfd_mach_m32rx 'x'
-. {* end-sanitize-m32rx *}
. bfd_arch_mn10200, {* Matsushita MN10200 *}
. bfd_arch_mn10300, {* Matsushita MN10300 *}
.#define bfd_mach_mn10300 300
-. {* start-sanitize-am33 *}
.#define bfd_mach_am33 330
-. {* end-sanitize-am33 *}
. bfd_arch_fr30,
.#define bfd_mach_fr30 0x46523330
+. bfd_arch_mcore,
+. bfd_arch_ia64, {* HP/Intel ia64 *}
+. bfd_arch_pj,
+. bfd_arch_avr, {* Atmel AVR microcontrollers *}
+.#define bfd_mach_avr1 1
+.#define bfd_mach_avr2 2
+.#define bfd_mach_avr3 3
+.#define bfd_mach_avr4 4
. bfd_arch_last
. };
extern const bfd_arch_info_type bfd_h8300_arch;
extern const bfd_arch_info_type bfd_h8500_arch;
extern const bfd_arch_info_type bfd_hppa_arch;
+extern const bfd_arch_info_type bfd_i370_arch;
extern const bfd_arch_info_type bfd_i386_arch;
extern const bfd_arch_info_type bfd_i860_arch;
extern const bfd_arch_info_type bfd_i960_arch;
extern const bfd_arch_info_type bfd_mn10300_arch;
extern const bfd_arch_info_type bfd_powerpc_arch;
extern const bfd_arch_info_type bfd_rs6000_arch;
+extern const bfd_arch_info_type bfd_pj_arch;
extern const bfd_arch_info_type bfd_sh_arch;
extern const bfd_arch_info_type bfd_sparc_arch;
extern const bfd_arch_info_type bfd_tic30_arch;
-/* start-sanitize-tic80 */
+extern const bfd_arch_info_type bfd_tic54x_arch;
extern const bfd_arch_info_type bfd_tic80_arch;
-/* end-sanitize-tic80 */
extern const bfd_arch_info_type bfd_vax_arch;
extern const bfd_arch_info_type bfd_we32k_arch;
extern const bfd_arch_info_type bfd_z8k_arch;
extern const bfd_arch_info_type bfd_w65_arch;
extern const bfd_arch_info_type bfd_v850_arch;
extern const bfd_arch_info_type bfd_fr30_arch;
+extern const bfd_arch_info_type bfd_mcore_arch;
+extern const bfd_arch_info_type bfd_avr_arch;
+extern const bfd_arch_info_type bfd_ia64_arch;
static const bfd_arch_info_type * const bfd_archures_list[] =
{
&bfd_h8300_arch,
&bfd_h8500_arch,
&bfd_hppa_arch,
+ &bfd_i370_arch,
&bfd_i386_arch,
&bfd_i860_arch,
&bfd_i960_arch,
&bfd_sh_arch,
&bfd_sparc_arch,
&bfd_tic30_arch,
-/* start-sanitize-tic80 */
+ &bfd_tic54x_arch,
&bfd_tic80_arch,
-/* end-sanitize-tic80 */
&bfd_vax_arch,
&bfd_we32k_arch,
&bfd_z8k_arch,
&bfd_ns32k_arch,
&bfd_w65_arch,
&bfd_v850_arch,
- & bfd_fr30_arch,
+ &bfd_fr30_arch,
+ &bfd_mcore_arch,
+ &bfd_avr_arch,
+ &bfd_ia64_arch,
#endif
0
};
arch = bfd_arch_rs6000;
break;
+ case 7410:
+ arch = bfd_arch_sh;
+ number = bfd_mach_sh_dsp;
+ break;
+
+ case 7708:
+ arch = bfd_arch_sh;
+ number = bfd_mach_sh3;
+ break;
+
+ case 7729:
+ arch = bfd_arch_sh;
+ number = bfd_mach_sh3_dsp;
+ break;
+
+ case 7750:
+ arch = bfd_arch_sh;
+ number = bfd_mach_sh4;
+ break;
+
default:
return false;
}
enum bfd_architecture arch;
unsigned long machine;
{
- const bfd_arch_info_type *ap = bfd_lookup_arch (arch, machine);
+ const bfd_arch_info_type * ap = bfd_lookup_arch (arch, machine);
if (ap)
return ap->printable_name;
return "UNKNOWN!";
}
+
+/*
+FUNCTION
+ bfd_octets_per_byte
+
+SYNOPSIS
+ unsigned int bfd_octets_per_byte(bfd *abfd);
+
+DESCRIPTION
+ Return the number of octets (8-bit quantities) per target byte
+ (minimum addressable unit). In most cases, this will be one, but some
+ DSP targets have 16, 32, or even 48 bits per byte.
+
+*/
+
+unsigned int
+bfd_octets_per_byte (abfd)
+ bfd * abfd;
+{
+ return bfd_arch_mach_octets_per_byte (bfd_get_arch (abfd),
+ bfd_get_mach (abfd));
+}
+
+/*
+FUNCTION
+ bfd_arch_mach_octets_per_byte
+
+SYNOPSIS
+ unsigned int bfd_arch_mach_octets_per_byte(enum bfd_architecture arch,
+ unsigned long machine);
+
+DESCRIPTION
+ See bfd_octets_per_byte.
+
+ This routine is provided for those cases where a bfd * is not
+ available
+*/
+
+unsigned int
+bfd_arch_mach_octets_per_byte (arch, mach)
+ enum bfd_architecture arch;
+ unsigned long mach;
+{
+ const bfd_arch_info_type * ap = bfd_lookup_arch (arch, mach);
+
+ if (ap)
+ return ap->bits_per_byte / 8;
+ return 1;
+}