#endif /* not BFD64 */
+#define HALF_BFD_SIZE_TYPE \
+ (((bfd_size_type) 1) << (8 * sizeof (bfd_size_type) / 2))
+
#ifndef BFD_HOST_64_BIT
/* Fall back on a 32 bit type. The idea is to make these types always
available for function return types, but in the case that
};
extern bfd_boolean bfd_elf_record_link_assignment
- (bfd *, struct bfd_link_info *, const char *, bfd_boolean);
+ (bfd *, struct bfd_link_info *, const char *, bfd_boolean,
+ bfd_boolean);
extern struct bfd_link_needed_list *bfd_elf_get_needed_list
(bfd *, struct bfd_link_info *);
extern bfd_boolean bfd_elf_get_bfd_needed_list
(bfd *, struct bfd_link_info *);
extern bfd_boolean bfd_elf_discard_info
(bfd *, struct bfd_link_info *);
+extern unsigned int _bfd_elf_default_action_discarded
+ (struct bfd_section *);
/* Return an upper bound on the number of bytes required to store a
copy of ABFD's program header table entries. Return -1 if an error
extern struct bfd_section *_bfd_elf_tls_setup
(bfd *, struct bfd_link_info *);
-extern void _bfd_elf_provide_symbol
- (struct bfd_link_info *, const char *, bfd_vma, struct bfd_section *);
+extern void _bfd_fix_excluded_sec_syms
+ (bfd *, struct bfd_link_info *);
+
+extern unsigned bfd_m68k_mach_to_features (int);
-extern void _bfd_elf_provide_section_bound_symbols
- (struct bfd_link_info *, struct bfd_section *sec, const char *, const char *);
+extern int bfd_m68k_features_to_mach (unsigned);
extern bfd_boolean bfd_m68k_elf32_create_embedded_relocs
- (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *, char **);
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
+ char **);
+
+extern bfd_boolean bfd_bfin_elf32_create_embedded_relocs
+ (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *,
+ char **);
/* SunOS shared library support routines for the linker. */
extern bfd_boolean bfd_sunos_record_link_assignment
(bfd *, struct bfd_link_info *, const char *);
extern bfd_boolean bfd_sunos_size_dynamic_sections
- (bfd *, struct bfd_link_info *, struct bfd_section **, struct bfd_section **, struct bfd_section **);
+ (bfd *, struct bfd_link_info *, struct bfd_section **,
+ struct bfd_section **, struct bfd_section **);
/* Linux shared library support routines for the linker. */
#define bfd_section_removed_from_list(ABFD, S) \
((S)->next == NULL ? (ABFD)->section_last != (S) : (S)->next->prev != (S))
+#define BFD_FAKE_SECTION(SEC, FLAGS, SYM, SYM_PTR, NAME, IDX) \
+ /* name, id, index, next, prev, flags, user_set_vma, */ \
+ { NAME, IDX, 0, NULL, NULL, FLAGS, 0, \
+ \
+ /* linker_mark, linker_has_input, gc_mark, gc_mark_from_eh, */ \
+ 0, 0, 1, 0, \
+ \
+ /* segment_mark, sec_info_type, use_rela_p, has_tls_reloc, */ \
+ 0, 0, 0, 0, \
+ \
+ /* has_gp_reloc, need_finalize_relax, reloc_done, */ \
+ 0, 0, 0, \
+ \
+ /* vma, lma, size, rawsize */ \
+ 0, 0, 0, 0, \
+ \
+ /* output_offset, output_section, alignment_power, */ \
+ 0, (struct bfd_section *) &SEC, 0, \
+ \
+ /* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \
+ NULL, NULL, 0, 0, 0, \
+ \
+ /* line_filepos, userdata, contents, lineno, lineno_count, */ \
+ 0, NULL, NULL, NULL, 0, \
+ \
+ /* entsize, kept_section, moving_line_filepos, */ \
+ 0, NULL, 0, \
+ \
+ /* target_index, used_by_bfd, constructor_chain, owner, */ \
+ 0, NULL, NULL, NULL, \
+ \
+ /* symbol, */ \
+ (struct bfd_symbol *) SYM, \
+ \
+ /* symbol_ptr_ptr, */ \
+ (struct bfd_symbol **) SYM_PTR, \
+ \
+ /* map_head, map_tail */ \
+ { NULL }, { NULL } \
+ }
+
void bfd_section_list_clear (bfd *);
asection *bfd_get_section_by_name (bfd *abfd, const char *name);
#define bfd_mach_m68040 6
#define bfd_mach_m68060 7
#define bfd_mach_cpu32 8
-#define bfd_mach_mcf5200 9
-#define bfd_mach_mcf5206e 10
-#define bfd_mach_mcf5307 11
-#define bfd_mach_mcf5407 12
-#define bfd_mach_mcf528x 13
-#define bfd_mach_mcfv4e 14
-#define bfd_mach_mcf521x 15
-#define bfd_mach_mcf5249 16
-#define bfd_mach_mcf547x 17
-#define bfd_mach_mcf548x 18
+#define bfd_mach_mcf_isa_a 9
+#define bfd_mach_mcf_isa_a_div 10
+#define bfd_mach_mcf_isa_a_div_mac 11
+#define bfd_mach_mcf_isa_a_div_emac 12
+#define bfd_mach_mcf_isa_aplus 13
+#define bfd_mach_mcf_isa_aplus_mac 14
+#define bfd_mach_mcf_isa_aplus_emac 15
+#define bfd_mach_mcf_isa_aplus_usp 16
+#define bfd_mach_mcf_isa_aplus_usp_mac 17
+#define bfd_mach_mcf_isa_aplus_usp_emac 18
+#define bfd_mach_mcf_isa_b 19
+#define bfd_mach_mcf_isa_b_mac 20
+#define bfd_mach_mcf_isa_b_emac 21
+#define bfd_mach_mcf_isa_b_usp_float 22
+#define bfd_mach_mcf_isa_b_usp_float_mac 23
+#define bfd_mach_mcf_isa_b_usp_float_emac 24
bfd_arch_vax, /* DEC Vax */
bfd_arch_i960, /* Intel 960 */
/* The order of the following is important.
bfd_arch_or32, /* OpenRISC 32 */
- bfd_arch_a29k, /* AMD 29000 */
bfd_arch_sparc, /* SPARC */
#define bfd_mach_sparc 1
/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
bfd_arch_i860, /* Intel 860 */
bfd_arch_i370, /* IBM 360/370 Mainframes */
bfd_arch_romp, /* IBM ROMP PC/RT */
- bfd_arch_alliant, /* Alliant */
bfd_arch_convex, /* Convex */
bfd_arch_m88k, /* Motorola 88xxx */
bfd_arch_m98k, /* Motorola 98xxx */
#define bfd_mach_arc_6 6
#define bfd_mach_arc_7 7
#define bfd_mach_arc_8 8
+ bfd_arch_m32c, /* Renesas M16C/M32C. */
+#define bfd_mach_m16c 0x75
+#define bfd_mach_m32c 0x78
bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */
#define bfd_mach_m32r 1 /* For backwards compatibility. */
#define bfd_mach_m32rx 'x'
bfd_arch_iq2000, /* Vitesse IQ2000. */
#define bfd_mach_iq2000 1
#define bfd_mach_iq10 2
- bfd_arch_ms1,
+ bfd_arch_mt,
#define bfd_mach_ms1 1
#define bfd_mach_mrisc2 2
+#define bfd_mach_ms2 3
bfd_arch_pj,
bfd_arch_avr, /* Atmel AVR microcontrollers. */
#define bfd_mach_avr1 1
#define bfd_mach_avr3 3
#define bfd_mach_avr4 4
#define bfd_mach_avr5 5
+ bfd_arch_bfin, /* ADI Blackfin */
+#define bfd_mach_bfin 1
bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
#define bfd_mach_cr16c 1
bfd_arch_crx, /* National Semiconductor CRX. */
#define bfd_mach_msp13 13
#define bfd_mach_msp14 14
#define bfd_mach_msp15 15
-#define bfd_mach_msp16 16
+#define bfd_mach_msp16 16
+#define bfd_mach_msp21 21
#define bfd_mach_msp31 31
#define bfd_mach_msp32 32
#define bfd_mach_msp33 33
#define bfd_mach_msp42 42
#define bfd_mach_msp43 43
#define bfd_mach_msp44 44
+ bfd_arch_xc16x, /* Infineon's XC16X Series. */
+#define bfd_mach_xc16x 1
+#define bfd_mach_xc16xl 2
+#define bfd_mach_xc16xs 3
bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
#define bfd_mach_xtensa 1
bfd_arch_maxq, /* Dallas MAXQ 10/20 */
#define bfd_mach_maxq10 10
#define bfd_mach_maxq20 20
+ bfd_arch_z80,
+#define bfd_mach_z80strict 1 /* No undocumented opcodes. */
+#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */
+#define bfd_mach_z80full 7 /* All undocumented instructions. */
+#define bfd_mach_r800 11 /* R800: successor with multiplication. */
bfd_arch_last
};
/* Do not complain on overflow. */
complain_overflow_dont,
- /* Complain if the bitfield overflows, whether it is considered
- as signed or unsigned. */
+ /* Complain if the value overflows when considered as a signed
+ number one bit larger than the field. ie. A bitfield of N bits
+ is allowed to represent -2**n to 2**n-1. */
complain_overflow_bitfield,
- /* Complain if the value overflows when considered as signed
+ /* Complain if the value overflows when considered as a signed
number. */
complain_overflow_signed,
BFD_RELOC_386_TLS_DTPMOD32,
BFD_RELOC_386_TLS_DTPOFF32,
BFD_RELOC_386_TLS_TPOFF32,
+ BFD_RELOC_386_TLS_GOTDESC,
+ BFD_RELOC_386_TLS_DESC_CALL,
+ BFD_RELOC_386_TLS_DESC,
/* x86-64/elf relocations */
BFD_RELOC_X86_64_GOT32,
BFD_RELOC_X86_64_TPOFF32,
BFD_RELOC_X86_64_GOTOFF64,
BFD_RELOC_X86_64_GOTPC32,
+ BFD_RELOC_X86_64_GOTPC32_TLSDESC,
+ BFD_RELOC_X86_64_TLSDESC_CALL,
+ BFD_RELOC_X86_64_TLSDESC,
/* ns32k relocations */
BFD_RELOC_NS32K_IMM_8,
field in the instruction. */
BFD_RELOC_THUMB_PCREL_BLX,
+/* ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction. */
+ BFD_RELOC_ARM_PCREL_CALL,
+
+/* ARM 26-bit pc-relative branch for B or conditional BL instruction. */
+ BFD_RELOC_ARM_PCREL_JUMP,
+
/* Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
The lowest bit must be zero and is not stored in the instruction.
Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
BFD_RELOC_ARM_IMMEDIATE,
BFD_RELOC_ARM_ADRL_IMMEDIATE,
BFD_RELOC_ARM_T32_IMMEDIATE,
+ BFD_RELOC_ARM_T32_IMM12,
+ BFD_RELOC_ARM_T32_ADD_PC12,
BFD_RELOC_ARM_SHIFT_IMM,
- BFD_RELOC_ARM_SMI,
+ BFD_RELOC_ARM_SMC,
BFD_RELOC_ARM_SWI,
BFD_RELOC_ARM_MULTI,
BFD_RELOC_ARM_CP_OFF_IMM,
BFD_RELOC_ARM_CP_OFF_IMM_S2,
+ BFD_RELOC_ARM_T32_CP_OFF_IMM,
+ BFD_RELOC_ARM_T32_CP_OFF_IMM_S2,
BFD_RELOC_ARM_ADR_IMM,
BFD_RELOC_ARM_LDR_IMM,
BFD_RELOC_ARM_LITERAL,
through 0. */
BFD_RELOC_ARC_B26,
+/* ADI Blackfin 16 bit immediate absolute reloc. */
+ BFD_RELOC_BFIN_16_IMM,
+
+/* ADI Blackfin 16 bit immediate absolute reloc higher 16 bits. */
+ BFD_RELOC_BFIN_16_HIGH,
+
+/* ADI Blackfin 'a' part of LSETUP. */
+ BFD_RELOC_BFIN_4_PCREL,
+
+/* ADI Blackfin. */
+ BFD_RELOC_BFIN_5_PCREL,
+
+/* ADI Blackfin 16 bit immediate absolute reloc lower 16 bits. */
+ BFD_RELOC_BFIN_16_LOW,
+
+/* ADI Blackfin. */
+ BFD_RELOC_BFIN_10_PCREL,
+
+/* ADI Blackfin 'b' part of LSETUP. */
+ BFD_RELOC_BFIN_11_PCREL,
+
+/* ADI Blackfin. */
+ BFD_RELOC_BFIN_12_PCREL_JUMP,
+
+/* ADI Blackfin Short jump, pcrel. */
+ BFD_RELOC_BFIN_12_PCREL_JUMP_S,
+
+/* ADI Blackfin Call.x not implemented. */
+ BFD_RELOC_BFIN_24_PCREL_CALL_X,
+
+/* ADI Blackfin Long Jump pcrel. */
+ BFD_RELOC_BFIN_24_PCREL_JUMP_L,
+
+/* ADI Blackfin GOT relocation. */
+ BFD_RELOC_BFIN_GOT,
+
+/* ADI Blackfin PLTPC relocation. */
+ BFD_RELOC_BFIN_PLTPC,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_PUSH,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_CONST,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_ADD,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_SUB,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_MULT,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_DIV,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_MOD,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LSHIFT,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_RSHIFT,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_AND,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_OR,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_XOR,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LAND,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LOR,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_LEN,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_NEG,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_COMP,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_PAGE,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_HWPAGE,
+
+/* ADI Blackfin arithmetic relocation. */
+ BFD_ARELOC_BFIN_ADDR,
+
/* Mitsubishi D10V relocs.
This is a 10-bit reloc with the right 2 bits
assumed to be 0. */
/* DLX relocs */
BFD_RELOC_DLX_JMP26,
+/* Renesas M16C/M32C Relocations. */
+ BFD_RELOC_M32C_HI8,
+ BFD_RELOC_M32C_RL_JUMP,
+ BFD_RELOC_M32C_RL_1ADDR,
+ BFD_RELOC_M32C_RL_2ADDR,
+
/* Renesas M32R (formerly Mitsubishi M32R) relocs.
This is a 24 bit absolute address. */
BFD_RELOC_M32R_24,
BFD_RELOC_XSTORMY16_24,
BFD_RELOC_XSTORMY16_FPTR16,
+/* Infineon Relocations. */
+ BFD_RELOC_XC16X_PAG,
+ BFD_RELOC_XC16X_POF,
+ BFD_RELOC_XC16X_SEG,
+ BFD_RELOC_XC16X_SOF,
+
/* Relocations used by VAX ELF. */
BFD_RELOC_VAX_GLOB_DAT,
BFD_RELOC_VAX_JMP_SLOT,
BFD_RELOC_VAX_RELATIVE,
+/* Morpho MT - 16 bit immediate relocation. */
+ BFD_RELOC_MT_PC16,
+
+/* Morpho MT - Hi 16 bits of an address. */
+ BFD_RELOC_MT_HI16,
+
+/* Morpho MT - Low 16 bits of an address. */
+ BFD_RELOC_MT_LO16,
+
+/* Morpho MT - Used to tell the linker which vtable entries are used. */
+ BFD_RELOC_MT_GNU_VTINHERIT,
+
+/* Morpho MT - Used to tell the linker which vtable entries are used. */
+ BFD_RELOC_MT_GNU_VTENTRY,
+
+/* Morpho MT - 8 bit immediate relocation. */
+ BFD_RELOC_MT_PCINSN8,
+
/* msp430 specific relocation codes */
BFD_RELOC_MSP430_10_PCREL,
BFD_RELOC_MSP430_16_PCREL,
BFD_RELOC_XTENSA_OP1,
BFD_RELOC_XTENSA_OP2,
-/* Xtensa relocation to mark that the assembler expanded the
+/* Xtensa relocation to mark that the assembler expanded the
instructions from an original target. The expansion size is
encoded in the reloc size. */
BFD_RELOC_XTENSA_ASM_EXPAND,
-/* Xtensa relocation to mark that the linker should simplify
-assembler-expanded instructions. This is commonly used
-internally by the linker after analysis of a
+/* Xtensa relocation to mark that the linker should simplify
+assembler-expanded instructions. This is commonly used
+internally by the linker after analysis of a
BFD_RELOC_XTENSA_ASM_EXPAND. */
BFD_RELOC_XTENSA_ASM_SIMPLIFY,
+
+/* 8 bit signed offset in (ix+d) or (iy+d). */
+ BFD_RELOC_Z80_DISP8,
+
+/* DJNZ offset. */
+ BFD_RELOC_Z8K_DISP7,
+
+/* CALR offset. */
+ BFD_RELOC_Z8K_CALLR,
+
+/* 4 bit value. */
+ BFD_RELOC_Z8K_IMM4L,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
reloc_howto_type *bfd_reloc_type_lookup
bfd_boolean core_file_matches_executable_p
(bfd *core_bfd, bfd *exec_bfd);
+bfd_boolean generic_core_file_matches_executable_p
+ (bfd *core_bfd, bfd *exec_bfd);
+
/* Extracted from targets.c. */
#define BFD_SEND(bfd, message, arglist) \
((*((bfd)->xvec->message)) arglist)
#define BFD_JUMP_TABLE_COPY(NAME) \
NAME##_bfd_copy_private_bfd_data, \
NAME##_bfd_merge_private_bfd_data, \
+ _bfd_generic_init_private_section_data, \
NAME##_bfd_copy_private_section_data, \
NAME##_bfd_copy_private_symbol_data, \
NAME##_bfd_copy_private_header_data, \
/* Called to merge BFD general private data from one object file
to a common output file when linking. */
bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *);
+ /* Called to initialize BFD private section data from one object file
+ to another. */
+#define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \
+ BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info))
+ bfd_boolean (*_bfd_init_private_section_data)
+ (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *);
/* Called to copy BFD private section data from one object file
to another. */
bfd_boolean (*_bfd_copy_private_section_data)
projects / deliverable / binutils-gdb.git / blobdiff