/* Object and core file sections. */
#define align_power(addr, align) \
- (((addr) + ((bfd_vma) 1 << (align)) - 1) & ((bfd_vma) -1 << (align)))
+ (((addr) + ((bfd_vma) 1 << (align)) - 1) & (-((bfd_vma) 1 << (align))))
typedef struct bfd_section *sec_ptr;
extern void bfd_elf32_arm_vfp11_fix_veneer_locations
(bfd *, struct bfd_link_info *);
+/* ARM STM STM32L4XX erratum workaround support. */
+typedef enum
+{
+ BFD_ARM_STM32L4XX_FIX_NONE,
+ BFD_ARM_STM32L4XX_FIX_DEFAULT,
+ BFD_ARM_STM32L4XX_FIX_ALL
+} bfd_arm_stm32l4xx_fix;
+
+extern void bfd_elf32_arm_set_stm32l4xx_fix
+ (bfd *, struct bfd_link_info *);
+
+extern bfd_boolean bfd_elf32_arm_stm32l4xx_erratum_scan
+ (bfd *, struct bfd_link_info *);
+
+extern void bfd_elf32_arm_stm32l4xx_fix_veneer_locations
+ (bfd *, struct bfd_link_info *);
+
/* ARM Interworking support. Called from linker. */
extern bfd_boolean bfd_arm_allocate_interworking_sections
(struct bfd_link_info *);
void bfd_elf32_arm_set_target_relocs
(bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix,
- int, int, int, int, int);
+ bfd_arm_stm32l4xx_fix, int, int, int, int, int);
extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking
(bfd *, struct bfd_link_info *);
asection *bfd_get_section_by_name (bfd *abfd, const char *name);
-asection *bfd_get_next_section_by_name (asection *sec);
+asection *bfd_get_next_section_by_name (bfd *ibfd, asection *sec);
asection *bfd_get_linker_section (bfd *abfd, const char *name);
#define bfd_mach_v850e2v3 0x45325633
#define bfd_mach_v850e3v5 0x45335635 /* ('E'|'3'|'V'|'5') */
bfd_arch_arc, /* ARC Cores */
-#define bfd_mach_arc_5 5
-#define bfd_mach_arc_6 6
-#define bfd_mach_arc_7 7
-#define bfd_mach_arc_8 8
+#define bfd_mach_arc_a4 0
+#define bfd_mach_arc_a5 1
+#define bfd_mach_arc_arc600 2
+#define bfd_mach_arc_arc601 4
+#define bfd_mach_arc_arc700 3
+#define bfd_mach_arc_arcv2 5
bfd_arch_m32c, /* Renesas M16C/M32C. */
#define bfd_mach_m16c 0x75
#define bfd_mach_m32c 0x78
BFD_RELOC_386_TLS_DESC_CALL,
BFD_RELOC_386_TLS_DESC,
BFD_RELOC_386_IRELATIVE,
+ BFD_RELOC_386_GOT32X,
/* x86-64/elf relocations */
BFD_RELOC_X86_64_GOT32,
BFD_RELOC_X86_64_IRELATIVE,
BFD_RELOC_X86_64_PC32_BND,
BFD_RELOC_X86_64_PLT32_BND,
+ BFD_RELOC_X86_64_GOTPCRELX,
+ BFD_RELOC_X86_64_REX_GOTPCRELX,
/* ns32k relocations */
BFD_RELOC_NS32K_IMM_8,
BFD_RELOC_SH_GOTOFFFUNCDESC20,
BFD_RELOC_SH_FUNCDESC,
-/* ARC Cores relocs.
-ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
-not stored in the instruction. The high 20 bits are installed in bits 26
-through 7 of the instruction. */
- BFD_RELOC_ARC_B22_PCREL,
-
-/* ARC 26 bit absolute branch. The lowest two bits must be zero and are not
-stored in the instruction. The high 24 bits are installed in bits 23
-through 0. */
- BFD_RELOC_ARC_B26,
+/* ARC relocs. */
+ BFD_RELOC_ARC_NONE,
+ BFD_RELOC_ARC_8,
+ BFD_RELOC_ARC_16,
+ BFD_RELOC_ARC_24,
+ BFD_RELOC_ARC_32,
+ BFD_RELOC_ARC_N8,
+ BFD_RELOC_ARC_N16,
+ BFD_RELOC_ARC_N24,
+ BFD_RELOC_ARC_N32,
+ BFD_RELOC_ARC_SDA,
+ BFD_RELOC_ARC_SECTOFF,
+ BFD_RELOC_ARC_S21H_PCREL,
+ BFD_RELOC_ARC_S21W_PCREL,
+ BFD_RELOC_ARC_S25H_PCREL,
+ BFD_RELOC_ARC_S25W_PCREL,
+ BFD_RELOC_ARC_SDA32,
+ BFD_RELOC_ARC_SDA_LDST,
+ BFD_RELOC_ARC_SDA_LDST1,
+ BFD_RELOC_ARC_SDA_LDST2,
+ BFD_RELOC_ARC_SDA16_LD,
+ BFD_RELOC_ARC_SDA16_LD1,
+ BFD_RELOC_ARC_SDA16_LD2,
+ BFD_RELOC_ARC_S13_PCREL,
+ BFD_RELOC_ARC_W,
+ BFD_RELOC_ARC_32_ME,
+ BFD_RELOC_ARC_32_ME_S,
+ BFD_RELOC_ARC_N32_ME,
+ BFD_RELOC_ARC_SECTOFF_ME,
+ BFD_RELOC_ARC_SDA32_ME,
+ BFD_RELOC_ARC_W_ME,
+ BFD_RELOC_AC_SECTOFF_U8,
+ BFD_RELOC_AC_SECTOFF_U8_1,
+ BFD_RELOC_AC_SECTOFF_U8_2,
+ BFD_RELOC_AC_SECTFOFF_S9,
+ BFD_RELOC_AC_SECTFOFF_S9_1,
+ BFD_RELOC_AC_SECTFOFF_S9_2,
+ BFD_RELOC_ARC_SECTOFF_ME_1,
+ BFD_RELOC_ARC_SECTOFF_ME_2,
+ BFD_RELOC_ARC_SECTOFF_1,
+ BFD_RELOC_ARC_SECTOFF_2,
+ BFD_RELOC_ARC_SDA16_ST2,
+ BFD_RELOC_ARC_32_PCREL,
+ BFD_RELOC_ARC_PC32,
+ BFD_RELOC_ARC_GOT32,
+ BFD_RELOC_ARC_GOTPC32,
+ BFD_RELOC_ARC_PLT32,
+ BFD_RELOC_ARC_COPY,
+ BFD_RELOC_ARC_GLOB_DAT,
+ BFD_RELOC_ARC_JMP_SLOT,
+ BFD_RELOC_ARC_RELATIVE,
+ BFD_RELOC_ARC_GOTOFF,
+ BFD_RELOC_ARC_GOTPC,
+ BFD_RELOC_ARC_S21W_PCREL_PLT,
+ BFD_RELOC_ARC_S25H_PCREL_PLT,
+ BFD_RELOC_ARC_TLS_DTPMOD,
+ BFD_RELOC_ARC_TLS_TPOFF,
+ BFD_RELOC_ARC_TLS_GD_GOT,
+ BFD_RELOC_ARC_TLS_GD_LD,
+ BFD_RELOC_ARC_TLS_GD_CALL,
+ BFD_RELOC_ARC_TLS_IE_GOT,
+ BFD_RELOC_ARC_TLS_DTPOFF,
+ BFD_RELOC_ARC_TLS_DTPOFF_S9,
+ BFD_RELOC_ARC_TLS_LE_S9,
+ BFD_RELOC_ARC_TLS_LE_32,
+ BFD_RELOC_ARC_S25W_PCREL_PLT,
+ BFD_RELOC_ARC_S21H_PCREL_PLT,
/* ADI Blackfin 16 bit immediate absolute reloc. */
BFD_RELOC_BFIN_16_IMM,
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */
BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC,
-/* AArch64 TLS INITIAL EXEC relocation. */
- BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1,
+/* AArch64 TLS General Dynamic relocation. */
+ BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC,
-/* AArch64 TLS INITIAL EXEC relocation. */
- BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC,
+/* AArch64 TLS General Dynamic relocation. */
+ BFD_RELOC_AARCH64_TLSGD_MOVW_G1,
/* AArch64 TLS INITIAL EXEC relocation. */
BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21,
/* AArch64 TLS INITIAL EXEC relocation. */
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19,
+/* AArch64 TLS INITIAL EXEC relocation. */
+ BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC,
+
+/* AArch64 TLS INITIAL EXEC relocation. */
+ BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1,
+
/* bit[23:12] of byte offset to module TLS base address. */
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
projects / deliverable / binutils-gdb.git / blobdiff