/* These two lines get substitutions done by commands in Makefile.in. */
#define BFD_VERSION "@VERSION@"
-#define BFD_ARCH_SIZE @WORDSIZE@
+#define BFD_ARCH_SIZE @wordsize@
#define BFD_HOST_64BIT_LONG @BFD_HOST_64BIT_LONG@
+#if @BFD_HOST_64_BIT_DEFINED@
+#define BFD_HOST_64_BIT @BFD_HOST_64_BIT@
+#define BFD_HOST_U_64_BIT @BFD_HOST_U_64_BIT@
+#endif
#if BFD_ARCH_SIZE >= 64
#define BFD64
/* Support for different sizes of target format ints and addresses.
If the type `long' is at least 64 bits, BFD_HOST_64BIT_LONG will be
set to 1 above. Otherwise, if gcc is being used, this code will
- use gcc's "long long" type. Otherwise, the compilation will fail
- if 64-bit targets are requested. */
+ use gcc's "long long" type. Otherwise, BFD_HOST_64_BIT must be
+ defined above. */
#ifdef BFD64
#ifndef BFD_HOST_64_BIT
#if BFD_HOST_64BIT_LONG
#define BFD_HOST_64_BIT long
+#define BFD_HOST_U_64_BIT unsigned long
#else
#ifdef __GNUC__
#define BFD_HOST_64_BIT long long
-#endif /* defined (__GNUC__) */
+#define BFD_HOST_U_64_BIT unsigned long long
+#else /* ! defined (__GNUC__) */
+ #error No 64 bit integer type available
+#endif /* ! defined (__GNUC__) */
#endif /* ! BFD_HOST_64BIT_LONG */
#endif /* ! defined (BFD_HOST_64_BIT) */
-typedef unsigned BFD_HOST_64_BIT bfd_vma;
+typedef BFD_HOST_U_64_BIT bfd_vma;
typedef BFD_HOST_64_BIT bfd_signed_vma;
-typedef unsigned BFD_HOST_64_BIT bfd_size_type;
-typedef unsigned BFD_HOST_64_BIT symvalue;
+typedef BFD_HOST_U_64_BIT bfd_size_type;
+typedef BFD_HOST_U_64_BIT symvalue;
#ifndef fprintf_vma
#if BFD_HOST_64BIT_LONG
to another, and are not necessarily correct). */
/* No flags. */
-#define NO_FLAGS 0x00
+#define BFD_NO_FLAGS 0x00
/* BFD contains relocation entries. */
#define HAS_RELOC 0x01
unsigned long, unsigned long, unsigned long, boolean,
int, boolean, boolean, struct sec **));
+/* Externally visible COFF routines. */
+
+#if defined(__STDC__) || defined(ALMOST_STDC)
+struct internal_syment;
+union internal_auxent;
+#endif
+
+extern boolean bfd_coff_get_syment
+ PARAMS ((bfd *, struct symbol_cache_entry *, struct internal_syment *));
+extern boolean bfd_coff_get_auxent
+ PARAMS ((bfd *, struct symbol_cache_entry *, int, union internal_auxent *));
+
/* And more from the source. */
void
bfd_init PARAMS ((void));
bfd_copy_private_section_data PARAMS ((bfd *ibfd, asection *isec, bfd *obfd, asection *osec));
#define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \
- BFD_SEND (ibfd, _bfd_copy_private_section_data, \
+ BFD_SEND (obfd, _bfd_copy_private_section_data, \
(ibfd, isection, obfd, osection))
enum bfd_architecture
{
((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a)
bfd_arch_mips, /* MIPS Rxxxx */
bfd_arch_i386, /* Intel 386 */
+#define bfd_mach_i386_i386 0
+#define bfd_mach_i386_i8086 1
bfd_arch_we32k, /* AT&T WE32xxx */
bfd_arch_tahoe, /* CCI/Harris Tahoe */
bfd_arch_i860, /* Intel 860 */
bfd_arch_h8300, /* Hitachi H8/300 */
#define bfd_mach_h8300 1
#define bfd_mach_h8300h 2
+#define bfd_mach_h8300s 3
bfd_arch_powerpc, /* PowerPC */
bfd_arch_rs6000, /* IBM RS/6000 */
bfd_arch_hppa, /* HP PA RISC */
+ /* start-sanitize-d10v */
+ bfd_arch_d10v, /* Mitsubishi D10V */
+ /* end-sanitize-d10v */
bfd_arch_z8k, /* Zilog Z8000 */
#define bfd_mach_z8001 1
#define bfd_mach_z8002 2
bfd_arch_h8500, /* Hitachi H8/500 */
bfd_arch_sh, /* Hitachi SH */
+ /* start-sanitize-tic80 */
+ bfd_arch_tic80, /* TI TMS320C80 (MVP) */
+ /* end-sanitize-tic80 */
bfd_arch_alpha, /* Dec Alpha */
bfd_arch_arm, /* Advanced Risc Machines ARM */
bfd_arch_ns32k, /* National Semiconductors ns32000 */
bfd_arch_w65, /* WDC 65816 */
- /* start-sanitize-rce */
- bfd_arch_rce, /* Motorola RCE */
- /* end-sanitize-rce */
+ /* start-sanitize-v850 */
+ bfd_arch_v850, /* NEC V850 */
+ /* end-sanitize-v850 */
/* start-sanitize-arc */
bfd_arch_arc, /* Argonaut RISC Core */
#define bfd_mach_arc_base 0
#define bfd_mach_arc_graphics 2
#define bfd_mach_arc_audio 3
/* end-sanitize-arc */
+ /* start-sanitize-m32r */
+ bfd_arch_m32r, /* Mitsubishi M32R */
+ /* end-sanitize-m32r */
+ bfd_arch_mn10200, /* Matsushita MN10200 */
+ bfd_arch_mn10300, /* Matsushita MN10300 */
bfd_arch_last
};
BFD_RELOC_SPARC_6,
BFD_RELOC_SPARC_5,
-/* Alpha ECOFF relocations. Some of these treat the symbol or "addend"
-in some special way.
+/* Alpha ECOFF and ELF relocations. Some of these treat the symbol or
+"addend" in some special way.
For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
writing; when reading, it will be the absolute section symbol. The
addend is the displacement in bytes of the "lda" instruction from
reading, for convenience. */
BFD_RELOC_ALPHA_GPDISP_LO16,
+/* The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
+relocation except that there is no accompanying GPDISP_LO16
+relocation. */
+ BFD_RELOC_ALPHA_GPDISP,
+
/* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
the assembler turns it into a LDQ instruction to load the address of
the symbol, and then fills in a register in the real instruction.
in with the file's GP value on reading, for convenience, as with the
GPDISP_LO16 reloc.
+The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
+It should refer to the symbol to be referenced, as with 16_GOTOFF,
+but it generates output not based on the position within the .got
+section, but relative to the GP value chosen for the file during the
+final link stage.
+
The LITUSE reloc, on the instruction using the loaded address, gives
information to the linker that it might be able to use to optimize
away some literal section references. The symbol is ignored (read
The GNU linker currently doesn't do any of this optimizing. */
BFD_RELOC_ALPHA_LITERAL,
+ BFD_RELOC_ALPHA_ELF_LITERAL,
BFD_RELOC_ALPHA_LITUSE,
/* The HINT relocation indicates a value that should be filled into the
prediction logic which may be provided on some processors. */
BFD_RELOC_ALPHA_HINT,
+/* The LINKAGE relocation outputs a linkage pair in the object file,
+which is filled by the linker. */
+ BFD_RELOC_ALPHA_LINKAGE,
+
/* Bits 27..2 of the relocation address shifted right 2 bits;
simple reloc otherwise. */
BFD_RELOC_MIPS_JMP,
+/* The MIPS16 jump instruction. */
+ BFD_RELOC_MIPS16_JMP,
+
/* High 16 bits of 32-bit value; simple reloc. */
BFD_RELOC_HI16,
BFD_RELOC_ARM_LDR_IMM,
BFD_RELOC_ARM_LITERAL,
BFD_RELOC_ARM_IN_POOL,
+ BFD_RELOC_ARM_OFFSET_IMM8,
+ BFD_RELOC_ARM_HWLITERAL,
+ BFD_RELOC_ARM_THUMB_ADD,
+ BFD_RELOC_ARM_THUMB_IMM,
+ BFD_RELOC_ARM_THUMB_SHIFT,
+ BFD_RELOC_ARM_THUMB_OFFSET,
+
+/* Hitachi SH relocs. Not all of these appear in object files. */
+ BFD_RELOC_SH_PCDISP8BY2,
+ BFD_RELOC_SH_PCDISP12BY2,
+ BFD_RELOC_SH_IMM4,
+ BFD_RELOC_SH_IMM4BY2,
+ BFD_RELOC_SH_IMM4BY4,
+ BFD_RELOC_SH_IMM8,
+ BFD_RELOC_SH_IMM8BY2,
+ BFD_RELOC_SH_IMM8BY4,
+ BFD_RELOC_SH_PCRELIMM8BY2,
+ BFD_RELOC_SH_PCRELIMM8BY4,
+ BFD_RELOC_SH_SWITCH16,
+ BFD_RELOC_SH_SWITCH32,
+ BFD_RELOC_SH_USES,
+ BFD_RELOC_SH_COUNT,
+ BFD_RELOC_SH_ALIGN,
+ BFD_RELOC_SH_CODE,
+ BFD_RELOC_SH_DATA,
+ BFD_RELOC_SH_LABEL,
/* start-sanitize-arc */
/* Argonaut RISC Core (ARC) relocs.
through 0. */
BFD_RELOC_ARC_B26,
/* end-sanitize-arc */
+
+/* start-sanitize-d10v */
+
+/* Mitsubishi D10V relocs.
+This is a 10-bit reloc with the right 2 bits
+assumed to be 0. */
+ BFD_RELOC_D10V_10_PCREL_R,
+
+/* Mitsubishi D10V relocs.
+This is a 10-bit reloc with the right 2 bits
+assumed to be 0. This is the same as the previous reloc
+except it is in the left container, i.e.,
+shifted left 15 bits. */
+ BFD_RELOC_D10V_10_PCREL_L,
+
+/* This is an 18-bit reloc with the right 2 bits
+assumed to be 0. */
+ BFD_RELOC_D10V_18,
+
+/* This is an 18-bit reloc with the right 2 bits
+assumed to be 0. */
+ BFD_RELOC_D10V_18_PCREL,
+/* end-sanitize-d10v */
+
+/* start-sanitize-m32r */
+
+/* Mitsubishi M32R relocs.
+This is a 24 bit absolute address. */
+ BFD_RELOC_M32R_24,
+
+/* This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0. */
+ BFD_RELOC_M32R_10_PCREL,
+
+/* This is an 18-bit reloc with the right 2 bits assumed to be 0. */
+ BFD_RELOC_M32R_18_PCREL,
+
+/* This is an 26-bit reloc with the right 2 bits assumed to be 0. */
+ BFD_RELOC_M32R_26_PCREL,
+/* end-sanitize-m32r */
+
+/* start-sanitize-v850 */
+
+/* This is a 9-bit reloc */
+ BFD_RELOC_V850_9_PCREL,
+
+/* This is a 22-bit reloc */
+ BFD_RELOC_V850_22_PCREL,
+
+/* This is an offset from the short data area pointer.. */
+ BFD_RELOC_V850_SDA_OFFSET,
+
+/* This is an offset from the zero data area pointer.. */
+ BFD_RELOC_V850_ZDA_OFFSET,
+
+/* This is an offset from the tiny data area pointer.. */
+ BFD_RELOC_V850_TDA_OFFSET,
+/* end-sanitize-v850 */
+
+
+/* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
+instruction. */
+ BFD_RELOC_MN10300_32_PCREL,
+
+/* This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
+instruction. */
+ BFD_RELOC_MN10300_16_PCREL,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
reloc_howto_type *
bfd_copy_private_symbol_data PARAMS ((bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym));
#define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \
- BFD_SEND (ibfd, _bfd_copy_private_symbol_data, \
+ BFD_SEND (obfd, _bfd_copy_private_symbol_data, \
(ibfd, isymbol, obfd, osymbol))
struct _bfd
{
bfd_copy_private_bfd_data PARAMS ((bfd *ibfd, bfd *obfd));
#define bfd_copy_private_bfd_data(ibfd, obfd) \
- BFD_SEND (ibfd, _bfd_copy_private_bfd_data, \
+ BFD_SEND (obfd, _bfd_copy_private_bfd_data, \
(ibfd, obfd))
boolean
bfd_merge_private_bfd_data PARAMS ((bfd *ibfd, bfd *obfd));
#define bfd_merge_private_bfd_data(ibfd, obfd) \
- BFD_SEND (ibfd, _bfd_merge_private_bfd_data, \
+ BFD_SEND (obfd, _bfd_merge_private_bfd_data, \
(ibfd, obfd))
boolean
bfd_set_private_flags PARAMS ((bfd *abfd, flagword flags));
bfd_target_som_flavour,
bfd_target_os9k_flavour,
bfd_target_versados_flavour,
- bfd_target_msdos_flavour
+ bfd_target_msdos_flavour,
+ bfd_target_evax_flavour
};
enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
projects / deliverable / binutils-gdb.git / blobdiff