/* BFD back-end for MIPS Extended-Coff files.
- Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
+ Copyright 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
Original version by Per Bothner.
Full support added by Ian Lance Taylor, ian@cygnus.com.
asection *section,
bfd *output_bfd,
char **error));
-static void mips_relocate_refhi PARAMS ((struct internal_reloc *refhi,
- struct internal_reloc *reflo,
- bfd *input_bfd,
- asection *input_section,
- bfd_byte *contents,
- size_t adjust,
- bfd_vma relocation));
+static bfd_reloc_status_type mips_relhi_reloc PARAMS ((bfd *abfd,
+ arelent *reloc,
+ asymbol *symbol,
+ PTR data,
+ asection *section,
+ bfd *output_bfd,
+ char **error));
+static bfd_reloc_status_type mips_rello_reloc PARAMS ((bfd *abfd,
+ arelent *reloc,
+ asymbol *symbol,
+ PTR data,
+ asection *section,
+ bfd *output_bfd,
+ char **error));
+static bfd_reloc_status_type mips_switch_reloc PARAMS ((bfd *abfd,
+ arelent *reloc,
+ asymbol *symbol,
+ PTR data,
+ asection *section,
+ bfd *output_bfd,
+ char **error));
+static void mips_relocate_hi PARAMS ((struct internal_reloc *refhi,
+ struct internal_reloc *reflo,
+ bfd *input_bfd,
+ asection *input_section,
+ bfd_byte *contents,
+ size_t adjust,
+ bfd_vma relocation,
+ boolean pcrel));
static boolean mips_relocate_section PARAMS ((bfd *, struct bfd_link_info *,
bfd *, asection *,
bfd_byte *, PTR));
0xffff, /* dst_mask */
false), /* pcrel_offset */
+ { 8 },
+ { 9 },
+ { 10 },
+ { 11 },
+
/* This reloc is a Cygnus extension used when generating position
independent code for embedded systems. It represents a 16 bit PC
relative reloc rightshifted twice as used in the MIPS branch
true, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
+ true), /* pcrel_offset */
+
+ /* This reloc is a Cygnus extension used when generating position
+ independent code for embedded systems. It represents the high 16
+ bits of a PC relative reloc. The next reloc must be
+ MIPS_R_RELLO, and the addend is formed from the addends of the
+ two instructions, just as in MIPS_R_REFHI and MIPS_R_REFLO. The
+ final value is actually PC relative to the location of the
+ MIPS_R_RELLO reloc, not the MIPS_R_RELHI reloc. */
+ HOWTO (MIPS_R_RELHI, /* type */
+ 16, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ true, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ mips_relhi_reloc, /* special_function */
+ "RELHI", /* name */
+ true, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ true), /* pcrel_offset */
+
+ /* This reloc is a Cygnus extension used when generating position
+ independent code for embedded systems. It represents the low 16
+ bits of a PC relative reloc. */
+ HOWTO (MIPS_R_RELLO, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ true, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ mips_rello_reloc, /* special_function */
+ "RELLO", /* name */
+ true, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ true), /* pcrel_offset */
+
+ { 15 },
+ { 16 },
+ { 17 },
+ { 18 },
+ { 19 },
+ { 20 },
+ { 21 },
+
+ /* This reloc is a Cygnus extension used when generating position
+ independent code for embedded systems. It represents an entry in
+ a switch table, which is the difference between two symbols in
+ the .text section. The symndx is actually the offset from the
+ reloc address to the subtrahend. See include/coff/mips.h for
+ more details. */
+ HOWTO (MIPS_R_SWITCH, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ true, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ mips_switch_reloc, /* special_function */
+ "SWITCH", /* name */
+ true, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
true) /* pcrel_offset */
};
<< RELOC_BITS1_SYMNDX_SH_LEFT_LITTLE)
| ((int) ext->r_bits[2]
<< RELOC_BITS2_SYMNDX_SH_LEFT_LITTLE));
- intern->r_type = ((ext->r_bits[3] & RELOC_BITS3_TYPE_LITTLE)
- >> RELOC_BITS3_TYPE_SH_LITTLE);
+ intern->r_type = (((ext->r_bits[3] & RELOC_BITS3_TYPE_LITTLE)
+ >> RELOC_BITS3_TYPE_SH_LITTLE)
+ | ((ext->r_bits[3] & RELOC_BITS3_TYPEHI_LITTLE)
+ << RELOC_BITS3_TYPEHI_SH_LITTLE));
intern->r_extern = (ext->r_bits[3] & RELOC_BITS3_EXTERN_LITTLE) != 0;
}
+
+ /* If this is a MIPS_R_SWITCH reloc, or an internal MIPS_R_RELHI or
+ MIPS_R_RELLO reloc, r_symndx is actually the offset from the
+ reloc address to the base of the difference (see
+ include/coff/mips.h for more details). We copy symndx into the
+ r_offset field so as not to confuse ecoff_slurp_reloc_table in
+ ecoff.c. In adjust_reloc_in we then copy r_offset into the reloc
+ addend. */
+ if (intern->r_type == MIPS_R_SWITCH
+ || (! intern->r_extern
+ && (intern->r_type == MIPS_R_RELLO
+ || intern->r_type == MIPS_R_RELHI)))
+ {
+ BFD_ASSERT (! intern->r_extern);
+ intern->r_offset = intern->r_symndx;
+ if (intern->r_offset & 0x800000)
+ intern->r_offset -= 0x1000000;
+ intern->r_symndx = RELOC_SECTION_TEXT;
+ }
}
/* Swap a reloc out. */
PTR dst;
{
RELOC *ext = (RELOC *) dst;
+ long r_symndx;
BFD_ASSERT (intern->r_extern
|| (intern->r_symndx >= 0 && intern->r_symndx <= 12));
+ /* If this is a MIPS_R_SWITCH reloc, or an internal MIPS_R_RELLO or
+ MIPS_R_RELHI reloc, we actually want to write the contents of
+ r_offset out as the symbol index. This undoes the change made by
+ mips_ecoff_swap_reloc_in. */
+ if (intern->r_type != MIPS_R_SWITCH
+ && (intern->r_extern
+ || (intern->r_type != MIPS_R_RELHI
+ && intern->r_type != MIPS_R_RELLO)))
+ r_symndx = intern->r_symndx;
+ else
+ {
+ BFD_ASSERT (intern->r_symndx == RELOC_SECTION_TEXT);
+ r_symndx = intern->r_offset & 0xffffff;
+ }
+
bfd_h_put_32 (abfd, intern->r_vaddr, (bfd_byte *) ext->r_vaddr);
if (abfd->xvec->header_byteorder_big_p != false)
{
- ext->r_bits[0] = intern->r_symndx >> RELOC_BITS0_SYMNDX_SH_LEFT_BIG;
- ext->r_bits[1] = intern->r_symndx >> RELOC_BITS1_SYMNDX_SH_LEFT_BIG;
- ext->r_bits[2] = intern->r_symndx >> RELOC_BITS2_SYMNDX_SH_LEFT_BIG;
+ ext->r_bits[0] = r_symndx >> RELOC_BITS0_SYMNDX_SH_LEFT_BIG;
+ ext->r_bits[1] = r_symndx >> RELOC_BITS1_SYMNDX_SH_LEFT_BIG;
+ ext->r_bits[2] = r_symndx >> RELOC_BITS2_SYMNDX_SH_LEFT_BIG;
ext->r_bits[3] = (((intern->r_type << RELOC_BITS3_TYPE_SH_BIG)
& RELOC_BITS3_TYPE_BIG)
| (intern->r_extern ? RELOC_BITS3_EXTERN_BIG : 0));
}
else
{
- ext->r_bits[0] = intern->r_symndx >> RELOC_BITS0_SYMNDX_SH_LEFT_LITTLE;
- ext->r_bits[1] = intern->r_symndx >> RELOC_BITS1_SYMNDX_SH_LEFT_LITTLE;
- ext->r_bits[2] = intern->r_symndx >> RELOC_BITS2_SYMNDX_SH_LEFT_LITTLE;
+ ext->r_bits[0] = r_symndx >> RELOC_BITS0_SYMNDX_SH_LEFT_LITTLE;
+ ext->r_bits[1] = r_symndx >> RELOC_BITS1_SYMNDX_SH_LEFT_LITTLE;
+ ext->r_bits[2] = r_symndx >> RELOC_BITS2_SYMNDX_SH_LEFT_LITTLE;
ext->r_bits[3] = (((intern->r_type << RELOC_BITS3_TYPE_SH_LITTLE)
& RELOC_BITS3_TYPE_LITTLE)
+ | ((intern->r_type >> RELOC_BITS3_TYPEHI_SH_LITTLE
+ & RELOC_BITS3_TYPEHI_LITTLE))
| (intern->r_extern ? RELOC_BITS3_EXTERN_LITTLE : 0));
}
}
const struct internal_reloc *intern;
arelent *rptr;
{
- if (intern->r_type > MIPS_R_PCREL16)
+ if (intern->r_type > MIPS_R_SWITCH)
abort ();
if (! intern->r_extern
/* If the type is MIPS_R_IGNORE, make sure this is a reference to
the absolute section so that the reloc is ignored. */
if (intern->r_type == MIPS_R_IGNORE)
- rptr->sym_ptr_ptr = bfd_abs_section.symbol_ptr_ptr;
+ rptr->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
+
+ /* If this is a MIPS_R_SWITCH reloc, or an internal MIPS_R_RELHI or
+ MIPS_R_RELLO reloc, we want the addend field of the BFD relocto
+ hold the value which was originally in the symndx field of the
+ internal MIPS ECOFF reloc. This value was copied into
+ intern->r_offset by mips_swap_reloc_in, and here we copy it into
+ the addend field. */
+ if (intern->r_type == MIPS_R_SWITCH
+ || (! intern->r_extern
+ && (intern->r_type == MIPS_R_RELHI
+ || intern->r_type == MIPS_R_RELLO)))
+ rptr->addend = intern->r_offset;
rptr->howto = &mips_howto_table[intern->r_type];
}
const arelent *rel;
struct internal_reloc *intern;
{
+ /* For a MIPS_R_SWITCH reloc, or an internal MIPS_R_RELHI or
+ MIPS_R_RELLO reloc, we must copy rel->addend into
+ intern->r_offset. This will then be written out as the symbol
+ index by mips_ecoff_swap_reloc_out. This operation parallels the
+ action of mips_adjust_reloc_in. */
+ if (intern->r_type == MIPS_R_SWITCH
+ || (! intern->r_extern
+ && (intern->r_type == MIPS_R_RELHI
+ || intern->r_type == MIPS_R_RELLO)))
+ intern->r_offset = rel->addend;
}
/* ECOFF relocs are either against external symbols, or against
}
ret = bfd_reloc_ok;
- if (symbol->section == &bfd_und_section
+ if (bfd_is_und_section (symbol->section)
&& output_bfd == (bfd *) NULL)
ret = bfd_reloc_undefined;
output_bfd = symbol->section->output_section->owner;
}
- if (symbol->section == &bfd_und_section
+ if (bfd_is_und_section (symbol->section)
&& relocateable == false)
return bfd_reloc_undefined;
return bfd_reloc_ok;
}
+/* Do a RELHI relocation. We do this in conjunction with a RELLO
+ reloc, just as REFHI and REFLO are done together. RELHI and RELLO
+ are Cygnus extensions used when generating position independent
+ code for embedded systems. */
+
+static bfd_byte *mips_relhi_addr;
+static bfd_vma mips_relhi_addend;
+
+static bfd_reloc_status_type
+mips_relhi_reloc (abfd,
+ reloc_entry,
+ symbol,
+ data,
+ input_section,
+ output_bfd,
+ error_message)
+ bfd *abfd;
+ arelent *reloc_entry;
+ asymbol *symbol;
+ PTR data;
+ asection *input_section;
+ bfd *output_bfd;
+ char **error_message;
+{
+ bfd_reloc_status_type ret;
+ bfd_vma relocation;
+
+ /* If this is a reloc against a section symbol, then it is correct
+ in the object file. The only time we want to change this case is
+ when we are relaxing, and that is handled entirely by
+ mips_relocate_section and never calls this function. */
+ if ((symbol->flags & BSF_SECTION_SYM) != 0)
+ {
+ if (output_bfd != (bfd *) NULL)
+ reloc_entry->address += input_section->output_offset;
+ return bfd_reloc_ok;
+ }
+
+ /* This is an external symbol. If we're relocating, we don't want
+ to change anything. */
+ if (output_bfd != (bfd *) NULL)
+ {
+ reloc_entry->address += input_section->output_offset;
+ return bfd_reloc_ok;
+ }
+
+ ret = bfd_reloc_ok;
+ if (bfd_is_und_section (symbol->section)
+ && output_bfd == (bfd *) NULL)
+ ret = bfd_reloc_undefined;
+
+ if (bfd_is_com_section (symbol->section))
+ relocation = 0;
+ else
+ relocation = symbol->value;
+
+ relocation += symbol->section->output_section->vma;
+ relocation += symbol->section->output_offset;
+ relocation += reloc_entry->addend;
+
+ if (reloc_entry->address > input_section->_cooked_size)
+ return bfd_reloc_outofrange;
+
+ /* Save the information, and let RELLO do the actual relocation. */
+ mips_relhi_addr = (bfd_byte *) data + reloc_entry->address;
+ mips_relhi_addend = relocation;
+
+ if (output_bfd != (bfd *) NULL)
+ reloc_entry->address += input_section->output_offset;
+
+ return ret;
+}
+
+/* Do a RELLO relocation. This is a straightforward 16 bit PC
+ relative relocation; this function exists in order to do the RELHI
+ relocation described above. */
+
+static bfd_reloc_status_type
+mips_rello_reloc (abfd,
+ reloc_entry,
+ symbol,
+ data,
+ input_section,
+ output_bfd,
+ error_message)
+ bfd *abfd;
+ arelent *reloc_entry;
+ asymbol *symbol;
+ PTR data;
+ asection *input_section;
+ bfd *output_bfd;
+ char **error_message;
+{
+ if (mips_relhi_addr != (bfd_byte *) NULL)
+ {
+ unsigned long insn;
+ unsigned long val;
+ unsigned long vallo;
+
+ /* Do the RELHI relocation. Note that we actually don't need to
+ know anything about the RELLO itself, except where to find
+ the low 16 bits of the addend needed by the RELHI. */
+ insn = bfd_get_32 (abfd, mips_relhi_addr);
+ vallo = (bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address)
+ & 0xffff);
+ val = ((insn & 0xffff) << 16) + vallo;
+ val += mips_relhi_addend;
+
+ /* If the symbol is defined, make val PC relative. If the
+ symbol is not defined we don't want to do this, because we
+ don't want the value in the object file to incorporate the
+ address of the reloc. */
+ if (! bfd_is_und_section (bfd_get_section (symbol))
+ && ! bfd_is_com_section (bfd_get_section (symbol)))
+ val -= (input_section->output_section->vma
+ + input_section->output_offset
+ + reloc_entry->address);
+
+ /* The low order 16 bits are always treated as a signed value.
+ Therefore, a negative value in the low order bits requires an
+ adjustment in the high order bits. We need to make this
+ adjustment in two ways: once for the bits we took from the
+ data, and once for the bits we are putting back in to the
+ data. */
+ if ((vallo & 0x8000) != 0)
+ val -= 0x10000;
+ if ((val & 0x8000) != 0)
+ val += 0x10000;
+
+ insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff);
+ bfd_put_32 (abfd, insn, mips_relhi_addr);
+
+ mips_relhi_addr = (bfd_byte *) NULL;
+ }
+
+ /* If this is a reloc against a section symbol, then it is correct
+ in the object file. The only time we want to change this case is
+ when we are relaxing, and that is handled entirely by
+ mips_relocate_section and never calls this function. */
+ if ((symbol->flags & BSF_SECTION_SYM) != 0)
+ {
+ if (output_bfd != (bfd *) NULL)
+ reloc_entry->address += input_section->output_offset;
+ return bfd_reloc_ok;
+ }
+
+ /* bfd_perform_relocation does not handle pcrel_offset relocations
+ correctly when generating a relocateable file, so handle them
+ directly here. */
+ if (output_bfd != (bfd *) NULL)
+ {
+ reloc_entry->address += input_section->output_offset;
+ return bfd_reloc_ok;
+ }
+
+ /* Now do the RELLO reloc in the usual way. */
+ return mips_generic_reloc (abfd, reloc_entry, symbol, data,
+ input_section, output_bfd, error_message);
+}
+
+/* This is the special function for the MIPS_R_SWITCH reloc. This
+ special reloc is normally correct in the object file, and only
+ requires special handling when relaxing. We don't want
+ bfd_perform_relocation to tamper with it at all. */
+
+/*ARGSUSED*/
+static bfd_reloc_status_type
+mips_switch_reloc (abfd,
+ reloc_entry,
+ symbol,
+ data,
+ input_section,
+ output_bfd,
+ error_message)
+ bfd *abfd;
+ arelent *reloc_entry;
+ asymbol *symbol;
+ PTR data;
+ asection *input_section;
+ bfd *output_bfd;
+ char **error_message;
+{
+ return bfd_reloc_ok;
+}
+
/* Get the howto structure for a generic reloc type. */
static CONST struct reloc_howto_struct *
case BFD_RELOC_16_PCREL_S2:
mips_type = MIPS_R_PCREL16;
break;
+ case BFD_RELOC_PCREL_HI16_S:
+ mips_type = MIPS_R_RELHI;
+ break;
+ case BFD_RELOC_PCREL_LO16:
+ mips_type = MIPS_R_RELLO;
+ break;
+ case BFD_RELOC_GPREL32:
+ mips_type = MIPS_R_SWITCH;
+ break;
default:
return (CONST struct reloc_howto_struct *) NULL;
}
}
\f
/* A helper routine for mips_relocate_section which handles the REFHI
- relocation. The REFHI relocation must be followed by a REFLO
- relocation, and the addend used is formed from the addends of both
- instructions. */
+ and RELHI relocations. The REFHI relocation must be followed by a
+ REFLO relocation (and RELHI by a RELLO), and the addend used is
+ formed from the addends of both instructions. */
static void
-mips_relocate_refhi (refhi, reflo, input_bfd, input_section, contents,
- adjust, relocation)
+mips_relocate_hi (refhi, reflo, input_bfd, input_section, contents, adjust,
+ relocation, pcrel)
struct internal_reloc *refhi;
struct internal_reloc *reflo;
bfd *input_bfd;
bfd_byte *contents;
size_t adjust;
bfd_vma relocation;
+ boolean pcrel;
{
unsigned long insn;
unsigned long val;
and once for the bits we are putting back in to the data. */
if ((vallo & 0x8000) != 0)
val -= 0x10000;
+
+ if (pcrel)
+ val -= (input_section->output_section->vma
+ + input_section->output_offset
+ + (reflo->r_vaddr - input_section->vma + adjust));
+
if ((val & 0x8000) != 0)
val += 0x10000;
struct external_reloc *ext_rel;
struct external_reloc *ext_rel_end;
unsigned int i;
- boolean got_reflo;
- struct internal_reloc reflo_int_rel;
+ boolean got_lo;
+ struct internal_reloc lo_int_rel;
BFD_ASSERT (input_bfd->xvec->header_byteorder_big_p
== output_bfd->xvec->header_byteorder_big_p);
else
gp_undefined = false;
- got_reflo = false;
+ got_lo = false;
adjust = 0;
bfd_vma relocation;
bfd_reloc_status_type r;
- if (! got_reflo)
+ if (! got_lo)
mips_ecoff_swap_reloc_in (input_bfd, (PTR) ext_rel, &int_rel);
else
{
- int_rel = reflo_int_rel;
- got_reflo = false;
+ int_rel = lo_int_rel;
+ got_lo = false;
}
BFD_ASSERT (int_rel.r_type
< sizeof mips_howto_table / sizeof mips_howto_table[0]);
- /* The REFHI reloc requires special handling. It must be
- followed by a REFLO reloc, and the addend is formed from both
- fields. */
- if (int_rel.r_type == MIPS_R_REFHI)
+ /* The REFHI and RELHI relocs requires special handling. they
+ must be followed by a REFLO or RELLO reloc, respectively, and
+ the addend is formed from both relocs. */
+ if (int_rel.r_type == MIPS_R_REFHI
+ || int_rel.r_type == MIPS_R_RELHI)
{
BFD_ASSERT ((ext_rel + 1) < ext_rel_end);
mips_ecoff_swap_reloc_in (input_bfd, (PTR) (ext_rel + 1),
- &reflo_int_rel);
- BFD_ASSERT (reflo_int_rel.r_type == MIPS_R_REFLO
- && int_rel.r_extern == reflo_int_rel.r_extern
- && int_rel.r_symndx == reflo_int_rel.r_symndx);
- got_reflo = true;
+ &lo_int_rel);
+ BFD_ASSERT ((lo_int_rel.r_type
+ == (int_rel.r_type == MIPS_R_REFHI
+ ? MIPS_R_REFLO
+ : MIPS_R_RELLO))
+ && int_rel.r_extern == lo_int_rel.r_extern
+ && int_rel.r_symndx == lo_int_rel.r_symndx);
+ got_lo = true;
}
howto = &mips_howto_table[int_rel.r_type];
+ /* The SWITCH reloc must be handled specially. This reloc is
+ marks the location of a difference between two portions of an
+ object file. The symbol index does not reference a symbol,
+ but is actually the offset from the reloc to the subtrahend
+ of the difference. This reloc is correct in the object file,
+ and needs no further adjustment, unless we are relaxing. If
+ we are relaxing, we may have to add in an offset. Since no
+ symbols are involved in this reloc, we handle it completely
+ here. */
+ if (int_rel.r_type == MIPS_R_SWITCH)
+ {
+ if (offsets != NULL
+ && offsets[i] != 0)
+ {
+ r = _bfd_relocate_contents (howto, input_bfd,
+ (bfd_vma) offsets[i],
+ (contents
+ + adjust
+ + int_rel.r_vaddr
+ - input_section->vma));
+ BFD_ASSERT (r == bfd_reloc_ok);
+ }
+
+ continue;
+ }
+
if (int_rel.r_extern)
{
h = sym_hashes[int_rel.r_symndx];
&& offsets[i] != 0)
{
BFD_ASSERT (! info->relocateable);
- BFD_ASSERT (int_rel.r_type == MIPS_R_PCREL16);
+ BFD_ASSERT (int_rel.r_type == MIPS_R_PCREL16
+ || int_rel.r_type == MIPS_R_RELHI
+ || int_rel.r_type == MIPS_R_RELLO);
if (offsets[i] != 1)
- {
- BFD_ASSERT (! int_rel.r_extern);
- addend += offsets[i];
- }
+ addend += offsets[i];
else
{
bfd_byte *here;
- BFD_ASSERT (int_rel.r_extern);
+ BFD_ASSERT (int_rel.r_extern
+ && int_rel.r_type == MIPS_R_PCREL16);
/* Move the rest of the instructions up. */
here = (contents
}
}
+ /* If we are relaxing, and this is a reloc against the .text
+ segment, we may need to adjust it if some branches have been
+ expanded. The reloc types which are likely to occur in the
+ .text section are handled efficiently by mips_relax_section,
+ and thus do not need to be handled here. */
+ if (ecoff_data (input_bfd)->debug_info.adjust != NULL
+ && ! int_rel.r_extern
+ && int_rel.r_symndx == RELOC_SECTION_TEXT
+ && (strcmp (bfd_get_section_name (input_bfd, input_section),
+ ".text") != 0
+ || (int_rel.r_type != MIPS_R_PCREL16
+ && int_rel.r_type != MIPS_R_SWITCH
+ && int_rel.r_type != MIPS_R_RELHI
+ && int_rel.r_type != MIPS_R_RELLO)))
+ {
+ bfd_vma adr;
+ struct ecoff_value_adjust *a;
+
+ /* We need to get the addend so that we know whether we need
+ to adjust the address. */
+ BFD_ASSERT (int_rel.r_type == MIPS_R_REFWORD);
+
+ adr = bfd_get_32 (input_bfd,
+ (contents
+ + adjust
+ + int_rel.r_vaddr
+ - input_section->vma));
+
+ for (a = ecoff_data (input_bfd)->debug_info.adjust;
+ a != (struct ecoff_value_adjust *) NULL;
+ a = a->next)
+ {
+ if (adr >= a->start && adr < a->end)
+ addend += a->adjust;
+ }
+ }
+
if (info->relocateable)
{
/* We are generating relocateable output, and must convert
currently holds just the addend. We must adjust
by the address to get the right value. */
if (howto->pc_relative)
- relocation -= int_rel.r_vaddr - input_section->vma;
+ {
+ relocation -= int_rel.r_vaddr - input_section->vma;
+
+ /* If we are converting a RELHI or RELLO reloc
+ from being against an external symbol to
+ being against a section, we must put a
+ special value into the r_offset field. This
+ value is the old addend. The r_offset for
+ both the RELOHI and RELLO relocs are the
+ same, and we set both when we see RELHI. */
+ if (int_rel.r_type == MIPS_R_RELHI)
+ {
+ long addhi, addlo;
+
+ addhi = bfd_get_32 (input_bfd,
+ (contents
+ + adjust
+ + int_rel.r_vaddr
+ - input_section->vma));
+ addhi &= 0xffff;
+ if (addhi & 0x8000)
+ addhi -= 0x10000;
+ addhi <<= 16;
+
+ addlo = bfd_get_32 (input_bfd,
+ (contents
+ + adjust
+ + lo_int_rel.r_vaddr
+ - input_section->vma));
+ addlo &= 0xffff;
+ if (addlo & 0x8000)
+ addlo -= 0x10000;
+
+ int_rel.r_offset = addhi + addlo;
+ lo_int_rel.r_offset = int_rel.r_offset;
+ }
+ }
h = NULL;
}
}
relocation += addend;
+ addend = 0;
/* Adjust a PC relative relocation by removing the reference
to the original address in the section and including the
- reference to the new address. */
- if (howto->pc_relative)
+ reference to the new address. However, external RELHI
+ and RELLO relocs are PC relative, but don't include any
+ reference to the address. The addend is merely an
+ addend. */
+ if (howto->pc_relative
+ && (! int_rel.r_extern
+ || (int_rel.r_type != MIPS_R_RELHI
+ && int_rel.r_type != MIPS_R_RELLO)))
relocation -= (input_section->output_section->vma
+ input_section->output_offset
- input_section->vma);
r = bfd_reloc_ok;
else
{
- if (int_rel.r_type != MIPS_R_REFHI)
+ if (int_rel.r_type != MIPS_R_REFHI
+ && int_rel.r_type != MIPS_R_RELHI)
r = _bfd_relocate_contents (howto, input_bfd, relocation,
(contents
+ adjust
- input_section->vma));
else
{
- mips_relocate_refhi (&int_rel, &reflo_int_rel,
- input_bfd, input_section, contents,
- adjust, relocation);
+ mips_relocate_hi (&int_rel, &lo_int_rel,
+ input_bfd, input_section, contents,
+ adjust, relocation,
+ int_rel.r_type == MIPS_R_RELHI);
r = bfd_reloc_ok;
}
}
file. Make it look like a pcrel_offset relocation by
adding in the start address. */
if (howto->pc_relative)
- relocation += int_rel.r_vaddr + adjust;
+ {
+ if (int_rel.r_type != MIPS_R_RELHI)
+ relocation += int_rel.r_vaddr + adjust;
+ else
+ relocation += lo_int_rel.r_vaddr + adjust;
+ }
}
- if (int_rel.r_type != MIPS_R_REFHI)
+ if (int_rel.r_type != MIPS_R_REFHI
+ && int_rel.r_type != MIPS_R_RELHI)
r = _bfd_final_link_relocate (howto,
input_bfd,
input_section,
addend);
else
{
- mips_relocate_refhi (&int_rel, &reflo_int_rel, input_bfd,
- input_section, contents, adjust,
- relocation);
+ mips_relocate_hi (&int_rel, &lo_int_rel, input_bfd,
+ input_section, contents, adjust,
+ relocation,
+ int_rel.r_type == MIPS_R_RELHI);
r = bfd_reloc_ok;
}
}
+ /* MIPS_R_JMPADDR requires peculiar overflow detection. The
+ instruction provides a 28 bit address (the two lower bits are
+ implicit zeroes) which is combined with the upper four bits
+ of the instruction address. */
+ if (r == bfd_reloc_ok
+ && int_rel.r_type == MIPS_R_JMPADDR
+ && (((relocation
+ + addend
+ + (int_rel.r_extern ? 0 : s->vma))
+ & 0xf0000000)
+ != ((input_section->output_section->vma
+ + input_section->output_offset
+ + (int_rel.r_vaddr - input_section->vma)
+ + adjust)
+ & 0xf0000000)))
+ r = bfd_reloc_overflow;
+
if (r != bfd_reloc_ok)
{
switch (r)
offsets[i] = 1;
- /* Now look for all PC relative branches that cross this reloc
- and adjust their offsets. We will turn the single branch
- instruction into a four instruction sequence. In this loop
- we are only interested in local PC relative branches. */
+ /* Now look for all PC relative references that cross this reloc
+ and adjust their offsets. */
adj_ext_rel = (struct external_reloc *) section_tdata->external_relocs;
for (adj_i = 0; adj_ext_rel < ext_rel_end; adj_ext_rel++, adj_i++)
{
struct internal_reloc adj_int_rel;
- unsigned long insn;
- bfd_vma dst;
+ bfd_vma start, stop;
+ int change;
- /* Quickly check that this reloc is internal PCREL16. */
- if (abfd->xvec->header_byteorder_big_p)
+ mips_ecoff_swap_reloc_in (abfd, (PTR) adj_ext_rel, &adj_int_rel);
+
+ if (adj_int_rel.r_type == MIPS_R_PCREL16)
{
- if ((adj_ext_rel->r_bits[3] & RELOC_BITS3_EXTERN_BIG) != 0
- || (((adj_ext_rel->r_bits[3] & RELOC_BITS3_TYPE_BIG)
- >> RELOC_BITS3_TYPE_SH_BIG)
- != MIPS_R_PCREL16))
+ unsigned long insn;
+
+ /* We only care about local references. External ones
+ will be relocated correctly anyhow. */
+ if (adj_int_rel.r_extern)
+ continue;
+
+ /* We are only interested in a PC relative reloc within
+ this section. FIXME: Cross section PC relative
+ relocs may not be handled correctly; does anybody
+ care? */
+ if (adj_int_rel.r_symndx != RELOC_SECTION_TEXT)
continue;
+
+ start = adj_int_rel.r_vaddr;
+
+ insn = bfd_get_32 (abfd,
+ contents + adj_int_rel.r_vaddr - sec->vma);
+
+ stop = (insn & 0xffff) << 2;
+ if ((stop & 0x20000) != 0)
+ stop -= 0x40000;
+ stop += adj_int_rel.r_vaddr + 4;
}
- else
+ else if (adj_int_rel.r_type == MIPS_R_RELHI)
{
- if ((adj_ext_rel->r_bits[3] & RELOC_BITS3_EXTERN_LITTLE) != 0
- || (((adj_ext_rel->r_bits[3] & RELOC_BITS3_TYPE_LITTLE)
- >> RELOC_BITS3_TYPE_SH_LITTLE)
- != MIPS_R_PCREL16))
- continue;
+ struct internal_reloc rello;
+ long addhi, addlo;
+
+ /* The next reloc must be MIPS_R_RELLO, and we handle
+ them together. */
+ BFD_ASSERT (adj_ext_rel + 1 < ext_rel_end);
+
+ mips_ecoff_swap_reloc_in (abfd, (PTR) (adj_ext_rel + 1), &rello);
+
+ BFD_ASSERT (rello.r_type == MIPS_R_RELLO);
+
+ addhi = bfd_get_32 (abfd,
+ contents + adj_int_rel.r_vaddr - sec->vma);
+ addhi &= 0xffff;
+ if (addhi & 0x8000)
+ addhi -= 0x10000;
+ addhi <<= 16;
+
+ addlo = bfd_get_32 (abfd, contents + rello.r_vaddr - sec->vma);
+ addlo &= 0xffff;
+ if (addlo & 0x8000)
+ addlo -= 0x10000;
+
+ if (adj_int_rel.r_extern)
+ {
+ /* The value we want here is
+ sym - RELLOaddr + addend
+ which we can express as
+ sym - (RELLOaddr - addend)
+ Therefore if we are expanding the area between
+ RELLOaddr and RELLOaddr - addend we must adjust
+ the addend. This is admittedly ambiguous, since
+ we might mean (sym + addend) - RELLOaddr, but in
+ practice we don't, and there is no way to handle
+ that case correctly since at this point we have
+ no idea whether any reloc is being expanded
+ between sym and sym + addend. */
+ start = rello.r_vaddr - (addhi + addlo);
+ stop = rello.r_vaddr;
+ }
+ else
+ {
+ /* An internal RELHI/RELLO pair represents the
+ difference between two addresses, $LC0 - foo.
+ The symndx value is actually the difference
+ between the reloc address and $LC0. This lets us
+ compute $LC0, and, by considering the addend,
+ foo. If the reloc we are expanding falls between
+ those two relocs, we must adjust the addend. At
+ this point, the symndx value is actually in the
+ r_offset field, where it was put by
+ mips_ecoff_swap_reloc_in. */
+ start = rello.r_vaddr - adj_int_rel.r_offset;
+ stop = start + addhi + addlo;
+ }
}
+ else if (adj_int_rel.r_type == MIPS_R_SWITCH)
+ {
+ /* A MIPS_R_SWITCH reloc represents a word of the form
+ .word $L3-$LS12
+ The value in the object file is correct, assuming the
+ original value of $L3. The symndx value is actually
+ the difference between the reloc address and $LS12.
+ This lets us compute the original value of $LS12 as
+ vaddr - symndx
+ and the original value of $L3 as
+ vaddr - symndx + addend
+ where addend is the value from the object file. At
+ this point, the symndx value is actually found in the
+ r_offset field, since it was moved by
+ mips_ecoff_swap_reloc_in. */
+ start = adj_int_rel.r_vaddr - adj_int_rel.r_offset;
+ stop = start + bfd_get_32 (abfd,
+ (contents
+ + adj_int_rel.r_vaddr
+ - sec->vma));
+ }
+ else
+ continue;
- mips_ecoff_swap_reloc_in (abfd, (PTR) adj_ext_rel, &adj_int_rel);
+ /* If the range expressed by this reloc, which is the
+ distance between START and STOP crosses the reloc we are
+ expanding, we must adjust the offset. The sign of the
+ adjustment depends upon the direction in which the range
+ crosses the reloc being expanded. */
+ if (start <= int_rel.r_vaddr && stop > int_rel.r_vaddr)
+ change = PCREL16_EXPANSION_ADJUSTMENT;
+ else if (start > int_rel.r_vaddr && stop <= int_rel.r_vaddr)
+ change = - PCREL16_EXPANSION_ADJUSTMENT;
+ else
+ change = 0;
- /* We are only interested in a PC relative reloc within this
- section. FIXME: Cross section PC relative relocs may not
- be handled correctly; does anybody care? */
- if (adj_int_rel.r_symndx != RELOC_SECTION_TEXT)
- continue;
+ offsets[adj_i] += change;
- /* Fetch the branch instruction. */
- insn = bfd_get_32 (abfd, contents + adj_int_rel.r_vaddr - sec->vma);
-
- /* Work out the destination address. */
- dst = (insn & 0xffff) << 2;
- if ((dst & 0x20000) != 0)
- dst -= 0x40000;
- dst += adj_int_rel.r_vaddr + 4;
-
- /* If this branch crosses the branch we just decided to
- expand, adjust the offset appropriately. */
- if (adj_int_rel.r_vaddr < int_rel.r_vaddr
- && dst > int_rel.r_vaddr)
- offsets[adj_i] += PCREL16_EXPANSION_ADJUSTMENT;
- else if (adj_int_rel.r_vaddr > int_rel.r_vaddr
- && dst <= int_rel.r_vaddr)
- offsets[adj_i] -= PCREL16_EXPANSION_ADJUSTMENT;
+ if (adj_int_rel.r_type == MIPS_R_RELHI)
+ {
+ adj_ext_rel++;
+ adj_i++;
+ offsets[adj_i] += change;
+ }
}
/* Find all symbols in this section defined by this object file
(unsigned (*) PARAMS ((bfd *,PTR,PTR))) bfd_void, /* reloc_out */
mips_ecoff_swap_filehdr_out, mips_ecoff_swap_aouthdr_out,
mips_ecoff_swap_scnhdr_out,
- FILHSZ, AOUTSZ, SCNHSZ, 0, 0, 0, true,
+ FILHSZ, AOUTSZ, SCNHSZ, 0, 0, 0, 0, true,
mips_ecoff_swap_filehdr_in, mips_ecoff_swap_aouthdr_in,
- mips_ecoff_swap_scnhdr_in, mips_ecoff_bad_format_hook,
- ecoff_set_arch_mach_hook, ecoff_mkobject_hook,
- ecoff_styp_to_sec_flags, ecoff_make_section_hook, ecoff_set_alignment_hook,
- ecoff_slurp_symbol_table, NULL, NULL
+ mips_ecoff_swap_scnhdr_in, NULL,
+ mips_ecoff_bad_format_hook, _bfd_ecoff_set_arch_mach_hook,
+ _bfd_ecoff_mkobject_hook, _bfd_ecoff_styp_to_sec_flags,
+ _bfd_ecoff_make_section_hook, _bfd_ecoff_set_alignment_hook,
+ _bfd_ecoff_slurp_symbol_table,
+ NULL, NULL, NULL, NULL, NULL, NULL
},
/* Supported architecture. */
bfd_arch_mips,
ecoff_swap_fdr_in,
ecoff_swap_rfd_in,
ecoff_swap_ext_in,
+ _bfd_ecoff_swap_tir_in,
+ _bfd_ecoff_swap_rndx_in,
/* Functions to swap out external symbolic data. */
ecoff_swap_hdr_out,
ecoff_swap_dnr_out,
ecoff_swap_opt_out,
ecoff_swap_fdr_out,
ecoff_swap_rfd_out,
- ecoff_swap_ext_out
+ ecoff_swap_ext_out,
+ _bfd_ecoff_swap_tir_out,
+ _bfd_ecoff_swap_rndx_out,
+ /* Function to read in symbolic data. */
+ _bfd_ecoff_slurp_symbolic_info
},
/* External reloc size. */
RELSZ,
};
/* Looking up a reloc type is MIPS specific. */
-#define ecoff_bfd_reloc_type_lookup mips_bfd_reloc_type_lookup
+#define _bfd_ecoff_bfd_reloc_type_lookup mips_bfd_reloc_type_lookup
/* Getting relocated section contents is generic. */
-#define ecoff_bfd_get_relocated_section_contents \
+#define _bfd_ecoff_bfd_get_relocated_section_contents \
bfd_generic_get_relocated_section_contents
/* Relaxing sections is MIPS specific. */
-#define ecoff_bfd_relax_section mips_relax_section
+#define _bfd_ecoff_bfd_relax_section mips_relax_section
-/* Core file support is usually traditional (but note that Irix uses
- irix-core.c). */
-#define ecoff_core_file_p _bfd_dummy_target
-#define ecoff_core_file_failing_command _bfd_dummy_core_file_failing_command
-#define ecoff_core_file_failing_signal _bfd_dummy_core_file_failing_signal
-#define ecoff_core_file_matches_executable_p \
- _bfd_dummy_core_file_matches_executable_p
-
-bfd_target ecoff_little_vec =
+const bfd_target ecoff_little_vec =
{
"ecoff-littlemips", /* name */
bfd_target_ecoff_flavour,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
- ecoff_archive_p, _bfd_dummy_target},
- {bfd_false, ecoff_mkobject, /* bfd_set_format */
+ _bfd_ecoff_archive_p, _bfd_dummy_target},
+ {bfd_false, _bfd_ecoff_mkobject, /* bfd_set_format */
_bfd_generic_mkarchive, bfd_false},
- {bfd_false, ecoff_write_object_contents, /* bfd_write_contents */
+ {bfd_false, _bfd_ecoff_write_object_contents, /* bfd_write_contents */
_bfd_write_archive_contents, bfd_false},
- JUMP_TABLE (ecoff),
+
+ BFD_JUMP_TABLE_GENERIC (_bfd_ecoff),
+ BFD_JUMP_TABLE_COPY (_bfd_ecoff),
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_ecoff),
+ BFD_JUMP_TABLE_SYMBOLS (_bfd_ecoff),
+ BFD_JUMP_TABLE_RELOCS (_bfd_ecoff),
+ BFD_JUMP_TABLE_WRITE (_bfd_ecoff),
+ BFD_JUMP_TABLE_LINK (_bfd_ecoff),
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
(PTR) &mips_ecoff_backend_data
};
-bfd_target ecoff_big_vec =
+const bfd_target ecoff_big_vec =
{
"ecoff-bigmips", /* name */
bfd_target_ecoff_flavour,
bfd_getb32, bfd_getb_signed_32, bfd_putb32,
bfd_getb16, bfd_getb_signed_16, bfd_putb16,
{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
- ecoff_archive_p, ecoff_core_file_p},
- {bfd_false, ecoff_mkobject, /* bfd_set_format */
+ _bfd_ecoff_archive_p, _bfd_dummy_target},
+ {bfd_false, _bfd_ecoff_mkobject, /* bfd_set_format */
_bfd_generic_mkarchive, bfd_false},
- {bfd_false, ecoff_write_object_contents, /* bfd_write_contents */
+ {bfd_false, _bfd_ecoff_write_object_contents, /* bfd_write_contents */
_bfd_write_archive_contents, bfd_false},
- JUMP_TABLE(ecoff),
+
+ BFD_JUMP_TABLE_GENERIC (_bfd_ecoff),
+ BFD_JUMP_TABLE_COPY (_bfd_ecoff),
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_ecoff),
+ BFD_JUMP_TABLE_SYMBOLS (_bfd_ecoff),
+ BFD_JUMP_TABLE_RELOCS (_bfd_ecoff),
+ BFD_JUMP_TABLE_WRITE (_bfd_ecoff),
+ BFD_JUMP_TABLE_LINK (_bfd_ecoff),
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
(PTR) &mips_ecoff_backend_data
- /* Note that there is another bfd_target just above this one. If
- you are adding initializers here, you should be adding them there
- as well. */
};
projects / deliverable / binutils-gdb.git / blobdiff