Add support for RISC-V architecture.

[deliverable/binutils-gdb.git] / bfd / config.bfd

diff --git a/bfd/config.bfd b/bfd/config.bfd
index d0aa5533c89a78be2877fbd41247946966d5815a..98663fd0af4c00d34192319bf48ad8928ea5fec1 100644 (file)
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -122,6 +122,7 @@ or1k*|or1knd*)       targ_archs=bfd_or1k_arch ;;
 pdp11*)                 targ_archs=bfd_pdp11_arch ;;
 pj*)            targ_archs="bfd_pj_arch bfd_i386_arch";;
 powerpc*)       targ_archs="bfd_rs6000_arch bfd_powerpc_arch" ;;
+riscv*)                 targ_archs=bfd_riscv_arch ;;
 rs6000)                 targ_archs="bfd_rs6000_arch bfd_powerpc_arch" ;;
 s390*)          targ_archs=bfd_s390_arch ;;
 sh*)            targ_archs=bfd_sh_arch ;;
@@ -276,7 +277,12 @@ case "${targ}" in
     targ_defvec=am33_elf32_linux_vec
     ;;
 
-  arc*-*-elf* | arc*-*-linux-uclibc*)
+  arc*eb-*-elf* | arc*eb-*-linux*)
+    targ_defvec=arc_elf32_be_vec
+    targ_selvecs=arc_elf32_le_vec
+    ;;
+
+  arc*-*-elf* | arc*-*-linux*)
     targ_defvec=arc_elf32_le_vec
     targ_selvecs=arc_elf32_be_vec
     ;;
@@ -349,6 +355,10 @@ case "${targ}" in
     targ_selvecs=arm_coff_be_vec
     targ_underscore=yes
     ;;
+  arm-*-phoenix*)
+    targ_defvec=arm_elf32_le_vec
+    targ_selvecs=arm_elf32_be_vec
+    ;;
   arm-*-rtems*)
     targ_defvec=arm_elf32_le_vec
     targ_selvecs=arm_elf32_be_vec
@@ -1076,15 +1086,11 @@ case "${targ}" in
     targ_defvec=mips_elf32_trad_be_vec
     targ_selvecs="mips_elf32_trad_le_vec mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
     ;;
-  mips*el-*-elf* | mips*el-*-vxworks* | mips*-*-chorus*)
+  mips*el-*-elf* | mips*-*-chorus*)
     targ_defvec=mips_elf32_le_vec
     targ_selvecs="mips_elf32_be_vec mips_elf64_be_vec mips_elf64_le_vec"
     ;;
-  mips*-*-elf* | mips*-*-rtems* | mips*-*-vxworks | mips*-*-windiss)
-    targ_defvec=mips_elf32_be_vec
-    targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec"
-    ;;
-  mips*-*-none)
+  mips*-*-elf* | mips*-*-rtems* | mips*-*-windiss | mips*-*-none)
     targ_defvec=mips_elf32_be_vec
     targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec"
     ;;
@@ -1354,6 +1360,20 @@ case "${targ}" in
     targ_selvecs="powerpc_pei_le_vec powerpc_pei_vec powerpc_pe_le_vec powerpc_pe_vec"
     ;;
 
+#ifdef BFD64
+  riscv32-*-*)
+    targ_defvec=riscv_elf32_vec
+    targ_selvecs="riscv_elf32_vec"
+    want64=true
+    ;;
+
+  riscv64-*-*)
+    targ_defvec=riscv_elf64_vec
+    targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
+    want64=true
+    ;;
+#endif
+
   rl78-*-elf)
     targ_defvec=rl78_elf32_vec
     ;;