Merge branch 'master' into merge-job
[deliverable/binutils-gdb.git] / bfd / configure
index 66e6178f47389c2c6d770bfb875be8493b3402fc..3b797ac0cab484d61ea003e5e77ccffc04968660 100755 (executable)
@@ -4,7 +4,7 @@
 #
 #
 # Copyright (C) 1992-1996, 1998-2012 Free Software Foundation, Inc.
-# Copyright (C) 2019 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (C) 2019-2020 Advanced Micro Devices, Inc. All rights reserved.
 #
 #
 # This configure script is free software; the Free Software Foundation
@@ -14925,7 +14925,6 @@ do
     tic6x_elf32_c6000_le_vec)   tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
     tic6x_elf32_linux_be_vec)   tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
     tic6x_elf32_linux_le_vec)   tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
-    tic80_coff_vec)             tb="$tb coff-tic80.lo $coff" ;;
     tilegx_elf32_be_vec)        tb="$tb elf32-tilegx.lo elfxx-tilegx.lo elf32.lo $elf" ; target_size=32 ;;
     tilegx_elf32_le_vec)        tb="$tb elf32-tilegx.lo elfxx-tilegx.lo elf32.lo $elf" ; target_size=32 ;;
     tilegx_elf64_be_vec)        tb="$tb elf64-tilegx.lo elfxx-tilegx.lo elf64.lo $elf" ; target_size=64 ;;
@@ -14958,6 +14957,7 @@ do
     xtensa_elf32_be_vec)        tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
     xtensa_elf32_le_vec)        tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
     z80_coff_vec)               tb="$tb coff-z80.lo reloc16.lo $coffgen" ;;
+    z80_elf32_vec)              tb="$tb elf32-z80.lo elf32.lo $elf" ;;
     z8k_coff_vec)               tb="$tb coff-z8k.lo reloc16.lo $coff" ;;
 
     # These appear out of order in targets.c
This page took 0.026163 seconds and 4 git commands to generate.