/* 32-bit ELF support for ARM
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
- 2008, 2009, 2010 Free Software Foundation, Inc.
+ 2008, 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
#include <limits.h>
#include "bfd.h"
+#include "bfd_stdint.h"
#include "libiberty.h"
#include "libbfd.h"
#include "elf-bfd.h"
+#include "elf-nacl.h"
#include "elf-vxworks.h"
#include "elf/arm.h"
#define ARM_ELF_ABI_VERSION 0
#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
+/* The Adjusted Place, as defined by AAELF. */
+#define Pa(X) ((X) & 0xfffffffc)
+
static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
struct bfd_link_info *link_info,
asection *sec,
bfd_elf_generic_reloc, /* special_function */
"R_ARM_THM_CALL", /* name */
FALSE, /* partial_inplace */
- 0x07ff07ff, /* src_mask */
- 0x07ff07ff, /* dst_mask */
+ 0x07ff2fff, /* src_mask */
+ 0x07ff2fff, /* dst_mask */
TRUE), /* pcrel_offset */
HOWTO (R_ARM_THM_PC8, /* type */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
- HOWTO (R_ARM_SWI24, /* type */
+ HOWTO (R_ARM_TLS_DESC, /* type */
0, /* rightshift */
- 0, /* size (0 = byte, 1 = short, 2 = long) */
- 0, /* bitsize */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
- complain_overflow_signed,/* complain_on_overflow */
+ complain_overflow_bitfield,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
- "R_ARM_SWI24", /* name */
+ "R_ARM_TLS_DESC", /* name */
FALSE, /* partial_inplace */
- 0x00000000, /* src_mask */
- 0x00000000, /* dst_mask */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_ARM_THM_SWI8, /* type */
HOWTO (R_ARM_XPC25, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
- 25, /* bitsize */
+ 24, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed,/* complain_on_overflow */
HOWTO (R_ARM_THM_XPC22, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
- 22, /* bitsize */
+ 24, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_ARM_THM_XPC22", /* name */
FALSE, /* partial_inplace */
- 0x07ff07ff, /* src_mask */
- 0x07ff07ff, /* dst_mask */
+ 0x07ff2fff, /* src_mask */
+ 0x07ff2fff, /* dst_mask */
TRUE), /* pcrel_offset */
/* Dynamic TLS relocations. */
HOWTO (R_ARM_TLS_DTPMOD32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_TLS_DTPMOD32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_TLS_DTPMOD32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_TLS_DTPOFF32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_TLS_DTPOFF32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_TLS_DTPOFF32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_TLS_TPOFF32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_TLS_TPOFF32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_TLS_TPOFF32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
/* Relocs used in ARM Linux */
HOWTO (R_ARM_COPY, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_COPY", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_COPY", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_GLOB_DAT, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_GLOB_DAT", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_GLOB_DAT", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_JUMP_SLOT, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_JUMP_SLOT", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_JUMP_SLOT", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_RELATIVE, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_RELATIVE", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_RELATIVE", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_GOTOFF32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_GOTOFF32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_GOTOFF32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_GOTPC, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- TRUE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_GOTPC", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- TRUE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_GOTPC", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ TRUE), /* pcrel_offset */
HOWTO (R_ARM_GOT32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_GOT32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_GOT32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_PLT32, /* type */
- 2, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 24, /* bitsize */
- TRUE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_PLT32", /* name */
- FALSE, /* partial_inplace */
- 0x00ffffff, /* src_mask */
- 0x00ffffff, /* dst_mask */
- TRUE), /* pcrel_offset */
+ 2, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 24, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_PLT32", /* name */
+ FALSE, /* partial_inplace */
+ 0x00ffffff, /* src_mask */
+ 0x00ffffff, /* dst_mask */
+ TRUE), /* pcrel_offset */
HOWTO (R_ARM_CALL, /* type */
2, /* rightshift */
0x040f70ff, /* dst_mask */
FALSE), /* pcrel_offset */
- EMPTY_HOWTO (90), /* Unallocated. */
- EMPTY_HOWTO (91),
- EMPTY_HOWTO (92),
- EMPTY_HOWTO (93),
+ HOWTO (R_ARM_TLS_GOTDESC, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ NULL, /* special_function */
+ "R_ARM_TLS_GOTDESC", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_ARM_TLS_CALL, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 24, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_TLS_CALL", /* name */
+ FALSE, /* partial_inplace */
+ 0x00ffffff, /* src_mask */
+ 0x00ffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_ARM_TLS_DESCSEQ, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_TLS_DESCSEQ", /* name */
+ FALSE, /* partial_inplace */
+ 0x00000000, /* src_mask */
+ 0x00000000, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_ARM_THM_TLS_CALL, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 24, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_THM_TLS_CALL", /* name */
+ FALSE, /* partial_inplace */
+ 0x07ff07ff, /* src_mask */
+ 0x07ff07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_PLT32_ABS, /* type */
0, /* rightshift */
/* GNU extension to record C++ vtable member usage */
HOWTO (R_ARM_GNU_VTENTRY, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 0, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_dont, /* complain_on_overflow */
- _bfd_elf_rel_vtable_reloc_fn, /* special_function */
- "R_ARM_GNU_VTENTRY", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ _bfd_elf_rel_vtable_reloc_fn, /* special_function */
+ "R_ARM_GNU_VTENTRY", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
/* GNU extension to record C++ vtable hierarchy */
HOWTO (R_ARM_GNU_VTINHERIT, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 0, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_dont, /* complain_on_overflow */
- NULL, /* special_function */
- "R_ARM_GNU_VTINHERIT", /* name */
- FALSE, /* partial_inplace */
- 0, /* src_mask */
- 0, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ NULL, /* special_function */
+ "R_ARM_GNU_VTINHERIT", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_THM_JUMP11, /* type */
1, /* rightshift */
/* TLS relocations */
HOWTO (R_ARM_TLS_GD32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- NULL, /* special_function */
- "R_ARM_TLS_GD32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ NULL, /* special_function */
+ "R_ARM_TLS_GD32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_TLS_LDM32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_TLS_LDM32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_TLS_LDM32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_TLS_LDO32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_TLS_LDO32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_TLS_LDO32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_TLS_IE32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- NULL, /* special_function */
- "R_ARM_TLS_IE32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ NULL, /* special_function */
+ "R_ARM_TLS_IE32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_TLS_LE32, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- FALSE, /* pc_relative */
- 0, /* bitpos */
- complain_overflow_bitfield,/* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
- "R_ARM_TLS_LE32", /* name */
- TRUE, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
- FALSE), /* pcrel_offset */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_TLS_LE32", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
HOWTO (R_ARM_TLS_LDO12, /* type */
0, /* rightshift */
0x00000fff, /* src_mask */
0x00000fff, /* dst_mask */
FALSE), /* pcrel_offset */
-};
-/* 112-127 private relocations
- 128 R_ARM_ME_TOO, obsolete
- 129-255 unallocated in AAELF.
+ /* 112-127 private relocations. */
+ EMPTY_HOWTO (112),
+ EMPTY_HOWTO (113),
+ EMPTY_HOWTO (114),
+ EMPTY_HOWTO (115),
+ EMPTY_HOWTO (116),
+ EMPTY_HOWTO (117),
+ EMPTY_HOWTO (118),
+ EMPTY_HOWTO (119),
+ EMPTY_HOWTO (120),
+ EMPTY_HOWTO (121),
+ EMPTY_HOWTO (122),
+ EMPTY_HOWTO (123),
+ EMPTY_HOWTO (124),
+ EMPTY_HOWTO (125),
+ EMPTY_HOWTO (126),
+ EMPTY_HOWTO (127),
+
+ /* R_ARM_ME_TOO, obsolete. */
+ EMPTY_HOWTO (128),
+
+ HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_THM_TLS_DESCSEQ",/* name */
+ FALSE, /* partial_inplace */
+ 0x00000000, /* src_mask */
+ 0x00000000, /* dst_mask */
+ FALSE), /* pcrel_offset */
+};
- 249-255 extended, currently unused, relocations: */
+/* 160 onwards: */
+static reloc_howto_type elf32_arm_howto_table_2[1] =
+{
+ HOWTO (R_ARM_IRELATIVE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ARM_IRELATIVE", /* name */
+ TRUE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE) /* pcrel_offset */
+};
-static reloc_howto_type elf32_arm_howto_table_2[4] =
+/* 249-255 extended, currently unused, relocations: */
+static reloc_howto_type elf32_arm_howto_table_3[4] =
{
HOWTO (R_ARM_RREL32, /* type */
0, /* rightshift */
if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
return &elf32_arm_howto_table_1[r_type];
+ if (r_type == R_ARM_IRELATIVE)
+ return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
+
if (r_type >= R_ARM_RREL32
- && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
- return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
+ && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
+ return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
return NULL;
}
{BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
{BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
{BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
+ {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
+ {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
+ {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
+ {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
+ {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
+ {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
{BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
{BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
{BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
{BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
{BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
{BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
+ {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
{BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
{BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
{BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
&& strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
return &elf32_arm_howto_table_2[i];
+ for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
+ if (elf32_arm_howto_table_3[i].name != NULL
+ && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
+ return &elf32_arm_howto_table_3[i];
+
return NULL;
}
case 148: /* Linux/ARM 32-bit. */
/* pr_cursig */
- elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
+ elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
/* pr_pid */
- elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
+ elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
/* pr_reg */
offset = 72;
return FALSE;
case 124: /* Linux/ARM elf_prpsinfo. */
- elf_tdata (abfd)->core_program
+ elf_tdata (abfd)->core->pid
+ = bfd_get_32 (abfd, note->descdata + 12);
+ elf_tdata (abfd)->core->program
= _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
- elf_tdata (abfd)->core_command
+ elf_tdata (abfd)->core->command
= _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
}
onto the end of the args in some (at least one anyway)
implementations, so strip it off if it exists. */
{
- char *command = elf_tdata (abfd)->core_command;
+ char *command = elf_tdata (abfd)->core->command;
int n = strlen (command);
if (0 < n && command[n - 1] == ' ')
return TRUE;
}
+static char *
+elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
+ int note_type, ...)
+{
+ switch (note_type)
+ {
+ default:
+ return NULL;
+
+ case NT_PRPSINFO:
+ {
+ char data[124];
+ va_list ap;
+
+ va_start (ap, note_type);
+ memset (data, 0, sizeof (data));
+ strncpy (data + 28, va_arg (ap, const char *), 16);
+ strncpy (data + 44, va_arg (ap, const char *), 80);
+ va_end (ap);
+
+ return elfcore_write_note (abfd, buf, bufsiz,
+ "CORE", note_type, data, sizeof (data));
+ }
+
+ case NT_PRSTATUS:
+ {
+ char data[148];
+ va_list ap;
+ long pid;
+ int cursig;
+ const void *greg;
+
+ va_start (ap, note_type);
+ memset (data, 0, sizeof (data));
+ pid = va_arg (ap, long);
+ bfd_put_32 (abfd, pid, data + 24);
+ cursig = va_arg (ap, int);
+ bfd_put_16 (abfd, cursig, data + 12);
+ greg = va_arg (ap, const void *);
+ memcpy (data + 72, greg, 72);
+ va_end (ap);
+
+ return elfcore_write_note (abfd, buf, bufsiz,
+ "CORE", note_type, data, sizeof (data));
+ }
+ }
+}
+
#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
#define TARGET_LITTLE_NAME "elf32-littlearm"
#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
+#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
typedef unsigned long int insn32;
typedef unsigned short int insn16;
section. */
#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
+static const unsigned long tls_trampoline [] =
+{
+ 0xe08e0000, /* add r0, lr, r0 */
+ 0xe5901004, /* ldr r1, [r0,#4] */
+ 0xe12fff11, /* bx r1 */
+};
+
+static const unsigned long dl_tlsdesc_lazy_trampoline [] =
+{
+ 0xe52d2004, /* push {r2} */
+ 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
+ 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
+ 0xe79f2002, /* 1: ldr r2, [pc, r2] */
+ 0xe081100f, /* 2: add r1, pc */
+ 0xe12fff12, /* bx r2 */
+ 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
+ + dl_tlsdesc_lazy_resolver(GOT) */
+ 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
+};
+
#ifdef FOUR_WORD_PLT
/* The first entry in a procedure linkage table looks like
called before the relocation has been set up calls the dynamic
linker first. */
static const bfd_vma elf32_arm_plt0_entry [] =
- {
- 0xe52de004, /* str lr, [sp, #-4]! */
- 0xe59fe010, /* ldr lr, [pc, #16] */
- 0xe08fe00e, /* add lr, pc, lr */
- 0xe5bef008, /* ldr pc, [lr, #8]! */
- };
+{
+ 0xe52de004, /* str lr, [sp, #-4]! */
+ 0xe59fe010, /* ldr lr, [pc, #16] */
+ 0xe08fe00e, /* add lr, pc, lr */
+ 0xe5bef008, /* ldr pc, [lr, #8]! */
+};
/* Subsequent entries in a procedure linkage table look like
this. */
static const bfd_vma elf32_arm_plt_entry [] =
- {
- 0xe28fc600, /* add ip, pc, #NN */
- 0xe28cca00, /* add ip, ip, #NN */
- 0xe5bcf000, /* ldr pc, [ip, #NN]! */
- 0x00000000, /* unused */
- };
+{
+ 0xe28fc600, /* add ip, pc, #NN */
+ 0xe28cca00, /* add ip, ip, #NN */
+ 0xe5bcf000, /* ldr pc, [ip, #NN]! */
+ 0x00000000, /* unused */
+};
#else
called before the relocation has been set up calls the dynamic
linker first. */
static const bfd_vma elf32_arm_plt0_entry [] =
- {
- 0xe52de004, /* str lr, [sp, #-4]! */
- 0xe59fe004, /* ldr lr, [pc, #4] */
- 0xe08fe00e, /* add lr, pc, lr */
- 0xe5bef008, /* ldr pc, [lr, #8]! */
- 0x00000000, /* &GOT[0] - . */
- };
+{
+ 0xe52de004, /* str lr, [sp, #-4]! */
+ 0xe59fe004, /* ldr lr, [pc, #4] */
+ 0xe08fe00e, /* add lr, pc, lr */
+ 0xe5bef008, /* ldr pc, [lr, #8]! */
+ 0x00000000, /* &GOT[0] - . */
+};
/* Subsequent entries in a procedure linkage table look like
this. */
static const bfd_vma elf32_arm_plt_entry [] =
- {
- 0xe28fc600, /* add ip, pc, #0xNN00000 */
- 0xe28cca00, /* add ip, ip, #0xNN000 */
- 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
- };
+{
+ 0xe28fc600, /* add ip, pc, #0xNN00000 */
+ 0xe28cca00, /* add ip, ip, #0xNN000 */
+ 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
+};
#endif
/* The format of the first entry in the procedure linkage table
for a VxWorks executable. */
static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
- {
- 0xe52dc008, /* str ip,[sp,#-8]! */
- 0xe59fc000, /* ldr ip,[pc] */
- 0xe59cf008, /* ldr pc,[ip,#8] */
- 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
- };
+{
+ 0xe52dc008, /* str ip,[sp,#-8]! */
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xe59cf008, /* ldr pc,[ip,#8] */
+ 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
+};
/* The format of subsequent entries in a VxWorks executable. */
static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
- {
- 0xe59fc000, /* ldr ip,[pc] */
- 0xe59cf000, /* ldr pc,[ip] */
- 0x00000000, /* .long @got */
- 0xe59fc000, /* ldr ip,[pc] */
- 0xea000000, /* b _PLT */
- 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
- };
+{
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xe59cf000, /* ldr pc,[ip] */
+ 0x00000000, /* .long @got */
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xea000000, /* b _PLT */
+ 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
+};
/* The format of entries in a VxWorks shared library. */
static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
- {
- 0xe59fc000, /* ldr ip,[pc] */
- 0xe79cf009, /* ldr pc,[ip,r9] */
- 0x00000000, /* .long @got */
- 0xe59fc000, /* ldr ip,[pc] */
- 0xe599f008, /* ldr pc,[r9,#8] */
- 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
- };
+{
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xe79cf009, /* ldr pc,[ip,r9] */
+ 0x00000000, /* .long @got */
+ 0xe59fc000, /* ldr ip,[pc] */
+ 0xe599f008, /* ldr pc,[r9,#8] */
+ 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
+};
/* An initial stub used if the PLT entry is referenced from Thumb code. */
#define PLT_THUMB_STUB_SIZE 4
static const bfd_vma elf32_arm_plt_thumb_stub [] =
- {
- 0x4778, /* bx pc */
- 0x46c0 /* nop */
- };
+{
+ 0x4778, /* bx pc */
+ 0x46c0 /* nop */
+};
/* The entries in a PLT when using a DLL-based target with multiple
address spaces. */
static const bfd_vma elf32_arm_symbian_plt_entry [] =
- {
- 0xe51ff004, /* ldr pc, [pc, #-4] */
- 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
- };
+{
+ 0xe51ff004, /* ldr pc, [pc, #-4] */
+ 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
+};
+
+/* The first entry in a procedure linkage table looks like
+ this. It is set up so that any shared library function that is
+ called before the relocation has been set up calls the dynamic
+ linker first. */
+static const bfd_vma elf32_arm_nacl_plt0_entry [] =
+{
+ /* First bundle: */
+ 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
+ 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
+ 0xe08cc00f, /* add ip, ip, pc */
+ 0xe52dc008, /* str ip, [sp, #-8]! */
+ /* Second bundle: */
+ 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
+ 0xe59cc000, /* ldr ip, [ip] */
+ 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
+ 0xe12fff1c, /* bx ip */
+ /* Third bundle: */
+ 0xe320f000, /* nop */
+ 0xe320f000, /* nop */
+ 0xe320f000, /* nop */
+ /* .Lplt_tail: */
+ 0xe50dc004, /* str ip, [sp, #-4] */
+ /* Fourth bundle: */
+ 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
+ 0xe59cc000, /* ldr ip, [ip] */
+ 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
+ 0xe12fff1c, /* bx ip */
+};
+#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
+
+/* Subsequent entries in a procedure linkage table look like this. */
+static const bfd_vma elf32_arm_nacl_plt_entry [] =
+{
+ 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
+ 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
+ 0xe08cc00f, /* add ip, ip, pc */
+ 0xea000000, /* b .Lplt_tail */
+};
#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
enum stub_insn_type
- {
- THUMB16_TYPE = 1,
- THUMB32_TYPE,
- ARM_TYPE,
- DATA_TYPE
- };
+{
+ THUMB16_TYPE = 1,
+ THUMB32_TYPE,
+ ARM_TYPE,
+ DATA_TYPE
+};
#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
/* A bit of a hack. A Thumb conditional branch, in which the proper condition
typedef struct
{
- bfd_vma data;
- enum stub_insn_type type;
- unsigned int r_type;
- int reloc_addend;
+ bfd_vma data;
+ enum stub_insn_type type;
+ unsigned int r_type;
+ int reloc_addend;
} insn_sequence;
/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
to reach the stub if necessary. */
static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
- {
- ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
- DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
- };
+{
+ ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
+ DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
+};
/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
available. */
static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
- {
- ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
- ARM_INSN(0xe12fff1c), /* bx ip */
- DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
- };
+{
+ ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
+ ARM_INSN (0xe12fff1c), /* bx ip */
+ DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
+};
/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
- {
- THUMB16_INSN(0xb401), /* push {r0} */
- THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
- THUMB16_INSN(0x4684), /* mov ip, r0 */
- THUMB16_INSN(0xbc01), /* pop {r0} */
- THUMB16_INSN(0x4760), /* bx ip */
- THUMB16_INSN(0xbf00), /* nop */
- DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
- };
+{
+ THUMB16_INSN (0xb401), /* push {r0} */
+ THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
+ THUMB16_INSN (0x4684), /* mov ip, r0 */
+ THUMB16_INSN (0xbc01), /* pop {r0} */
+ THUMB16_INSN (0x4760), /* bx ip */
+ THUMB16_INSN (0xbf00), /* nop */
+ DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
+};
/* V4T Thumb -> Thumb long branch stub. Using the stack is not
allowed. */
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
- {
- THUMB16_INSN(0x4778), /* bx pc */
- THUMB16_INSN(0x46c0), /* nop */
- ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
- ARM_INSN(0xe12fff1c), /* bx ip */
- DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
- };
+{
+ THUMB16_INSN (0x4778), /* bx pc */
+ THUMB16_INSN (0x46c0), /* nop */
+ ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
+ ARM_INSN (0xe12fff1c), /* bx ip */
+ DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
+};
/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
available. */
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
- {
- THUMB16_INSN(0x4778), /* bx pc */
- THUMB16_INSN(0x46c0), /* nop */
- ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
- DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
- };
+{
+ THUMB16_INSN (0x4778), /* bx pc */
+ THUMB16_INSN (0x46c0), /* nop */
+ ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
+ DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
+};
/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
one, when the destination is close enough. */
static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
- {
- THUMB16_INSN(0x4778), /* bx pc */
- THUMB16_INSN(0x46c0), /* nop */
- ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
- };
+{
+ THUMB16_INSN (0x4778), /* bx pc */
+ THUMB16_INSN (0x46c0), /* nop */
+ ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
+};
/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
blx to reach the stub if necessary. */
static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
- {
- ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
- ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
- DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
- };
+{
+ ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
+ ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
+ DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
+};
/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
blx to reach the stub if necessary. We can not add into pc;
it is not guaranteed to mode switch (different in ARMv6 and
ARMv7). */
static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
- {
- ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
- ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
- ARM_INSN(0xe12fff1c), /* bx ip */
- DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
- };
+{
+ ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
+ ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
+ ARM_INSN (0xe12fff1c), /* bx ip */
+ DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
+};
/* V4T ARM -> ARM long branch stub, PIC. */
static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
- {
- ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
- ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
- ARM_INSN(0xe12fff1c), /* bx ip */
- DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
- };
+{
+ ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
+ ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
+ ARM_INSN (0xe12fff1c), /* bx ip */
+ DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
+};
/* V4T Thumb -> ARM long branch stub, PIC. */
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
- {
- THUMB16_INSN(0x4778), /* bx pc */
- THUMB16_INSN(0x46c0), /* nop */
- ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
- ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
- DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
- };
+{
+ THUMB16_INSN (0x4778), /* bx pc */
+ THUMB16_INSN (0x46c0), /* nop */
+ ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
+ ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
+ DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
+};
/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
architectures. */
static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
- {
- THUMB16_INSN(0xb401), /* push {r0} */
- THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
- THUMB16_INSN(0x46fc), /* mov ip, pc */
- THUMB16_INSN(0x4484), /* add ip, r0 */
- THUMB16_INSN(0xbc01), /* pop {r0} */
- THUMB16_INSN(0x4760), /* bx ip */
- DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
- };
+{
+ THUMB16_INSN (0xb401), /* push {r0} */
+ THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
+ THUMB16_INSN (0x46fc), /* mov ip, pc */
+ THUMB16_INSN (0x4484), /* add ip, r0 */
+ THUMB16_INSN (0xbc01), /* pop {r0} */
+ THUMB16_INSN (0x4760), /* bx ip */
+ DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
+};
/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
allowed. */
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
- {
- THUMB16_INSN(0x4778), /* bx pc */
- THUMB16_INSN(0x46c0), /* nop */
- ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
- ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
- ARM_INSN(0xe12fff1c), /* bx ip */
- DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
- };
+{
+ THUMB16_INSN (0x4778), /* bx pc */
+ THUMB16_INSN (0x46c0), /* nop */
+ ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
+ ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
+ ARM_INSN (0xe12fff1c), /* bx ip */
+ DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
+};
+
+/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
+ long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
+static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
+{
+ ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
+ ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
+ DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
+};
+
+/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
+ long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
+static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
+{
+ THUMB16_INSN (0x4778), /* bx pc */
+ THUMB16_INSN (0x46c0), /* nop */
+ ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
+ ARM_INSN (0xe081f00f), /* add pc, r1, pc */
+ DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
+};
/* Cortex-A8 erratum-workaround stubs. */
can't use a conditional branch to reach this stub). */
static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
- {
- THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
- THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
- THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
- };
+{
+ THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
+ THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
+ THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
+};
/* Stub used for b.w and bl.w instructions. */
static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
- {
- THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
- };
+{
+ THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
+};
static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
- {
- THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
- };
+{
+ THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
+};
/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
instruction (which switches to ARM mode) to point to this stub. Jump to the
real destination using an ARM-mode branch. */
static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
- {
- ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
- };
+{
+ ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
+};
+
+/* For each section group there can be a specially created linker section
+ to hold the stubs for that group. The name of the stub section is based
+ upon the name of another section within that group with the suffix below
+ applied.
+
+ PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
+ create what appeared to be a linker stub section when it actually
+ contained user code/data. For example, consider this fragment:
+
+ const char * stubborn_problems[] = { "np" };
+
+ If this is compiled with "-fPIC -fdata-sections" then gcc produces a
+ section called:
+
+ .data.rel.local.stubborn_problems
+
+ This then causes problems in arm32_arm_build_stubs() as it triggers:
-/* Section name for stubs is the associated section name plus this
- string. */
-#define STUB_SUFFIX ".stub"
+ // Ignore non-stub sections.
+ if (!strstr (stub_sec->name, STUB_SUFFIX))
+ continue;
+
+ And so the section would be ignored instead of being processed. Hence
+ the change in definition of STUB_SUFFIX to a name that cannot be a valid
+ C identifier. */
+#define STUB_SUFFIX ".__stub"
/* One entry per long/short branch stub defined above. */
#define DEF_STUBS \
DEF_STUB(long_branch_v4t_arm_thumb_pic) \
DEF_STUB(long_branch_v4t_thumb_arm_pic) \
DEF_STUB(long_branch_thumb_only_pic) \
+ DEF_STUB(long_branch_any_tls_pic) \
+ DEF_STUB(long_branch_v4t_thumb_tls_pic) \
DEF_STUB(a8_veneer_b_cond) \
DEF_STUB(a8_veneer_b) \
DEF_STUB(a8_veneer_bl) \
DEF_STUB(a8_veneer_blx)
#define DEF_STUB(x) arm_stub_##x,
-enum elf32_arm_stub_type {
+enum elf32_arm_stub_type
+{
arm_stub_none,
DEF_STUBS
/* Note the first a8_veneer type */
} stub_def;
#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
-static const stub_def stub_definitions[] = {
+static const stub_def stub_definitions[] =
+{
{NULL, 0},
DEF_STUBS
};
/* The symbol table entry, if any, that this was derived from. */
struct elf32_arm_link_hash_entry *h;
- /* Destination symbol type (STT_ARM_TFUNC, ...) */
- unsigned char st_type;
+ /* Type of branch. */
+ enum arm_st_branch_type branch_type;
/* Where this stub is being called from, or, in the case of combined
stub sections, the first input section in the group. */
relaxing which we can refresh easily, then create stubs for each potentially
erratum-triggering instruction once we've settled on a solution. */
-struct a8_erratum_fix {
+struct a8_erratum_fix
+{
bfd *input_bfd;
asection *section;
bfd_vma offset;
unsigned long orig_insn;
char *stub_name;
enum elf32_arm_stub_type stub_type;
- int st_type;
+ enum arm_st_branch_type branch_type;
};
/* A table of relocs applied to branches which might trigger Cortex-A8
erratum. */
-struct a8_erratum_reloc {
+struct a8_erratum_reloc
+{
bfd_vma from;
bfd_vma destination;
struct elf32_arm_link_hash_entry *hash;
const char *sym_name;
unsigned int r_type;
- unsigned char st_type;
+ enum arm_st_branch_type branch_type;
bfd_boolean non_a8_stub;
};
/* The size of the thread control block. */
#define TCB_SIZE 8
+/* ARM-specific information about a PLT entry, over and above the usual
+ gotplt_union. */
+struct arm_plt_info
+{
+ /* We reference count Thumb references to a PLT entry separately,
+ so that we can emit the Thumb trampoline only if needed. */
+ bfd_signed_vma thumb_refcount;
+
+ /* Some references from Thumb code may be eliminated by BL->BLX
+ conversion, so record them separately. */
+ bfd_signed_vma maybe_thumb_refcount;
+
+ /* How many of the recorded PLT accesses were from non-call relocations.
+ This information is useful when deciding whether anything takes the
+ address of an STT_GNU_IFUNC PLT. A value of 0 means that all
+ non-call references to the function should resolve directly to the
+ real runtime target. */
+ unsigned int noncall_refcount;
+
+ /* Since PLT entries have variable size if the Thumb prologue is
+ used, we need to record the index into .got.plt instead of
+ recomputing it from the PLT offset. */
+ bfd_signed_vma got_offset;
+};
+
+/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
+struct arm_local_iplt_info
+{
+ /* The information that is usually found in the generic ELF part of
+ the hash table entry. */
+ union gotplt_union root;
+
+ /* The information that is usually found in the ARM-specific part of
+ the hash table entry. */
+ struct arm_plt_info arm;
+
+ /* A list of all potential dynamic relocations against this symbol. */
+ struct elf_dyn_relocs *dyn_relocs;
+};
+
struct elf_arm_obj_tdata
{
struct elf_obj_tdata root;
/* tls_type for each local got entry. */
char *local_got_tls_type;
+ /* GOTPLT entries for TLS descriptors. */
+ bfd_vma *local_tlsdesc_gotent;
+
+ /* Information for local symbols that need entries in .iplt. */
+ struct arm_local_iplt_info **local_iplt;
+
/* Zero to warn when linking objects with incompatible enum sizes. */
int no_enum_size_warning;
#define elf32_arm_local_got_tls_type(bfd) \
(elf_arm_tdata (bfd)->local_got_tls_type)
+#define elf32_arm_local_tlsdesc_gotent(bfd) \
+ (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
+
+#define elf32_arm_local_iplt(bfd) \
+ (elf_arm_tdata (bfd)->local_iplt)
+
#define is_arm_elf(bfd) \
(bfd_get_flavour (bfd) == bfd_target_elf_flavour \
&& elf_tdata (bfd) != NULL \
/* Arm ELF linker hash entry. */
struct elf32_arm_link_hash_entry
- {
- struct elf_link_hash_entry root;
-
- /* Track dynamic relocs copied for this symbol. */
- struct elf_dyn_relocs *dyn_relocs;
-
- /* We reference count Thumb references to a PLT entry separately,
- so that we can emit the Thumb trampoline only if needed. */
- bfd_signed_vma plt_thumb_refcount;
+{
+ struct elf_link_hash_entry root;
- /* Some references from Thumb code may be eliminated by BL->BLX
- conversion, so record them separately. */
- bfd_signed_vma plt_maybe_thumb_refcount;
+ /* Track dynamic relocs copied for this symbol. */
+ struct elf_dyn_relocs *dyn_relocs;
- /* Since PLT entries have variable size if the Thumb prologue is
- used, we need to record the index into .got.plt instead of
- recomputing it from the PLT offset. */
- bfd_signed_vma plt_got_offset;
+ /* ARM-specific PLT information. */
+ struct arm_plt_info plt;
#define GOT_UNKNOWN 0
#define GOT_NORMAL 1
#define GOT_TLS_GD 2
#define GOT_TLS_IE 4
- unsigned char tls_type;
+#define GOT_TLS_GDESC 8
+#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
+ unsigned int tls_type : 8;
+
+ /* True if the symbol's PLT entry is in .iplt rather than .plt. */
+ unsigned int is_iplt : 1;
+
+ unsigned int unused : 23;
- /* The symbol marking the real symbol location for exported thumb
- symbols with Arm stubs. */
- struct elf_link_hash_entry *export_glue;
+ /* Offset of the GOTPLT entry reserved for the TLS descriptor,
+ starting at the end of the jump table. */
+ bfd_vma tlsdesc_got;
- /* A pointer to the most recently used stub hash entry against this
+ /* The symbol marking the real symbol location for exported thumb
+ symbols with Arm stubs. */
+ struct elf_link_hash_entry *export_glue;
+
+ /* A pointer to the most recently used stub hash entry against this
symbol. */
- struct elf32_arm_stub_hash_entry *stub_cache;
- };
+ struct elf32_arm_stub_hash_entry *stub_cache;
+};
/* Traverse an arm ELF linker hash table. */
#define elf32_arm_link_hash_traverse(table, func, info) \
asection *stub_sec;
};
+#define elf32_arm_compute_jump_table_size(htab) \
+ ((htab)->next_tls_desc_index * 4)
+
/* ARM ELF linker hash table. */
struct elf32_arm_link_hash_table
{
/* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
int fix_cortex_a8;
+ /* Whether we should fix the ARM1176 BLX immediate issue. */
+ int fix_arm1176;
+
/* Nonzero if the ARM/Thumb BLX instructions are available for use. */
int use_blx;
/* True if the target system is Symbian OS. */
int symbian_p;
+ /* True if the target system is Native Client. */
+ int nacl_p;
+
/* True if the target uses REL relocations. */
int use_rel;
+ /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
+ bfd_vma next_tls_desc_index;
+
+ /* How many R_ARM_TLS_DESC relocations were generated so far. */
+ bfd_vma num_tls_desc;
+
/* Short-cuts to get to dynamic linker sections. */
asection *sdynbss;
asection *srelbss;
/* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
asection *srelplt2;
+ /* The offset into splt of the PLT entry for the TLS descriptor
+ resolver. Special values are 0, if not necessary (or not found
+ to be necessary yet), and -1 if needed but not determined
+ yet. */
+ bfd_vma dt_tlsdesc_plt;
+
+ /* The offset into sgot of the GOT entry used by the PLT entry
+ above. */
+ bfd_vma dt_tlsdesc_got;
+
+ /* Offset in .plt section of tls_arm_trampoline. */
+ bfd_vma tls_trampoline;
+
/* Data for R_ARM_TLS_LDM32 relocations. */
union
{
/* For convenience in allocate_dynrelocs. */
bfd * obfd;
+ /* The amount of space used by the reserved portion of the sgotplt
+ section, plus whatever space is used by the jump slots. */
+ bfd_vma sgotplt_jump_table_size;
+
/* The stub hash table. */
struct bfd_hash_table stub_hash_table;
static struct bfd_hash_entry *
elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
- struct bfd_hash_table * table,
- const char * string)
+ struct bfd_hash_table * table,
+ const char * string)
{
struct elf32_arm_link_hash_entry * ret =
(struct elf32_arm_link_hash_entry *) entry;
subclass. */
if (ret == NULL)
ret = (struct elf32_arm_link_hash_entry *)
- bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
+ bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
if (ret == NULL)
return (struct bfd_hash_entry *) ret;
{
ret->dyn_relocs = NULL;
ret->tls_type = GOT_UNKNOWN;
- ret->plt_thumb_refcount = 0;
- ret->plt_maybe_thumb_refcount = 0;
- ret->plt_got_offset = -1;
+ ret->tlsdesc_got = (bfd_vma) -1;
+ ret->plt.thumb_refcount = 0;
+ ret->plt.maybe_thumb_refcount = 0;
+ ret->plt.noncall_refcount = 0;
+ ret->plt.got_offset = -1;
+ ret->is_iplt = FALSE;
ret->export_glue = NULL;
ret->stub_cache = NULL;
return (struct bfd_hash_entry *) ret;
}
+/* Ensure that we have allocated bookkeeping structures for ABFD's local
+ symbols. */
+
+static bfd_boolean
+elf32_arm_allocate_local_sym_info (bfd *abfd)
+{
+ if (elf_local_got_refcounts (abfd) == NULL)
+ {
+ bfd_size_type num_syms;
+ bfd_size_type size;
+ char *data;
+
+ num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
+ size = num_syms * (sizeof (bfd_signed_vma)
+ + sizeof (struct arm_local_iplt_info *)
+ + sizeof (bfd_vma)
+ + sizeof (char));
+ data = bfd_zalloc (abfd, size);
+ if (data == NULL)
+ return FALSE;
+
+ elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
+ data += num_syms * sizeof (bfd_signed_vma);
+
+ elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
+ data += num_syms * sizeof (struct arm_local_iplt_info *);
+
+ elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
+ data += num_syms * sizeof (bfd_vma);
+
+ elf32_arm_local_got_tls_type (abfd) = data;
+ }
+ return TRUE;
+}
+
+/* Return the .iplt information for local symbol R_SYMNDX, which belongs
+ to input bfd ABFD. Create the information if it doesn't already exist.
+ Return null if an allocation fails. */
+
+static struct arm_local_iplt_info *
+elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
+{
+ struct arm_local_iplt_info **ptr;
+
+ if (!elf32_arm_allocate_local_sym_info (abfd))
+ return NULL;
+
+ BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
+ ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
+ if (*ptr == NULL)
+ *ptr = bfd_zalloc (abfd, sizeof (**ptr));
+ return *ptr;
+}
+
+/* Try to obtain PLT information for the symbol with index R_SYMNDX
+ in ABFD's symbol table. If the symbol is global, H points to its
+ hash table entry, otherwise H is null.
+
+ Return true if the symbol does have PLT information. When returning
+ true, point *ROOT_PLT at the target-independent reference count/offset
+ union and *ARM_PLT at the ARM-specific information. */
+
+static bfd_boolean
+elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
+ unsigned long r_symndx, union gotplt_union **root_plt,
+ struct arm_plt_info **arm_plt)
+{
+ struct arm_local_iplt_info *local_iplt;
+
+ if (h != NULL)
+ {
+ *root_plt = &h->root.plt;
+ *arm_plt = &h->plt;
+ return TRUE;
+ }
+
+ if (elf32_arm_local_iplt (abfd) == NULL)
+ return FALSE;
+
+ local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
+ if (local_iplt == NULL)
+ return FALSE;
+
+ *root_plt = &local_iplt->root;
+ *arm_plt = &local_iplt->arm;
+ return TRUE;
+}
+
+/* Return true if the PLT described by ARM_PLT requires a Thumb stub
+ before it. */
+
+static bfd_boolean
+elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
+ struct arm_plt_info *arm_plt)
+{
+ struct elf32_arm_link_hash_table *htab;
+
+ htab = elf32_arm_hash_table (info);
+ return (arm_plt->thumb_refcount != 0
+ || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
+}
+
+/* Return a pointer to the head of the dynamic reloc list that should
+ be used for local symbol ISYM, which is symbol number R_SYMNDX in
+ ABFD's symbol table. Return null if an error occurs. */
+
+static struct elf_dyn_relocs **
+elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
+ Elf_Internal_Sym *isym)
+{
+ if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
+ {
+ struct arm_local_iplt_info *local_iplt;
+
+ local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
+ if (local_iplt == NULL)
+ return NULL;
+ return &local_iplt->dyn_relocs;
+ }
+ else
+ {
+ /* Track dynamic relocs needed for local syms too.
+ We really need local syms available to do this
+ easily. Oh well. */
+ asection *s;
+ void *vpp;
+
+ s = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ if (s == NULL)
+ abort ();
+
+ vpp = &elf_section_data (s)->local_dynrel;
+ return (struct elf_dyn_relocs **) vpp;
+ }
+}
+
/* Initialize an entry in the stub hash table. */
static struct bfd_hash_entry *
if (entry == NULL)
{
entry = (struct bfd_hash_entry *)
- bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
+ bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
if (entry == NULL)
return entry;
}
return TRUE;
}
+/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
+
+static bfd_boolean
+create_ifunc_sections (struct bfd_link_info *info)
+{
+ struct elf32_arm_link_hash_table *htab;
+ const struct elf_backend_data *bed;
+ bfd *dynobj;
+ asection *s;
+ flagword flags;
+
+ htab = elf32_arm_hash_table (info);
+ dynobj = htab->root.dynobj;
+ bed = get_elf_backend_data (dynobj);
+ flags = bed->dynamic_sec_flags;
+
+ if (htab->root.iplt == NULL)
+ {
+ s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
+ flags | SEC_READONLY | SEC_CODE);
+ if (s == NULL
+ || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
+ return FALSE;
+ htab->root.iplt = s;
+ }
+
+ if (htab->root.irelplt == NULL)
+ {
+ s = bfd_make_section_anyway_with_flags (dynobj,
+ RELOC_SECTION (htab, ".iplt"),
+ flags | SEC_READONLY);
+ if (s == NULL
+ || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
+ return FALSE;
+ htab->root.irelplt = s;
+ }
+
+ if (htab->root.igotplt == NULL)
+ {
+ s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
+ if (s == NULL
+ || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
+ return FALSE;
+ htab->root.igotplt = s;
+ }
+ return TRUE;
+}
+
/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
.rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
hash table. */
if (!_bfd_elf_create_dynamic_sections (dynobj, info))
return FALSE;
- htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
+ htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
if (!info->shared)
- htab->srelbss = bfd_get_section_by_name (dynobj,
- RELOC_SECTION (htab, ".bss"));
+ htab->srelbss = bfd_get_linker_section (dynobj,
+ RELOC_SECTION (htab, ".bss"));
if (htab->vxworks_p)
{
if (ind->root.type == bfd_link_hash_indirect)
{
/* Copy over PLT info. */
- edir->plt_thumb_refcount += eind->plt_thumb_refcount;
- eind->plt_thumb_refcount = 0;
- edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
- eind->plt_maybe_thumb_refcount = 0;
+ edir->plt.thumb_refcount += eind->plt.thumb_refcount;
+ eind->plt.thumb_refcount = 0;
+ edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
+ eind->plt.maybe_thumb_refcount = 0;
+ edir->plt.noncall_refcount += eind->plt.noncall_refcount;
+ eind->plt.noncall_refcount = 0;
+
+ /* We should only allocate a function to .iplt once the final
+ symbol information is known. */
+ BFD_ASSERT (!eind->is_iplt);
if (dir->got.refcount <= 0)
{
struct elf32_arm_link_hash_table *ret;
bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
- ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
+ ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
if (ret == NULL)
return NULL;
return NULL;
}
- ret->sdynbss = NULL;
- ret->srelbss = NULL;
- ret->srelplt2 = NULL;
- ret->thumb_glue_size = 0;
- ret->arm_glue_size = 0;
- ret->bx_glue_size = 0;
- memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
- ret->vfp11_erratum_glue_size = 0;
- ret->num_vfp11_fixes = 0;
- ret->fix_cortex_a8 = 0;
- ret->bfd_of_glue_owner = NULL;
- ret->byteswap_code = 0;
- ret->target1_is_rel = 0;
- ret->target2_reloc = R_ARM_NONE;
#ifdef FOUR_WORD_PLT
ret->plt_header_size = 16;
ret->plt_entry_size = 16;
ret->plt_header_size = 20;
ret->plt_entry_size = 12;
#endif
- ret->fix_v4bx = 0;
- ret->use_blx = 0;
- ret->vxworks_p = 0;
- ret->symbian_p = 0;
ret->use_rel = 1;
- ret->sym_cache.abfd = NULL;
ret->obfd = abfd;
- ret->tls_ldm_got.refcount = 0;
- ret->stub_bfd = NULL;
- ret->add_stub_section = NULL;
- ret->layout_sections_again = NULL;
- ret->stub_group = NULL;
- ret->top_id = 0;
- ret->bfd_count = 0;
- ret->top_index = 0;
- ret->input_list = NULL;
if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
sizeof (struct elf32_arm_stub_hash_entry)))
= (struct elf32_arm_link_hash_table *) hash;
bfd_hash_table_free (&ret->stub_hash_table);
- _bfd_generic_link_hash_table_free (hash);
+ _bfd_elf_link_hash_table_free (hash);
}
/* Determine if we're dealing with a Thumb only architecture. */
case arm_stub_long_branch_v4t_thumb_arm:
case arm_stub_short_branch_v4t_thumb_arm:
case arm_stub_long_branch_v4t_thumb_arm_pic:
+ case arm_stub_long_branch_v4t_thumb_tls_pic:
case arm_stub_long_branch_thumb_only_pic:
return TRUE;
case arm_stub_none:
arm_type_of_stub (struct bfd_link_info *info,
asection *input_sec,
const Elf_Internal_Rela *rel,
- int *actual_st_type,
+ unsigned char st_type,
+ enum arm_st_branch_type *actual_branch_type,
struct elf32_arm_link_hash_entry *hash,
bfd_vma destination,
asection *sym_sec,
int thumb_only;
enum elf32_arm_stub_type stub_type = arm_stub_none;
int use_plt = 0;
- int st_type = *actual_st_type;
+ enum arm_st_branch_type branch_type = *actual_branch_type;
+ union gotplt_union *root_plt;
+ struct arm_plt_info *arm_plt;
- /* We don't know the actual type of destination in case it is of
- type STT_SECTION: give up. */
- if (st_type == STT_SECTION)
+ if (branch_type == ST_BRANCH_LONG)
return stub_type;
globals = elf32_arm_hash_table (info);
r_type = ELF32_R_TYPE (rel->r_info);
- /* Keep a simpler condition, for the sake of clarity. */
- if (globals->root.splt != NULL
- && hash != NULL
- && hash->root.plt.offset != (bfd_vma) -1)
+ /* For TLS call relocs, it is the caller's responsibility to provide
+ the address of the appropriate trampoline. */
+ if (r_type != R_ARM_TLS_CALL
+ && r_type != R_ARM_THM_TLS_CALL
+ && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
+ &root_plt, &arm_plt)
+ && root_plt->offset != (bfd_vma) -1)
{
- use_plt = 1;
-
- /* Note when dealing with PLT entries: the main PLT stub is in
- ARM mode, so if the branch is in Thumb mode, another
- Thumb->ARM stub will be inserted later just before the ARM
- PLT stub. We don't take this extra distance into account
- here, because if a long branch stub is needed, we'll add a
- Thumb->Arm one and branch directly to the ARM PLT entry
- because it avoids spreading offset corrections in several
- places. */
+ asection *splt;
- destination = (globals->root.splt->output_section->vma
- + globals->root.splt->output_offset
- + hash->root.plt.offset);
- st_type = STT_FUNC;
+ if (hash == NULL || hash->is_iplt)
+ splt = globals->root.iplt;
+ else
+ splt = globals->root.splt;
+ if (splt != NULL)
+ {
+ use_plt = 1;
+
+ /* Note when dealing with PLT entries: the main PLT stub is in
+ ARM mode, so if the branch is in Thumb mode, another
+ Thumb->ARM stub will be inserted later just before the ARM
+ PLT stub. We don't take this extra distance into account
+ here, because if a long branch stub is needed, we'll add a
+ Thumb->Arm one and branch directly to the ARM PLT entry
+ because it avoids spreading offset corrections in several
+ places. */
+
+ destination = (splt->output_section->vma
+ + splt->output_offset
+ + root_plt->offset);
+ st_type = STT_FUNC;
+ branch_type = ST_BRANCH_TO_ARM;
+ }
}
+ /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
+ BFD_ASSERT (st_type != STT_GNU_IFUNC);
branch_offset = (bfd_signed_vma)(destination - location);
- if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
+ if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
+ || r_type == R_ARM_THM_TLS_CALL)
{
/* Handle cases where:
- this call goes too far (different Thumb/Thumb2 max
- distance)
+ distance)
- it's a Thumb->Arm call and blx is not available, or it's a
- Thumb->Arm branch (not bl). A stub is needed in this case,
- but only if this call is not through a PLT entry. Indeed,
- PLT stubs handle mode switching already.
+ Thumb->Arm branch (not bl). A stub is needed in this case,
+ but only if this call is not through a PLT entry. Indeed,
+ PLT stubs handle mode switching already.
*/
if ((!thumb2
&& (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
|| (thumb2
&& (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
|| (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
- || ((st_type != STT_ARM_TFUNC)
- && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
+ || (branch_type == ST_BRANCH_TO_ARM
+ && (((r_type == R_ARM_THM_CALL
+ || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
|| (r_type == R_ARM_THM_JUMP24))
&& !use_plt))
{
- if (st_type == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
{
/* Thumb to thumb. */
if (!thumb_only)
stub_type = (info->shared | globals->pic_veneer)
/* PIC stubs. */
? ((globals->use_blx
- && (r_type ==R_ARM_THM_CALL))
+ && (r_type == R_ARM_THM_CALL))
/* V5T and above. Stub starts with ARM code, so
we must be able to switch mode before
reaching it, which is only possible for 'bl'
/* non-PIC stubs. */
: ((globals->use_blx
- && (r_type ==R_ARM_THM_CALL))
+ && (r_type == R_ARM_THM_CALL))
/* V5T and above. */
? arm_stub_long_branch_any_any
/* V4T. */
sym_sec->owner, input_bfd, name);
}
- stub_type = (info->shared | globals->pic_veneer)
+ stub_type =
+ (info->shared | globals->pic_veneer)
/* PIC stubs. */
- ? ((globals->use_blx
- && (r_type ==R_ARM_THM_CALL))
- /* V5T and above. */
- ? arm_stub_long_branch_any_arm_pic
- /* V4T PIC stub. */
- : arm_stub_long_branch_v4t_thumb_arm_pic)
+ ? (r_type == R_ARM_THM_TLS_CALL
+ /* TLS PIC stubs */
+ ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
+ : arm_stub_long_branch_v4t_thumb_tls_pic)
+ : ((globals->use_blx && r_type == R_ARM_THM_CALL)
+ /* V5T PIC and above. */
+ ? arm_stub_long_branch_any_arm_pic
+ /* V4T PIC stub. */
+ : arm_stub_long_branch_v4t_thumb_arm_pic))
/* non-PIC stubs. */
- : ((globals->use_blx
- && (r_type ==R_ARM_THM_CALL))
+ : ((globals->use_blx && r_type == R_ARM_THM_CALL)
/* V5T and above. */
? arm_stub_long_branch_any_any
/* V4T. */
}
else if (r_type == R_ARM_CALL
|| r_type == R_ARM_JUMP24
- || r_type == R_ARM_PLT32)
+ || r_type == R_ARM_PLT32
+ || r_type == R_ARM_TLS_CALL)
{
- if (st_type == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
{
/* Arm to thumb. */
the mode change (bit 24 (H) of BLX encoding). */
if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
|| (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
- || ((r_type == R_ARM_CALL) && !globals->use_blx)
+ || (r_type == R_ARM_CALL && !globals->use_blx)
|| (r_type == R_ARM_JUMP24)
|| (r_type == R_ARM_PLT32))
{
if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
|| (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
{
- stub_type = (info->shared | globals->pic_veneer)
+ stub_type =
+ (info->shared | globals->pic_veneer)
/* PIC stubs. */
- ? arm_stub_long_branch_any_arm_pic
+ ? (r_type == R_ARM_TLS_CALL
+ /* TLS PIC Stub */
+ ? arm_stub_long_branch_any_tls_pic
+ : arm_stub_long_branch_any_arm_pic)
/* non-PIC stubs. */
: arm_stub_long_branch_any_any;
}
/* If a stub is needed, record the actual destination type. */
if (stub_type != arm_stub_none)
- *actual_st_type = st_type;
+ *actual_branch_type = branch_type;
return stub_type;
}
sprintf (stub_name, "%08x_%x:%x+%x_%d",
input_section->id & 0xffffffff,
sym_sec->id & 0xffffffff,
- (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
+ ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
+ || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
+ ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
(int) rel->r_addend & 0xffffffff,
(int) stub_type);
}
}
/* Find or create a stub section. Returns a pointer to the stub section, and
- the section to which the stub section will be attached (in *LINK_SEC_P).
+ the section to which the stub section will be attached (in *LINK_SEC_P).
LINK_SEC_P may be NULL. */
static asection *
asection *stub_sec;
link_sec = htab->stub_group[section->id].link_sec;
+ BFD_ASSERT (link_sec != NULL);
stub_sec = htab->stub_group[section->id].stub_sec;
+
if (stub_sec == NULL)
{
stub_sec = htab->stub_group[link_sec->id].stub_sec;
}
htab->stub_group[section->id].stub_sec = stub_sec;
}
-
+
if (link_sec_p)
*link_sec_p = link_sec;
-
+
return stub_sec;
}
bfd_putb16 (val, ptr);
}
+/* If it's possible to change R_TYPE to a more efficient access
+ model, return the new reloc type. */
+
+static unsigned
+elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
+ struct elf_link_hash_entry *h)
+{
+ int is_local = (h == NULL);
+
+ if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
+ return r_type;
+
+ /* We do not support relaxations for Old TLS models. */
+ switch (r_type)
+ {
+ case R_ARM_TLS_GOTDESC:
+ case R_ARM_TLS_CALL:
+ case R_ARM_THM_TLS_CALL:
+ case R_ARM_TLS_DESCSEQ:
+ case R_ARM_THM_TLS_DESCSEQ:
+ return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
+ }
+
+ return r_type;
+}
+
static bfd_reloc_status_type elf32_arm_final_link_relocate
(reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
- const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
+ const char *, unsigned char, enum arm_st_branch_type,
+ struct elf_link_hash_entry *, bfd_boolean *, char **);
static unsigned int
arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
case arm_stub_long_branch_v4t_arm_thumb_pic:
case arm_stub_long_branch_v4t_thumb_arm_pic:
case arm_stub_long_branch_thumb_only_pic:
+ case arm_stub_long_branch_any_tls_pic:
+ case arm_stub_long_branch_v4t_thumb_tls_pic:
case arm_stub_a8_veneer_blx:
return 4;
-
+
default:
abort (); /* Should be unreachable. */
}
bfd_vma data = (bfd_vma) template_sequence[i].data;
if (template_sequence[i].reloc_addend != 0)
{
- /* We've borrowed the reloc_addend field to mean we should
- insert a condition code into this (Thumb-1 branch)
- instruction. See THUMB16_BCOND_INSN. */
- BFD_ASSERT ((data & 0xff00) == 0xd000);
- data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
+ /* We've borrowed the reloc_addend field to mean we should
+ insert a condition code into this (Thumb-1 branch)
+ instruction. See THUMB16_BCOND_INSN. */
+ BFD_ASSERT ((data & 0xff00) == 0xd000);
+ data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
}
bfd_put_16 (stub_bfd, data, loc + size);
size += 2;
loc + size);
bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
loc + size + 2);
- if (template_sequence[i].r_type != R_ARM_NONE)
- {
- stub_reloc_idx[nrelocs] = i;
- stub_reloc_offset[nrelocs++] = size;
- }
- size += 4;
- break;
+ if (template_sequence[i].r_type != R_ARM_NONE)
+ {
+ stub_reloc_idx[nrelocs] = i;
+ stub_reloc_offset[nrelocs++] = size;
+ }
+ size += 4;
+ break;
case ARM_TYPE:
bfd_put_32 (stub_bfd, template_sequence[i].data,
BFD_ASSERT (size == stub_entry->stub_size);
/* Destination is Thumb. Force bit 0 to 1 to reflect this. */
- if (stub_entry->st_type == STT_ARM_TFUNC)
+ if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
sym_value |= 1;
/* Assume there is at least one and at most MAXRELOCS entries to relocate
Elf_Internal_Rela rel;
bfd_boolean unresolved_reloc;
char *error_message;
- int sym_flags
- = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
- ? STT_ARM_TFUNC : 0;
+ enum arm_st_branch_type branch_type
+ = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
+ ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
bfd_vma points_to = sym_value + stub_entry->target_addend;
rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
rel.r_info = ELF32_R_INFO (0,
- template_sequence[stub_reloc_idx[i]].r_type);
+ template_sequence[stub_reloc_idx[i]].r_type);
rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
elf32_arm_final_link_relocate (elf32_arm_howto_from_type
(template_sequence[stub_reloc_idx[i]].r_type),
stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
- points_to, info, stub_entry->target_section, "", sym_flags,
- (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
- &error_message);
+ points_to, info, stub_entry->target_section, "", STT_FUNC,
+ branch_type, (struct elf_link_hash_entry *) stub_entry->h,
+ &unresolved_reloc, &error_message);
}
else
{
rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
rel.r_info = ELF32_R_INFO (0,
- template_sequence[stub_reloc_idx[i]].r_type);
+ template_sequence[stub_reloc_idx[i]].r_type);
rel.r_addend = 0;
elf32_arm_final_link_relocate (elf32_arm_howto_from_type
(template_sequence[stub_reloc_idx[i]].r_type),
stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
- points_to, info, stub_entry->target_section, "", stub_entry->st_type,
+ points_to, info, stub_entry->target_section, "", STT_FUNC,
+ stub_entry->branch_type,
(struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
&error_message);
}
#define NEXT_SEC PREV_SEC
head = NULL;
while (tail != NULL)
- {
- /* Pop from tail. */
- asection *item = tail;
- tail = PREV_SEC (item);
+ {
+ /* Pop from tail. */
+ asection *item = tail;
+ tail = PREV_SEC (item);
- /* Push on head. */
- NEXT_SEC (item) = head;
- head = item;
- }
+ /* Push on head. */
+ NEXT_SEC (item) = head;
+ head = item;
+ }
while (head != NULL)
{
bfd_vma base_vma;
if (elf_section_type (section) != SHT_PROGBITS
- || (elf_section_flags (section) & SHF_EXECINSTR) == 0
- || (section->flags & SEC_EXCLUDE) != 0
- || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
- || (section->output_section == bfd_abs_section_ptr))
- continue;
+ || (elf_section_flags (section) & SHF_EXECINSTR) == 0
+ || (section->flags & SEC_EXCLUDE) != 0
+ || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
+ || (section->output_section == bfd_abs_section_ptr))
+ continue;
base_vma = section->output_section->vma + section->output_offset;
if (elf_section_data (section)->this_hdr.contents != NULL)
- contents = elf_section_data (section)->this_hdr.contents;
+ contents = elf_section_data (section)->this_hdr.contents;
else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
- return TRUE;
+ return TRUE;
sec_data = elf32_arm_section_data (section);
for (span = 0; span < sec_data->mapcount; span++)
- {
- unsigned int span_start = sec_data->map[span].vma;
- unsigned int span_end = (span == sec_data->mapcount - 1)
- ? section->size : sec_data->map[span + 1].vma;
- unsigned int i;
- char span_type = sec_data->map[span].type;
- bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
-
- if (span_type != 't')
- continue;
-
- /* Span is entirely within a single 4KB region: skip scanning. */
- if (((base_vma + span_start) & ~0xfff)
+ {
+ unsigned int span_start = sec_data->map[span].vma;
+ unsigned int span_end = (span == sec_data->mapcount - 1)
+ ? section->size : sec_data->map[span + 1].vma;
+ unsigned int i;
+ char span_type = sec_data->map[span].type;
+ bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
+
+ if (span_type != 't')
+ continue;
+
+ /* Span is entirely within a single 4KB region: skip scanning. */
+ if (((base_vma + span_start) & ~0xfff)
== ((base_vma + span_end) & ~0xfff))
- continue;
-
- /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
-
- * The opcode is BLX.W, BL.W, B.W, Bcc.W
- * The branch target is in the same 4KB region as the
- first half of the branch.
- * The instruction before the branch is a 32-bit
- length non-branch instruction. */
- for (i = span_start; i < span_end;)
- {
- unsigned int insn = bfd_getl16 (&contents[i]);
- bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
+ continue;
+
+ /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
+
+ * The opcode is BLX.W, BL.W, B.W, Bcc.W
+ * The branch target is in the same 4KB region as the
+ first half of the branch.
+ * The instruction before the branch is a 32-bit
+ length non-branch instruction. */
+ for (i = span_start; i < span_end;)
+ {
+ unsigned int insn = bfd_getl16 (&contents[i]);
+ bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
- if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
- insn_32bit = TRUE;
+ if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
+ insn_32bit = TRUE;
if (insn_32bit)
- {
- /* Load the rest of the insn (in manual-friendly order). */
- insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
-
- /* Encoding T4: B<c>.W. */
- is_b = (insn & 0xf800d000) == 0xf0009000;
- /* Encoding T1: BL<c>.W. */
- is_bl = (insn & 0xf800d000) == 0xf000d000;
- /* Encoding T2: BLX<c>.W. */
- is_blx = (insn & 0xf800d000) == 0xf000c000;
+ {
+ /* Load the rest of the insn (in manual-friendly order). */
+ insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
+
+ /* Encoding T4: B<c>.W. */
+ is_b = (insn & 0xf800d000) == 0xf0009000;
+ /* Encoding T1: BL<c>.W. */
+ is_bl = (insn & 0xf800d000) == 0xf000d000;
+ /* Encoding T2: BLX<c>.W. */
+ is_blx = (insn & 0xf800d000) == 0xf000c000;
/* Encoding T3: B<c>.W (not permitted in IT block). */
is_bcc = (insn & 0xf800d000) == 0xf0008000
&& (insn & 0x07f00000) != 0x03800000;
is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
- if (((base_vma + i) & 0xfff) == 0xffe
+ if (((base_vma + i) & 0xfff) == 0xffe
&& insn_32bit
&& is_32bit_branch
&& last_was_32bit
&& ! last_was_branch)
- {
- bfd_signed_vma offset = 0;
- bfd_boolean force_target_arm = FALSE;
+ {
+ bfd_signed_vma offset = 0;
+ bfd_boolean force_target_arm = FALSE;
bfd_boolean force_target_thumb = FALSE;
- bfd_vma target;
- enum elf32_arm_stub_type stub_type = arm_stub_none;
- struct a8_erratum_reloc key, *found;
+ bfd_vma target;
+ enum elf32_arm_stub_type stub_type = arm_stub_none;
+ struct a8_erratum_reloc key, *found;
+ bfd_boolean use_plt = FALSE;
- key.from = base_vma + i;
- found = (struct a8_erratum_reloc *)
- bsearch (&key, a8_relocs, num_a8_relocs,
- sizeof (struct a8_erratum_reloc),
- &a8_reloc_compare);
+ key.from = base_vma + i;
+ found = (struct a8_erratum_reloc *)
+ bsearch (&key, a8_relocs, num_a8_relocs,
+ sizeof (struct a8_erratum_reloc),
+ &a8_reloc_compare);
if (found)
{
char *error_message = NULL;
struct elf_link_hash_entry *entry;
- bfd_boolean use_plt = FALSE;
/* We don't care about the error returned from this
- function, only if there is glue or not. */
+ function, only if there is glue or not. */
entry = find_thumb_glue (info, found->sym_name,
&error_message);
if (found->r_type == R_ARM_THM_CALL)
{
- if (found->st_type != STT_ARM_TFUNC || use_plt)
+ if (found->branch_type == ST_BRANCH_TO_ARM
+ || use_plt)
force_target_arm = TRUE;
else
force_target_thumb = TRUE;
}
}
- /* Check if we have an offending branch instruction. */
+ /* Check if we have an offending branch instruction. */
if (found && found->non_a8_stub)
/* We've already made a stub for this instruction, e.g.
stub will suffice to work around the A8 erratum (see
setting of always_after_branch above). */
;
- else if (is_bcc)
- {
- offset = (insn & 0x7ff) << 1;
- offset |= (insn & 0x3f0000) >> 4;
- offset |= (insn & 0x2000) ? 0x40000 : 0;
- offset |= (insn & 0x800) ? 0x80000 : 0;
- offset |= (insn & 0x4000000) ? 0x100000 : 0;
- if (offset & 0x100000)
- offset |= ~ ((bfd_signed_vma) 0xfffff);
- stub_type = arm_stub_a8_veneer_b_cond;
- }
- else if (is_b || is_bl || is_blx)
- {
- int s = (insn & 0x4000000) != 0;
- int j1 = (insn & 0x2000) != 0;
- int j2 = (insn & 0x800) != 0;
- int i1 = !(j1 ^ s);
- int i2 = !(j2 ^ s);
-
- offset = (insn & 0x7ff) << 1;
- offset |= (insn & 0x3ff0000) >> 4;
- offset |= i2 << 22;
- offset |= i1 << 23;
- offset |= s << 24;
- if (offset & 0x1000000)
- offset |= ~ ((bfd_signed_vma) 0xffffff);
-
- if (is_blx)
- offset &= ~ ((bfd_signed_vma) 3);
-
- stub_type = is_blx ? arm_stub_a8_veneer_blx :
- is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
- }
-
- if (stub_type != arm_stub_none)
- {
- bfd_vma pc_for_insn = base_vma + i + 4;
+ else if (is_bcc)
+ {
+ offset = (insn & 0x7ff) << 1;
+ offset |= (insn & 0x3f0000) >> 4;
+ offset |= (insn & 0x2000) ? 0x40000 : 0;
+ offset |= (insn & 0x800) ? 0x80000 : 0;
+ offset |= (insn & 0x4000000) ? 0x100000 : 0;
+ if (offset & 0x100000)
+ offset |= ~ ((bfd_signed_vma) 0xfffff);
+ stub_type = arm_stub_a8_veneer_b_cond;
+ }
+ else if (is_b || is_bl || is_blx)
+ {
+ int s = (insn & 0x4000000) != 0;
+ int j1 = (insn & 0x2000) != 0;
+ int j2 = (insn & 0x800) != 0;
+ int i1 = !(j1 ^ s);
+ int i2 = !(j2 ^ s);
+
+ offset = (insn & 0x7ff) << 1;
+ offset |= (insn & 0x3ff0000) >> 4;
+ offset |= i2 << 22;
+ offset |= i1 << 23;
+ offset |= s << 24;
+ if (offset & 0x1000000)
+ offset |= ~ ((bfd_signed_vma) 0xffffff);
+
+ if (is_blx)
+ offset &= ~ ((bfd_signed_vma) 3);
+
+ stub_type = is_blx ? arm_stub_a8_veneer_blx :
+ is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
+ }
+
+ if (stub_type != arm_stub_none)
+ {
+ bfd_vma pc_for_insn = base_vma + i + 4;
/* The original instruction is a BL, but the target is
- an ARM instruction. If we were not making a stub,
+ an ARM instruction. If we were not making a stub,
the BL would have been converted to a BLX. Use the
BLX stub instead in that case. */
if (htab->use_blx && force_target_arm
is_bl = TRUE;
}
- if (is_blx)
- pc_for_insn &= ~ ((bfd_vma) 3);
+ if (is_blx)
+ pc_for_insn &= ~ ((bfd_vma) 3);
- /* If we found a relocation, use the proper destination,
- not the offset in the (unrelocated) instruction.
+ /* If we found a relocation, use the proper destination,
+ not the offset in the (unrelocated) instruction.
Note this is always done if we switched the stub type
above. */
- if (found)
- offset =
+ if (found)
+ offset =
(bfd_signed_vma) (found->destination - pc_for_insn);
- target = pc_for_insn + offset;
+ /* If the stub will use a Thumb-mode branch to a
+ PLT target, redirect it to the preceding Thumb
+ entry point. */
+ if (stub_type != arm_stub_a8_veneer_blx && use_plt)
+ offset -= PLT_THUMB_STUB_SIZE;
- /* The BLX stub is ARM-mode code. Adjust the offset to
- take the different PC value (+8 instead of +4) into
+ target = pc_for_insn + offset;
+
+ /* The BLX stub is ARM-mode code. Adjust the offset to
+ take the different PC value (+8 instead of +4) into
account. */
- if (stub_type == arm_stub_a8_veneer_blx)
- offset += 4;
-
- if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
- {
- char *stub_name = NULL;
-
- if (num_a8_fixes == a8_fix_table_size)
- {
- a8_fix_table_size *= 2;
- a8_fixes = (struct a8_erratum_fix *)
- bfd_realloc (a8_fixes,
- sizeof (struct a8_erratum_fix)
- * a8_fix_table_size);
- }
+ if (stub_type == arm_stub_a8_veneer_blx)
+ offset += 4;
+
+ if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
+ {
+ char *stub_name = NULL;
+
+ if (num_a8_fixes == a8_fix_table_size)
+ {
+ a8_fix_table_size *= 2;
+ a8_fixes = (struct a8_erratum_fix *)
+ bfd_realloc (a8_fixes,
+ sizeof (struct a8_erratum_fix)
+ * a8_fix_table_size);
+ }
if (num_a8_fixes < prev_num_a8_fixes)
{
sprintf (stub_name, "%x:%x", section->id, i);
}
- a8_fixes[num_a8_fixes].input_bfd = input_bfd;
- a8_fixes[num_a8_fixes].section = section;
- a8_fixes[num_a8_fixes].offset = i;
- a8_fixes[num_a8_fixes].addend = offset;
- a8_fixes[num_a8_fixes].orig_insn = insn;
- a8_fixes[num_a8_fixes].stub_name = stub_name;
- a8_fixes[num_a8_fixes].stub_type = stub_type;
- a8_fixes[num_a8_fixes].st_type =
- is_blx ? STT_FUNC : STT_ARM_TFUNC;
-
- num_a8_fixes++;
- }
- }
- }
-
- i += insn_32bit ? 4 : 2;
- last_was_32bit = insn_32bit;
+ a8_fixes[num_a8_fixes].input_bfd = input_bfd;
+ a8_fixes[num_a8_fixes].section = section;
+ a8_fixes[num_a8_fixes].offset = i;
+ a8_fixes[num_a8_fixes].addend = offset;
+ a8_fixes[num_a8_fixes].orig_insn = insn;
+ a8_fixes[num_a8_fixes].stub_name = stub_name;
+ a8_fixes[num_a8_fixes].stub_type = stub_type;
+ a8_fixes[num_a8_fixes].branch_type =
+ is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
+
+ num_a8_fixes++;
+ }
+ }
+ }
+
+ i += insn_32bit ? 4 : 2;
+ last_was_32bit = insn_32bit;
last_was_branch = is_32bit_branch;
- }
- }
+ }
+ }
if (elf_section_data (section)->this_hdr.contents == NULL)
- free (contents);
+ free (contents);
}
*a8_fixes_p = a8_fixes;
if (htab->fix_cortex_a8)
{
a8_fixes = (struct a8_erratum_fix *)
- bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
+ bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
a8_relocs = (struct a8_erratum_reloc *)
- bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
+ bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
}
/* Propagate mach to stub bfd, because it may not have been
asection *section;
Elf_Internal_Sym *local_syms = NULL;
+ if (!is_arm_elf (input_bfd))
+ continue;
+
num_a8_relocs = 0;
/* We'll need the symbol table in a second. */
const char *sym_name;
char *stub_name;
const asection *id_sec;
- int st_type;
+ unsigned char st_type;
+ enum arm_st_branch_type branch_type;
bfd_boolean created_stub = FALSE;
r_type = ELF32_R_TYPE (irela->r_info);
goto error_ret_free_local;
}
- /* Only look for stubs on branch instructions. */
+ hash = NULL;
+ if (r_indx >= symtab_hdr->sh_info)
+ hash = elf32_arm_hash_entry
+ (elf_sym_hashes (input_bfd)
+ [r_indx - symtab_hdr->sh_info]);
+
+ /* Only look for stubs on branch instructions, or
+ non-relaxed TLSCALL */
if ((r_type != (unsigned int) R_ARM_CALL)
&& (r_type != (unsigned int) R_ARM_THM_CALL)
&& (r_type != (unsigned int) R_ARM_JUMP24)
&& (r_type != (unsigned int) R_ARM_THM_JUMP19)
&& (r_type != (unsigned int) R_ARM_THM_XPC22)
&& (r_type != (unsigned int) R_ARM_THM_JUMP24)
- && (r_type != (unsigned int) R_ARM_PLT32))
+ && (r_type != (unsigned int) R_ARM_PLT32)
+ && !((r_type == (unsigned int) R_ARM_TLS_CALL
+ || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
+ && r_type == elf32_arm_tls_transition
+ (info, r_type, &hash->root)
+ && ((hash ? hash->tls_type
+ : (elf32_arm_local_got_tls_type
+ (input_bfd)[r_indx]))
+ & GOT_TLS_GDESC) != 0))
continue;
/* Now determine the call target, its name, value,
sym_sec = NULL;
sym_value = 0;
destination = 0;
- hash = NULL;
sym_name = NULL;
- if (r_indx < symtab_hdr->sh_info)
+
+ if (r_type == (unsigned int) R_ARM_TLS_CALL
+ || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
+ {
+ /* A non-relaxed TLS call. The target is the
+ plt-resident trampoline and nothing to do
+ with the symbol. */
+ BFD_ASSERT (htab->tls_trampoline > 0);
+ sym_sec = htab->root.splt;
+ sym_value = htab->tls_trampoline;
+ hash = 0;
+ st_type = STT_FUNC;
+ branch_type = ST_BRANCH_TO_ARM;
+ }
+ else if (!hash)
{
/* It's a local symbol. */
Elf_Internal_Sym *sym;
+ sym_sec->output_offset
+ sym_sec->output_section->vma);
st_type = ELF_ST_TYPE (sym->st_info);
+ branch_type = ARM_SYM_BRANCH_TYPE (sym);
sym_name
= bfd_elf_string_from_elf_section (input_bfd,
symtab_hdr->sh_link,
else
{
/* It's an external symbol. */
- int e_indx;
-
- e_indx = r_indx - symtab_hdr->sh_info;
- hash = ((struct elf32_arm_link_hash_entry *)
- elf_sym_hashes (input_bfd)[e_indx]);
-
while (hash->root.root.type == bfd_link_hash_indirect
|| hash->root.root.type == bfd_link_hash_warning)
hash = ((struct elf32_arm_link_hash_entry *)
bfd_set_error (bfd_error_bad_value);
goto error_ret_free_internal;
}
- st_type = ELF_ST_TYPE (hash->root.type);
+ st_type = hash->root.type;
+ branch_type = hash->root.target_internal;
sym_name = hash->root.root.root.string;
}
{
/* Determine what (if any) linker stub is needed. */
stub_type = arm_type_of_stub (info, section, irela,
- &st_type, hash,
- destination, sym_sec,
+ st_type, &branch_type,
+ hash, destination, sym_sec,
input_bfd, sym_name);
if (stub_type == arm_stub_none)
break;
goto error_ret_free_internal;
}
- stub_entry->target_value = sym_value;
- stub_entry->target_section = sym_sec;
- stub_entry->stub_type = stub_type;
- stub_entry->h = hash;
- stub_entry->st_type = st_type;
-
- if (sym_name == NULL)
- sym_name = "unnamed";
- stub_entry->output_name = (char *)
- bfd_alloc (htab->stub_bfd,
- sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
- + strlen (sym_name));
- if (stub_entry->output_name == NULL)
- {
- free (stub_name);
- goto error_ret_free_internal;
- }
-
- /* For historical reasons, use the existing names for
- ARM-to-Thumb and Thumb-to-ARM stubs. */
- if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
- || (r_type == (unsigned int) R_ARM_THM_JUMP24))
- && st_type != STT_ARM_TFUNC)
- sprintf (stub_entry->output_name,
- THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
- else if ( ((r_type == (unsigned int) R_ARM_CALL)
- || (r_type == (unsigned int) R_ARM_JUMP24))
- && st_type == STT_ARM_TFUNC)
- sprintf (stub_entry->output_name,
- ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
- else
- sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
- sym_name);
-
- stub_changed = TRUE;
- }
- while (0);
-
- /* Look for relocations which might trigger Cortex-A8
- erratum. */
- if (htab->fix_cortex_a8
- && (r_type == (unsigned int) R_ARM_THM_JUMP24
- || r_type == (unsigned int) R_ARM_THM_JUMP19
- || r_type == (unsigned int) R_ARM_THM_CALL
- || r_type == (unsigned int) R_ARM_THM_XPC22))
- {
- bfd_vma from = section->output_section->vma
- + section->output_offset
- + irela->r_offset;
-
- if ((from & 0xfff) == 0xffe)
- {
- /* Found a candidate. Note we haven't checked the
- destination is within 4K here: if we do so (and
- don't create an entry in a8_relocs) we can't tell
- that a branch should have been relocated when
- scanning later. */
- if (num_a8_relocs == a8_reloc_table_size)
- {
- a8_reloc_table_size *= 2;
- a8_relocs = (struct a8_erratum_reloc *)
- bfd_realloc (a8_relocs,
- sizeof (struct a8_erratum_reloc)
- * a8_reloc_table_size);
- }
-
- a8_relocs[num_a8_relocs].from = from;
- a8_relocs[num_a8_relocs].destination = destination;
- a8_relocs[num_a8_relocs].r_type = r_type;
- a8_relocs[num_a8_relocs].st_type = st_type;
- a8_relocs[num_a8_relocs].sym_name = sym_name;
- a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
- a8_relocs[num_a8_relocs].hash = hash;
-
- num_a8_relocs++;
- }
- }
- }
+ stub_entry->target_value = sym_value;
+ stub_entry->target_section = sym_sec;
+ stub_entry->stub_type = stub_type;
+ stub_entry->h = hash;
+ stub_entry->branch_type = branch_type;
+
+ if (sym_name == NULL)
+ sym_name = "unnamed";
+ stub_entry->output_name = (char *)
+ bfd_alloc (htab->stub_bfd,
+ sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
+ + strlen (sym_name));
+ if (stub_entry->output_name == NULL)
+ {
+ free (stub_name);
+ goto error_ret_free_internal;
+ }
- /* We're done with the internal relocs, free them. */
- if (elf_section_data (section)->relocs == NULL)
- free (internal_relocs);
- }
+ /* For historical reasons, use the existing names for
+ ARM-to-Thumb and Thumb-to-ARM stubs. */
+ if ((r_type == (unsigned int) R_ARM_THM_CALL
+ || r_type == (unsigned int) R_ARM_THM_JUMP24)
+ && branch_type == ST_BRANCH_TO_ARM)
+ sprintf (stub_entry->output_name,
+ THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
+ else if ((r_type == (unsigned int) R_ARM_CALL
+ || r_type == (unsigned int) R_ARM_JUMP24)
+ && branch_type == ST_BRANCH_TO_THUMB)
+ sprintf (stub_entry->output_name,
+ ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
+ else
+ sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
+ sym_name);
- if (htab->fix_cortex_a8)
- {
- /* Sort relocs which might apply to Cortex-A8 erratum. */
- qsort (a8_relocs, num_a8_relocs,
- sizeof (struct a8_erratum_reloc),
- &a8_reloc_compare);
+ stub_changed = TRUE;
+ }
+ while (0);
+
+ /* Look for relocations which might trigger Cortex-A8
+ erratum. */
+ if (htab->fix_cortex_a8
+ && (r_type == (unsigned int) R_ARM_THM_JUMP24
+ || r_type == (unsigned int) R_ARM_THM_JUMP19
+ || r_type == (unsigned int) R_ARM_THM_CALL
+ || r_type == (unsigned int) R_ARM_THM_XPC22))
+ {
+ bfd_vma from = section->output_section->vma
+ + section->output_offset
+ + irela->r_offset;
- /* Scan for branches which might trigger Cortex-A8 erratum. */
- if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
- &num_a8_fixes, &a8_fix_table_size,
- a8_relocs, num_a8_relocs,
- prev_num_a8_fixes, &stub_changed)
- != 0)
- goto error_ret_free_local;
+ if ((from & 0xfff) == 0xffe)
+ {
+ /* Found a candidate. Note we haven't checked the
+ destination is within 4K here: if we do so (and
+ don't create an entry in a8_relocs) we can't tell
+ that a branch should have been relocated when
+ scanning later. */
+ if (num_a8_relocs == a8_reloc_table_size)
+ {
+ a8_reloc_table_size *= 2;
+ a8_relocs = (struct a8_erratum_reloc *)
+ bfd_realloc (a8_relocs,
+ sizeof (struct a8_erratum_reloc)
+ * a8_reloc_table_size);
+ }
+
+ a8_relocs[num_a8_relocs].from = from;
+ a8_relocs[num_a8_relocs].destination = destination;
+ a8_relocs[num_a8_relocs].r_type = r_type;
+ a8_relocs[num_a8_relocs].branch_type = branch_type;
+ a8_relocs[num_a8_relocs].sym_name = sym_name;
+ a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
+ a8_relocs[num_a8_relocs].hash = hash;
+
+ num_a8_relocs++;
+ }
+ }
+ }
+
+ /* We're done with the internal relocs, free them. */
+ if (elf_section_data (section)->relocs == NULL)
+ free (internal_relocs);
+ }
+
+ if (htab->fix_cortex_a8)
+ {
+ /* Sort relocs which might apply to Cortex-A8 erratum. */
+ qsort (a8_relocs, num_a8_relocs,
+ sizeof (struct a8_erratum_reloc),
+ &a8_reloc_compare);
+
+ /* Scan for branches which might trigger Cortex-A8 erratum. */
+ if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
+ &num_a8_fixes, &a8_fix_table_size,
+ a8_relocs, num_a8_relocs,
+ prev_num_a8_fixes, &stub_changed)
+ != 0)
+ goto error_ret_free_local;
}
}
if (prev_num_a8_fixes != num_a8_fixes)
- stub_changed = TRUE;
+ stub_changed = TRUE;
if (!stub_changed)
break;
/* Add Cortex-A8 erratum veneers to stub section sizes too. */
if (htab->fix_cortex_a8)
- for (i = 0; i < num_a8_fixes; i++)
- {
+ for (i = 0; i < num_a8_fixes; i++)
+ {
stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
a8_fixes[i].section, htab);
if (stub_sec == NULL)
goto error_ret_free_local;
- stub_sec->size
- += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
- NULL);
- }
+ stub_sec->size
+ += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
+ NULL);
+ }
/* Ask the linker to do its stuff. */
if (htab->fix_cortex_a8)
{
for (i = 0; i < num_a8_fixes; i++)
- {
- struct elf32_arm_stub_hash_entry *stub_entry;
- char *stub_name = a8_fixes[i].stub_name;
- asection *section = a8_fixes[i].section;
- unsigned int section_id = a8_fixes[i].section->id;
- asection *link_sec = htab->stub_group[section_id].link_sec;
- asection *stub_sec = htab->stub_group[section_id].stub_sec;
- const insn_sequence *template_sequence;
- int template_size, size = 0;
-
- stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
- TRUE, FALSE);
- if (stub_entry == NULL)
- {
- (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
- section->owner,
- stub_name);
- return FALSE;
- }
-
- stub_entry->stub_sec = stub_sec;
- stub_entry->stub_offset = 0;
- stub_entry->id_sec = link_sec;
- stub_entry->stub_type = a8_fixes[i].stub_type;
- stub_entry->target_section = a8_fixes[i].section;
- stub_entry->target_value = a8_fixes[i].offset;
- stub_entry->target_addend = a8_fixes[i].addend;
- stub_entry->orig_insn = a8_fixes[i].orig_insn;
- stub_entry->st_type = a8_fixes[i].st_type;
-
- size = find_stub_size_and_template (a8_fixes[i].stub_type,
- &template_sequence,
- &template_size);
-
- stub_entry->stub_size = size;
- stub_entry->stub_template = template_sequence;
- stub_entry->stub_template_size = template_size;
- }
+ {
+ struct elf32_arm_stub_hash_entry *stub_entry;
+ char *stub_name = a8_fixes[i].stub_name;
+ asection *section = a8_fixes[i].section;
+ unsigned int section_id = a8_fixes[i].section->id;
+ asection *link_sec = htab->stub_group[section_id].link_sec;
+ asection *stub_sec = htab->stub_group[section_id].stub_sec;
+ const insn_sequence *template_sequence;
+ int template_size, size = 0;
+
+ stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
+ TRUE, FALSE);
+ if (stub_entry == NULL)
+ {
+ (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
+ section->owner,
+ stub_name);
+ return FALSE;
+ }
+
+ stub_entry->stub_sec = stub_sec;
+ stub_entry->stub_offset = 0;
+ stub_entry->id_sec = link_sec;
+ stub_entry->stub_type = a8_fixes[i].stub_type;
+ stub_entry->target_section = a8_fixes[i].section;
+ stub_entry->target_value = a8_fixes[i].offset;
+ stub_entry->target_addend = a8_fixes[i].addend;
+ stub_entry->orig_insn = a8_fixes[i].orig_insn;
+ stub_entry->branch_type = a8_fixes[i].branch_type;
+
+ size = find_stub_size_and_template (a8_fixes[i].stub_type,
+ &template_sequence,
+ &template_size);
+
+ stub_entry->stub_size = size;
+ stub_entry->stub_template = template_sequence;
+ stub_entry->stub_template_size = template_size;
+ }
/* Stash the Cortex-A8 erratum fix array for use later in
- elf32_arm_write_section(). */
+ elf32_arm_write_section(). */
htab->a8_erratum_fixes = a8_fixes;
htab->num_a8_erratum_fixes = num_a8_fixes;
}
return NULL;
tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
- + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
+ + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
BFD_ASSERT (tmp_name);
return NULL;
tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
- + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
+ + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
BFD_ASSERT (tmp_name);
nop ldr r6, __func_addr
.arm mov lr, pc
b func bx r6
- .arm
- ;; back_to_thumb
- ldmia r13! {r6, lr}
- bx lr
- __func_addr:
- .word func */
+ .arm
+ ;; back_to_thumb
+ ldmia r13! {r6, lr}
+ bx lr
+ __func_addr:
+ .word func */
#define THUMB2ARM_GLUE_SIZE 8
static const insn16 t2a1_bx_pc_insn = 0x4778;
/* Do not include empty glue sections in the output. */
if (abfd != NULL)
{
- s = bfd_get_section_by_name (abfd, name);
+ s = bfd_get_linker_section (abfd, name);
if (s != NULL)
s->flags |= SEC_EXCLUDE;
}
BFD_ASSERT (abfd != NULL);
- s = bfd_get_section_by_name (abfd, name);
+ s = bfd_get_linker_section (abfd, name);
BFD_ASSERT (s != NULL);
contents = (bfd_byte *) bfd_alloc (abfd, size);
BFD_ASSERT (globals != NULL);
BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
- s = bfd_get_section_by_name
+ s = bfd_get_linker_section
(globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
BFD_ASSERT (s != NULL);
tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
- + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
+ + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
BFD_ASSERT (tmp_name);
if (globals->bx_glue_offset[reg])
return;
- s = bfd_get_section_by_name
+ s = bfd_get_linker_section
(globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
BFD_ASSERT (s != NULL);
bh = NULL;
val = globals->bx_glue_size;
_bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
- tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
- NULL, TRUE, FALSE, &bh);
+ tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
+ NULL, TRUE, FALSE, &bh);
myh = (struct elf_link_hash_entry *) bh;
myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
if (sec_data->map == NULL)
{
sec_data->map = (elf32_arm_section_map *)
- bfd_malloc (sizeof (elf32_arm_section_map));
+ bfd_malloc (sizeof (elf32_arm_section_map));
sec_data->mapcount = 0;
sec_data->mapsize = 1;
}
{
sec_data->mapsize *= 2;
sec_data->map = (elf32_arm_section_map *)
- bfd_realloc_or_free (sec_data->map, sec_data->mapsize
- * sizeof (elf32_arm_section_map));
+ bfd_realloc_or_free (sec_data->map, sec_data->mapsize
+ * sizeof (elf32_arm_section_map));
}
if (sec_data->map)
static bfd_vma
record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
- elf32_vfp11_erratum_list *branch,
- bfd *branch_bfd,
- asection *branch_sec,
- unsigned int offset)
+ elf32_vfp11_erratum_list *branch,
+ bfd *branch_bfd,
+ asection *branch_sec,
+ unsigned int offset)
{
asection *s;
struct elf32_arm_link_hash_table *hash_table;
BFD_ASSERT (hash_table != NULL);
BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
- s = bfd_get_section_by_name
+ s = bfd_get_linker_section
(hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
sec_data = elf32_arm_section_data (s);
BFD_ASSERT (s != NULL);
tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
- (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
+ (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
BFD_ASSERT (tmp_name);
bh = NULL;
val = hash_table->vfp11_erratum_glue_size;
_bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
- tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
- NULL, TRUE, FALSE, &bh);
+ tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
+ NULL, TRUE, FALSE, &bh);
myh = (struct elf_link_hash_entry *) bh;
myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
{
bh = NULL;
/* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
- ever requires this erratum fix. */
+ ever requires this erratum fix. */
_bfd_generic_link_add_one_symbol (link_info,
hash_table->bfd_of_glue_owner, "$a",
BSF_LOCAL, s, 0, NULL,
- TRUE, FALSE, &bh);
+ TRUE, FALSE, &bh);
myh = (struct elf_link_hash_entry *) bh;
myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
myh->forced_local = 1;
/* The elf32_arm_init_maps function only cares about symbols from input
- BFDs. We must make a note of this generated mapping symbol
- ourselves so that code byteswapping works properly in
- elf32_arm_write_section. */
+ BFDs. We must make a note of this generated mapping symbol
+ ourselves so that code byteswapping works properly in
+ elf32_arm_write_section. */
elf32_arm_section_map_add (s, 'a', 0);
}
{
asection * sec;
- sec = bfd_get_section_by_name (abfd, name);
+ sec = bfd_get_linker_section (abfd, name);
if (sec != NULL)
/* Already made. */
return TRUE;
- sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
+ sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
if (sec == NULL
|| !bfd_set_section_alignment (abfd, sec, 2))
static void
check_use_blx (struct elf32_arm_link_hash_table *globals)
{
- if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
- Tag_CPU_arch) > 2)
- globals->use_blx = 1;
+ int cpu_arch;
+
+ cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
+ Tag_CPU_arch);
+
+ if (globals->fix_arm1176)
+ {
+ if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
+ globals->use_blx = 1;
+ }
+ else
+ {
+ if (cpu_arch > TAG_CPU_ARCH_V4T)
+ globals->use_blx = 1;
+ }
}
bfd_boolean
{
case R_ARM_PC24:
/* This one is a call from arm code. We need to look up
- the target of the call. If it is a thumb target, we
- insert glue. */
- if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
+ the target of the call. If it is a thumb target, we
+ insert glue. */
+ if (h->target_internal == ST_BRANCH_TO_THUMB)
record_arm_to_thumb_glue (link_info, h);
break;
const char *name;
if (sec != NULL
- && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
- {
- name = bfd_elf_string_from_elf_section (abfd,
- hdr->sh_link, isym->st_name);
+ && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
+ {
+ name = bfd_elf_string_from_elf_section (abfd,
+ hdr->sh_link, isym->st_name);
- if (bfd_is_arm_special_symbol_name (name,
+ if (bfd_is_arm_special_symbol_name (name,
BFD_ARM_SPECIAL_SYM_TYPE_MAP))
- elf32_arm_section_map_add (sec, name[1], isym->st_value);
- }
+ elf32_arm_section_map_add (sec, name[1], isym->st_value);
+ }
}
}
if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
{
switch (globals->vfp11_fix)
- {
- case BFD_ARM_VFP11_FIX_DEFAULT:
- case BFD_ARM_VFP11_FIX_NONE:
- globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
- break;
-
- default:
- /* Give a warning, but do as the user requests anyway. */
- (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
- "workaround is not necessary for target architecture"), obfd);
- }
+ {
+ case BFD_ARM_VFP11_FIX_DEFAULT:
+ case BFD_ARM_VFP11_FIX_NONE:
+ globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
+ break;
+
+ default:
+ /* Give a warning, but do as the user requests anyway. */
+ (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
+ "workaround is not necessary for target architecture"), obfd);
+ }
}
else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
/* For earlier architectures, we might need the workaround, but do not
static unsigned int
bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
- unsigned int x)
+ unsigned int x)
{
if (is_double)
return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
unsigned int reg = regs[i];
if (reg < 32 && (wmask & (1 << reg)) != 0)
- return TRUE;
+ return TRUE;
reg -= 32;
if (reg >= 16)
- continue;
+ continue;
if ((wmask & (3 << (reg * 2))) != 0)
- return TRUE;
+ return TRUE;
}
return FALSE;
static enum bfd_arm_vfp11_pipe
bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
- int *numregs)
+ int *numregs)
{
enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
pqrs = ((insn & 0x00800000) >> 20)
- | ((insn & 0x00300000) >> 19)
- | ((insn & 0x00000040) >> 6);
+ | ((insn & 0x00300000) >> 19)
+ | ((insn & 0x00000040) >> 6);
switch (pqrs)
- {
- case 0: /* fmac[sd]. */
- case 1: /* fnmac[sd]. */
- case 2: /* fmsc[sd]. */
- case 3: /* fnmsc[sd]. */
- vpipe = VFP11_FMAC;
- bfd_arm_vfp11_write_mask (destmask, fd);
- regs[0] = fd;
- regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
- regs[2] = fm;
- *numregs = 3;
- break;
-
- case 4: /* fmul[sd]. */
- case 5: /* fnmul[sd]. */
- case 6: /* fadd[sd]. */
- case 7: /* fsub[sd]. */
- vpipe = VFP11_FMAC;
- goto vfp_binop;
-
- case 8: /* fdiv[sd]. */
- vpipe = VFP11_DS;
- vfp_binop:
- bfd_arm_vfp11_write_mask (destmask, fd);
- regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
- regs[1] = fm;
- *numregs = 2;
- break;
-
- case 15: /* extended opcode. */
- {
- unsigned int extn = ((insn >> 15) & 0x1e)
- | ((insn >> 7) & 1);
-
- switch (extn)
- {
- case 0: /* fcpy[sd]. */
- case 1: /* fabs[sd]. */
- case 2: /* fneg[sd]. */
- case 8: /* fcmp[sd]. */
- case 9: /* fcmpe[sd]. */
- case 10: /* fcmpz[sd]. */
- case 11: /* fcmpez[sd]. */
- case 16: /* fuito[sd]. */
- case 17: /* fsito[sd]. */
- case 24: /* ftoui[sd]. */
- case 25: /* ftouiz[sd]. */
- case 26: /* ftosi[sd]. */
- case 27: /* ftosiz[sd]. */
- /* These instructions will not bounce due to underflow. */
- *numregs = 0;
- vpipe = VFP11_FMAC;
- break;
-
- case 3: /* fsqrt[sd]. */
- /* fsqrt cannot underflow, but it can (perhaps) overwrite
- registers to cause the erratum in previous instructions. */
- bfd_arm_vfp11_write_mask (destmask, fd);
- vpipe = VFP11_DS;
- break;
-
- case 15: /* fcvt{ds,sd}. */
- {
- int rnum = 0;
-
- bfd_arm_vfp11_write_mask (destmask, fd);
+ {
+ case 0: /* fmac[sd]. */
+ case 1: /* fnmac[sd]. */
+ case 2: /* fmsc[sd]. */
+ case 3: /* fnmsc[sd]. */
+ vpipe = VFP11_FMAC;
+ bfd_arm_vfp11_write_mask (destmask, fd);
+ regs[0] = fd;
+ regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
+ regs[2] = fm;
+ *numregs = 3;
+ break;
+
+ case 4: /* fmul[sd]. */
+ case 5: /* fnmul[sd]. */
+ case 6: /* fadd[sd]. */
+ case 7: /* fsub[sd]. */
+ vpipe = VFP11_FMAC;
+ goto vfp_binop;
+
+ case 8: /* fdiv[sd]. */
+ vpipe = VFP11_DS;
+ vfp_binop:
+ bfd_arm_vfp11_write_mask (destmask, fd);
+ regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
+ regs[1] = fm;
+ *numregs = 2;
+ break;
+
+ case 15: /* extended opcode. */
+ {
+ unsigned int extn = ((insn >> 15) & 0x1e)
+ | ((insn >> 7) & 1);
+
+ switch (extn)
+ {
+ case 0: /* fcpy[sd]. */
+ case 1: /* fabs[sd]. */
+ case 2: /* fneg[sd]. */
+ case 8: /* fcmp[sd]. */
+ case 9: /* fcmpe[sd]. */
+ case 10: /* fcmpz[sd]. */
+ case 11: /* fcmpez[sd]. */
+ case 16: /* fuito[sd]. */
+ case 17: /* fsito[sd]. */
+ case 24: /* ftoui[sd]. */
+ case 25: /* ftouiz[sd]. */
+ case 26: /* ftosi[sd]. */
+ case 27: /* ftosiz[sd]. */
+ /* These instructions will not bounce due to underflow. */
+ *numregs = 0;
+ vpipe = VFP11_FMAC;
+ break;
+
+ case 3: /* fsqrt[sd]. */
+ /* fsqrt cannot underflow, but it can (perhaps) overwrite
+ registers to cause the erratum in previous instructions. */
+ bfd_arm_vfp11_write_mask (destmask, fd);
+ vpipe = VFP11_DS;
+ break;
+
+ case 15: /* fcvt{ds,sd}. */
+ {
+ int rnum = 0;
+
+ bfd_arm_vfp11_write_mask (destmask, fd);
/* Only FCVTSD can underflow. */
- if ((insn & 0x100) != 0)
- regs[rnum++] = fm;
+ if ((insn & 0x100) != 0)
+ regs[rnum++] = fm;
- *numregs = rnum;
+ *numregs = rnum;
- vpipe = VFP11_FMAC;
- }
- break;
+ vpipe = VFP11_FMAC;
+ }
+ break;
- default:
- return VFP11_BAD;
- }
- }
- break;
+ default:
+ return VFP11_BAD;
+ }
+ }
+ break;
- default:
- return VFP11_BAD;
- }
+ default:
+ return VFP11_BAD;
+ }
}
/* Two-register transfer. */
else if ((insn & 0x0fe00ed0) == 0x0c400a10)
if ((insn & 0x100000) == 0)
{
- if (is_double)
- bfd_arm_vfp11_write_mask (destmask, fm);
- else
- {
- bfd_arm_vfp11_write_mask (destmask, fm);
- bfd_arm_vfp11_write_mask (destmask, fm + 1);
- }
+ if (is_double)
+ bfd_arm_vfp11_write_mask (destmask, fm);
+ else
+ {
+ bfd_arm_vfp11_write_mask (destmask, fm);
+ bfd_arm_vfp11_write_mask (destmask, fm + 1);
+ }
}
vpipe = VFP11_LS;
unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
switch (puw)
- {
- case 0: /* Two-reg transfer. We should catch these above. */
- abort ();
+ {
+ case 0: /* Two-reg transfer. We should catch these above. */
+ abort ();
- case 2: /* fldm[sdx]. */
- case 3:
- case 5:
- {
- unsigned int i, offset = insn & 0xff;
+ case 2: /* fldm[sdx]. */
+ case 3:
+ case 5:
+ {
+ unsigned int i, offset = insn & 0xff;
- if (is_double)
- offset >>= 1;
+ if (is_double)
+ offset >>= 1;
- for (i = fd; i < fd + offset; i++)
- bfd_arm_vfp11_write_mask (destmask, i);
- }
- break;
+ for (i = fd; i < fd + offset; i++)
+ bfd_arm_vfp11_write_mask (destmask, i);
+ }
+ break;
- case 4: /* fld[sd]. */
- case 6:
- bfd_arm_vfp11_write_mask (destmask, fd);
- break;
+ case 4: /* fld[sd]. */
+ case 6:
+ bfd_arm_vfp11_write_mask (destmask, fd);
+ break;
- default:
- return VFP11_BAD;
- }
+ default:
+ return VFP11_BAD;
+ }
vpipe = VFP11_LS;
}
unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
switch (opcode)
- {
- case 0: /* fmsr/fmdlr. */
- case 1: /* fmdhr. */
- /* Mark fmdhr and fmdlr as writing to the whole of the DP
- destination register. I don't know if this is exactly right,
- but it is the conservative choice. */
- bfd_arm_vfp11_write_mask (destmask, fn);
- break;
-
- case 7: /* fmxr. */
- break;
- }
+ {
+ case 0: /* fmsr/fmdlr. */
+ case 1: /* fmdhr. */
+ /* Mark fmdhr and fmdlr as writing to the whole of the DP
+ destination register. I don't know if this is exactly right,
+ but it is the conservative choice. */
+ bfd_arm_vfp11_write_mask (destmask, fn);
+ break;
+
+ case 7: /* fmxr. */
+ break;
+ }
vpipe = VFP11_LS;
}
The states transition as follows:
0 -> 1 (vector) or 0 -> 2 (scalar)
- A VFP FMAC-pipeline instruction has been seen. Fill
- regs[0]..regs[numregs-1] with its input operands. Remember this
- instruction in 'first_fmac'.
+ A VFP FMAC-pipeline instruction has been seen. Fill
+ regs[0]..regs[numregs-1] with its input operands. Remember this
+ instruction in 'first_fmac'.
1 -> 2
- Any instruction, except for a VFP instruction which overwrites
- regs[*].
+ Any instruction, except for a VFP instruction which overwrites
+ regs[*].
1 -> 3 [ -> 0 ] or
2 -> 3 [ -> 0 ]
- A VFP instruction has been seen which overwrites any of regs[*].
- We must make a veneer! Reset state to 0 before examining next
- instruction.
+ A VFP instruction has been seen which overwrites any of regs[*].
+ We must make a veneer! Reset state to 0 before examining next
+ instruction.
2 -> 0
- If we fail to match anything in state 2, reset to state 0 and reset
- the instruction pointer to the instruction after 'first_fmac'.
+ If we fail to match anything in state 2, reset to state 0 and reset
+ the instruction pointer to the instruction after 'first_fmac'.
If the VFP11 vector mode is in use, there must be at least two unrelated
instructions between anti-dependent VFP11 instructions to properly avoid
struct _arm_elf_section_data *sec_data;
/* If we don't have executable progbits, we're not interested in this
- section. Also skip if section is to be excluded. */
+ section. Also skip if section is to be excluded. */
if (elf_section_type (sec) != SHT_PROGBITS
- || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
- || (sec->flags & SEC_EXCLUDE) != 0
- || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
+ || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
+ || (sec->flags & SEC_EXCLUDE) != 0
+ || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
|| sec->output_section == bfd_abs_section_ptr
- || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
- continue;
+ || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
+ continue;
sec_data = elf32_arm_section_data (sec);
if (sec_data->mapcount == 0)
- continue;
+ continue;
if (elf_section_data (sec)->this_hdr.contents != NULL)
contents = elf_section_data (sec)->this_hdr.contents;
elf32_arm_compare_mapping);
for (span = 0; span < sec_data->mapcount; span++)
- {
- unsigned int span_start = sec_data->map[span].vma;
- unsigned int span_end = (span == sec_data->mapcount - 1)
+ {
+ unsigned int span_start = sec_data->map[span].vma;
+ unsigned int span_end = (span == sec_data->mapcount - 1)
? sec->size : sec_data->map[span + 1].vma;
- char span_type = sec_data->map[span].type;
-
- /* FIXME: Only ARM mode is supported at present. We may need to
- support Thumb-2 mode also at some point. */
- if (span_type != 'a')
- continue;
-
- for (i = span_start; i < span_end;)
- {
- unsigned int next_i = i + 4;
- unsigned int insn = bfd_big_endian (abfd)
- ? (contents[i] << 24)
- | (contents[i + 1] << 16)
- | (contents[i + 2] << 8)
- | contents[i + 3]
- : (contents[i + 3] << 24)
- | (contents[i + 2] << 16)
- | (contents[i + 1] << 8)
- | contents[i];
- unsigned int writemask = 0;
- enum bfd_arm_vfp11_pipe vpipe;
-
- switch (state)
- {
- case 0:
- vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
- &numregs);
- /* I'm assuming the VFP11 erratum can trigger with denorm
- operands on either the FMAC or the DS pipeline. This might
- lead to slightly overenthusiastic veneer insertion. */
- if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
- {
- state = use_vector ? 1 : 2;
- first_fmac = i;
- veneer_of_insn = insn;
- }
- break;
-
- case 1:
- {
- int other_regs[3], other_numregs;
- vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
+ char span_type = sec_data->map[span].type;
+
+ /* FIXME: Only ARM mode is supported at present. We may need to
+ support Thumb-2 mode also at some point. */
+ if (span_type != 'a')
+ continue;
+
+ for (i = span_start; i < span_end;)
+ {
+ unsigned int next_i = i + 4;
+ unsigned int insn = bfd_big_endian (abfd)
+ ? (contents[i] << 24)
+ | (contents[i + 1] << 16)
+ | (contents[i + 2] << 8)
+ | contents[i + 3]
+ : (contents[i + 3] << 24)
+ | (contents[i + 2] << 16)
+ | (contents[i + 1] << 8)
+ | contents[i];
+ unsigned int writemask = 0;
+ enum bfd_arm_vfp11_pipe vpipe;
+
+ switch (state)
+ {
+ case 0:
+ vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
+ &numregs);
+ /* I'm assuming the VFP11 erratum can trigger with denorm
+ operands on either the FMAC or the DS pipeline. This might
+ lead to slightly overenthusiastic veneer insertion. */
+ if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
+ {
+ state = use_vector ? 1 : 2;
+ first_fmac = i;
+ veneer_of_insn = insn;
+ }
+ break;
+
+ case 1:
+ {
+ int other_regs[3], other_numregs;
+ vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
other_regs,
- &other_numregs);
- if (vpipe != VFP11_BAD
- && bfd_arm_vfp11_antidependency (writemask, regs,
+ &other_numregs);
+ if (vpipe != VFP11_BAD
+ && bfd_arm_vfp11_antidependency (writemask, regs,
numregs))
- state = 3;
- else
- state = 2;
- }
- break;
-
- case 2:
- {
- int other_regs[3], other_numregs;
- vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
+ state = 3;
+ else
+ state = 2;
+ }
+ break;
+
+ case 2:
+ {
+ int other_regs[3], other_numregs;
+ vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
other_regs,
- &other_numregs);
- if (vpipe != VFP11_BAD
- && bfd_arm_vfp11_antidependency (writemask, regs,
+ &other_numregs);
+ if (vpipe != VFP11_BAD
+ && bfd_arm_vfp11_antidependency (writemask, regs,
numregs))
- state = 3;
- else
- {
- state = 0;
- next_i = first_fmac + 4;
- }
- }
- break;
-
- case 3:
- abort (); /* Should be unreachable. */
- }
-
- if (state == 3)
- {
- elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
- bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
-
- elf32_arm_section_data (sec)->erratumcount += 1;
-
- newerr->u.b.vfp_insn = veneer_of_insn;
-
- switch (span_type)
- {
- case 'a':
- newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
- break;
-
- default:
- abort ();
- }
-
- record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
+ state = 3;
+ else
+ {
+ state = 0;
+ next_i = first_fmac + 4;
+ }
+ }
+ break;
+
+ case 3:
+ abort (); /* Should be unreachable. */
+ }
+
+ if (state == 3)
+ {
+ elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
+ bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
+
+ elf32_arm_section_data (sec)->erratumcount += 1;
+
+ newerr->u.b.vfp_insn = veneer_of_insn;
+
+ switch (span_type)
+ {
+ case 'a':
+ newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
+ break;
+
+ default:
+ abort ();
+ }
+
+ record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
first_fmac);
- newerr->vma = -1;
+ newerr->vma = -1;
- newerr->next = sec_data->erratumlist;
- sec_data->erratumlist = newerr;
+ newerr->next = sec_data->erratumlist;
+ sec_data->erratumlist = newerr;
- state = 0;
- }
+ state = 0;
+ }
- i = next_i;
- }
- }
+ i = next_i;
+ }
+ }
if (contents != NULL
- && elf_section_data (sec)->this_hdr.contents != contents)
- free (contents);
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ free (contents);
contents = NULL;
}
return;
tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
- (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
+ (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
for (sec = abfd->sections; sec != NULL; sec = sec->next)
{
elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
for (; errnode != NULL; errnode = errnode->next)
- {
- struct elf_link_hash_entry *myh;
- bfd_vma vma;
-
- switch (errnode->type)
- {
- case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
- case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
- /* Find veneer symbol. */
- sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
+ {
+ struct elf_link_hash_entry *myh;
+ bfd_vma vma;
+
+ switch (errnode->type)
+ {
+ case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
+ case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
+ /* Find veneer symbol. */
+ sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
errnode->u.b.veneer->u.v.id);
- myh = elf_link_hash_lookup
- (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
+ myh = elf_link_hash_lookup
+ (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
- if (myh == NULL)
- (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
- "`%s'"), abfd, tmp_name);
+ if (myh == NULL)
+ (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
+ "`%s'"), abfd, tmp_name);
- vma = myh->root.u.def.section->output_section->vma
- + myh->root.u.def.section->output_offset
- + myh->root.u.def.value;
+ vma = myh->root.u.def.section->output_section->vma
+ + myh->root.u.def.section->output_offset
+ + myh->root.u.def.value;
- errnode->u.b.veneer->vma = vma;
- break;
+ errnode->u.b.veneer->vma = vma;
+ break;
case VFP11_ERRATUM_ARM_VENEER:
- case VFP11_ERRATUM_THUMB_VENEER:
- /* Find return location. */
- sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
- errnode->u.v.id);
+ case VFP11_ERRATUM_THUMB_VENEER:
+ /* Find return location. */
+ sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
+ errnode->u.v.id);
- myh = elf_link_hash_lookup
- (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
+ myh = elf_link_hash_lookup
+ (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
- if (myh == NULL)
- (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
+ if (myh == NULL)
+ (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
"`%s'"), abfd, tmp_name);
- vma = myh->root.u.def.section->output_section->vma
- + myh->root.u.def.section->output_offset
- + myh->root.u.def.value;
+ vma = myh->root.u.def.section->output_section->vma
+ + myh->root.u.def.section->output_offset
+ + myh->root.u.def.value;
- errnode->u.v.branch->vma = vma;
- break;
+ errnode->u.v.branch->vma = vma;
+ break;
- default:
- abort ();
- }
- }
+ default:
+ abort ();
+ }
+ }
}
free (tmp_name);
struct bfd_link_info *link_info,
int target1_is_rel,
char * target2_type,
- int fix_v4bx,
+ int fix_v4bx,
int use_blx,
- bfd_arm_vfp11_fix vfp11_fix,
+ bfd_arm_vfp11_fix vfp11_fix,
int no_enum_warn, int no_wchar_warn,
- int pic_veneer, int fix_cortex_a8)
+ int pic_veneer, int fix_cortex_a8,
+ int fix_arm1176)
{
struct elf32_arm_link_hash_table *globals;
globals->vfp11_fix = vfp11_fix;
globals->pic_veneer = pic_veneer;
globals->fix_cortex_a8 = fix_cortex_a8;
+ globals->fix_arm1176 = fix_arm1176;
BFD_ASSERT (is_arm_elf (output_bfd));
elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
my_offset = myh->root.u.def.value;
- s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
- THUMB2ARM_GLUE_SECTION_NAME);
+ s = bfd_get_linker_section (globals->bfd_of_glue_owner,
+ THUMB2ARM_GLUE_SECTION_NAME);
BFD_ASSERT (s != NULL);
BFD_ASSERT (s->contents != NULL);
{
(*_bfd_error_handler)
(_("%B(%s): warning: interworking not enabled.\n"
- " first occurrence: %B: thumb call to arm"),
+ " first occurrence: %B: Thumb call to ARM"),
sym_sec->owner, input_bfd, name);
return FALSE;
BFD_ASSERT (globals != NULL);
BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
- s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
- ARM2THUMB_GLUE_SECTION_NAME);
+ s = bfd_get_linker_section (globals->bfd_of_glue_owner,
+ ARM2THUMB_GLUE_SECTION_NAME);
BFD_ASSERT (s != NULL);
BFD_ASSERT (s->contents != NULL);
BFD_ASSERT (s->output_section != NULL);
BFD_ASSERT (globals != NULL);
BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
- s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
- ARM2THUMB_GLUE_SECTION_NAME);
+ s = bfd_get_linker_section (globals->bfd_of_glue_owner,
+ ARM2THUMB_GLUE_SECTION_NAME);
BFD_ASSERT (s != NULL);
BFD_ASSERT (s->contents != NULL);
BFD_ASSERT (s->output_section != NULL);
BFD_ASSERT (globals != NULL);
BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
- s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
- ARM_BX_GLUE_SECTION_NAME);
+ s = bfd_get_linker_section (globals->bfd_of_glue_owner,
+ ARM_BX_GLUE_SECTION_NAME);
BFD_ASSERT (s != NULL);
BFD_ASSERT (s->contents != NULL);
BFD_ASSERT (s->output_section != NULL);
link_info);
}
-/* Some relocations map to different relocations depending on the
- target. Return the real relocation. */
+/* Reserve space for COUNT dynamic relocations in relocation selection
+ SRELOC. */
-static int
-arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
- int r_type)
+static void
+elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
+ bfd_size_type count)
{
- switch (r_type)
- {
- case R_ARM_TARGET1:
- if (globals->target1_is_rel)
- return R_ARM_REL32;
- else
- return R_ARM_ABS32;
-
- case R_ARM_TARGET2:
- return globals->target2_reloc;
+ struct elf32_arm_link_hash_table *htab;
- default:
- return r_type;
- }
+ htab = elf32_arm_hash_table (info);
+ BFD_ASSERT (htab->root.dynamic_sections_created);
+ if (sreloc == NULL)
+ abort ();
+ sreloc->size += RELOC_SIZE (htab) * count;
}
-/* Return the base VMA address which should be subtracted from real addresses
- when resolving @dtpoff relocation.
- This is PT_TLS segment p_vaddr. */
+/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
+ dynamic, the relocations should go in SRELOC, otherwise they should
+ go in the special .rel.iplt section. */
-static bfd_vma
-dtpoff_base (struct bfd_link_info *info)
+static void
+elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
+ bfd_size_type count)
{
- /* If tls_sec is NULL, we should have signalled an error already. */
- if (elf_hash_table (info)->tls_sec == NULL)
- return 0;
- return elf_hash_table (info)->tls_sec->vma;
+ struct elf32_arm_link_hash_table *htab;
+
+ htab = elf32_arm_hash_table (info);
+ if (!htab->root.dynamic_sections_created)
+ htab->root.irelplt->size += RELOC_SIZE (htab) * count;
+ else
+ {
+ BFD_ASSERT (sreloc != NULL);
+ sreloc->size += RELOC_SIZE (htab) * count;
+ }
}
-/* Return the relocation value for @tpoff relocation
- if STT_TLS virtual address is ADDRESS. */
+/* Add relocation REL to the end of relocation section SRELOC. */
-static bfd_vma
-tpoff (struct bfd_link_info *info, bfd_vma address)
+static void
+elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
+ asection *sreloc, Elf_Internal_Rela *rel)
{
- struct elf_link_hash_table *htab = elf_hash_table (info);
- bfd_vma base;
+ bfd_byte *loc;
+ struct elf32_arm_link_hash_table *htab;
- /* If tls_sec is NULL, we should have signalled an error already. */
- if (htab->tls_sec == NULL)
- return 0;
- base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
- return address - htab->tls_sec->vma + base;
+ htab = elf32_arm_hash_table (info);
+ if (!htab->root.dynamic_sections_created
+ && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
+ sreloc = htab->root.irelplt;
+ if (sreloc == NULL)
+ abort ();
+ loc = sreloc->contents;
+ loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
+ if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
+ abort ();
+ SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
}
-/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
- VALUE is the relocation value. */
+/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
+ IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
+ to .plt. */
-static bfd_reloc_status_type
-elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
+static void
+elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
+ bfd_boolean is_iplt_entry,
+ union gotplt_union *root_plt,
+ struct arm_plt_info *arm_plt)
{
- if (value > 0xfff)
- return bfd_reloc_overflow;
+ struct elf32_arm_link_hash_table *htab;
+ asection *splt;
+ asection *sgotplt;
- value |= bfd_get_32 (abfd, data) & 0xfffff000;
- bfd_put_32 (abfd, value, data);
- return bfd_reloc_ok;
-}
+ htab = elf32_arm_hash_table (info);
-/* For a given value of n, calculate the value of G_n as required to
- deal with group relocations. We return it in the form of an
- encoded constant-and-rotation, together with the final residual. If n is
- specified as less than zero, then final_residual is filled with the
- input value and no further action is performed. */
+ if (is_iplt_entry)
+ {
+ splt = htab->root.iplt;
+ sgotplt = htab->root.igotplt;
-static bfd_vma
-calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
-{
- int current_n;
- bfd_vma g_n;
- bfd_vma encoded_g_n = 0;
- bfd_vma residual = value; /* Also known as Y_n. */
+ /* NaCl uses a special first entry in .iplt too. */
+ if (htab->nacl_p && splt->size == 0)
+ splt->size += htab->plt_header_size;
- for (current_n = 0; current_n <= n; current_n++)
+ /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
+ elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
+ }
+ else
{
- int shift;
-
- /* Calculate which part of the value to mask. */
- if (residual == 0)
- shift = 0;
- else
- {
- int msb;
-
- /* Determine the most significant bit in the residual and
- align the resulting value to a 2-bit boundary. */
- for (msb = 30; msb >= 0; msb -= 2)
- if (residual & (3 << msb))
- break;
-
- /* The desired shift is now (msb - 6), or zero, whichever
- is the greater. */
- shift = msb - 6;
- if (shift < 0)
- shift = 0;
- }
+ splt = htab->root.splt;
+ sgotplt = htab->root.sgotplt;
- /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
- g_n = residual & (0xff << shift);
- encoded_g_n = (g_n >> shift)
- | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
+ /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
+ elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
- /* Calculate the residual for the next time around. */
- residual &= ~g_n;
+ /* If this is the first .plt entry, make room for the special
+ first entry. */
+ if (splt->size == 0)
+ splt->size += htab->plt_header_size;
}
- *final_residual = residual;
+ /* Allocate the PLT entry itself, including any leading Thumb stub. */
+ if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
+ splt->size += PLT_THUMB_STUB_SIZE;
+ root_plt->offset = splt->size;
+ splt->size += htab->plt_entry_size;
- return encoded_g_n;
+ if (!htab->symbian_p)
+ {
+ /* We also need to make an entry in the .got.plt section, which
+ will be placed in the .got section by the linker script. */
+ arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
+ sgotplt->size += 4;
+ }
}
-/* Given an ARM instruction, determine whether it is an ADD or a SUB.
- Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
+static bfd_vma
+arm_movw_immediate (bfd_vma value)
+{
+ return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
+}
-static int
-identify_add_or_sub (bfd_vma insn)
+static bfd_vma
+arm_movt_immediate (bfd_vma value)
{
- int opcode = insn & 0x1e00000;
+ return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
+}
- if (opcode == 1 << 23) /* ADD */
- return 1;
+/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
+ the entry lives in .iplt and resolves to (*SYM_VALUE)().
+ Otherwise, DYNINDX is the index of the symbol in the dynamic
+ symbol table and SYM_VALUE is undefined.
- if (opcode == 1 << 22) /* SUB */
- return -1;
+ ROOT_PLT points to the offset of the PLT entry from the start of its
+ section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
+ bookkeeping information. */
- return 0;
-}
+static void
+elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
+ union gotplt_union *root_plt,
+ struct arm_plt_info *arm_plt,
+ int dynindx, bfd_vma sym_value)
+{
+ struct elf32_arm_link_hash_table *htab;
+ asection *sgot;
+ asection *splt;
+ asection *srel;
+ bfd_byte *loc;
+ bfd_vma plt_index;
+ Elf_Internal_Rela rel;
+ bfd_vma plt_header_size;
+ bfd_vma got_header_size;
-/* Perform a relocation as part of a final link. */
+ htab = elf32_arm_hash_table (info);
-static bfd_reloc_status_type
+ /* Pick the appropriate sections and sizes. */
+ if (dynindx == -1)
+ {
+ splt = htab->root.iplt;
+ sgot = htab->root.igotplt;
+ srel = htab->root.irelplt;
+
+ /* There are no reserved entries in .igot.plt, and no special
+ first entry in .iplt. */
+ got_header_size = 0;
+ plt_header_size = 0;
+ }
+ else
+ {
+ splt = htab->root.splt;
+ sgot = htab->root.sgotplt;
+ srel = htab->root.srelplt;
+
+ got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
+ plt_header_size = htab->plt_header_size;
+ }
+ BFD_ASSERT (splt != NULL && srel != NULL);
+
+ /* Fill in the entry in the procedure linkage table. */
+ if (htab->symbian_p)
+ {
+ BFD_ASSERT (dynindx >= 0);
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_symbian_plt_entry[0],
+ splt->contents + root_plt->offset);
+ bfd_put_32 (output_bfd,
+ elf32_arm_symbian_plt_entry[1],
+ splt->contents + root_plt->offset + 4);
+
+ /* Fill in the entry in the .rel.plt section. */
+ rel.r_offset = (splt->output_section->vma
+ + splt->output_offset
+ + root_plt->offset + 4);
+ rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
+
+ /* Get the index in the procedure linkage table which
+ corresponds to this symbol. This is the index of this symbol
+ in all the symbols for which we are making plt entries. The
+ first entry in the procedure linkage table is reserved. */
+ plt_index = ((root_plt->offset - plt_header_size)
+ / htab->plt_entry_size);
+ }
+ else
+ {
+ bfd_vma got_offset, got_address, plt_address;
+ bfd_vma got_displacement, initial_got_entry;
+ bfd_byte * ptr;
+
+ BFD_ASSERT (sgot != NULL);
+
+ /* Get the offset into the .(i)got.plt table of the entry that
+ corresponds to this function. */
+ got_offset = (arm_plt->got_offset & -2);
+
+ /* Get the index in the procedure linkage table which
+ corresponds to this symbol. This is the index of this symbol
+ in all the symbols for which we are making plt entries.
+ After the reserved .got.plt entries, all symbols appear in
+ the same order as in .plt. */
+ plt_index = (got_offset - got_header_size) / 4;
+
+ /* Calculate the address of the GOT entry. */
+ got_address = (sgot->output_section->vma
+ + sgot->output_offset
+ + got_offset);
+
+ /* ...and the address of the PLT entry. */
+ plt_address = (splt->output_section->vma
+ + splt->output_offset
+ + root_plt->offset);
+
+ ptr = splt->contents + root_plt->offset;
+ if (htab->vxworks_p && info->shared)
+ {
+ unsigned int i;
+ bfd_vma val;
+
+ for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
+ {
+ val = elf32_arm_vxworks_shared_plt_entry[i];
+ if (i == 2)
+ val |= got_address - sgot->output_section->vma;
+ if (i == 5)
+ val |= plt_index * RELOC_SIZE (htab);
+ if (i == 2 || i == 5)
+ bfd_put_32 (output_bfd, val, ptr);
+ else
+ put_arm_insn (htab, output_bfd, val, ptr);
+ }
+ }
+ else if (htab->vxworks_p)
+ {
+ unsigned int i;
+ bfd_vma val;
+
+ for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
+ {
+ val = elf32_arm_vxworks_exec_plt_entry[i];
+ if (i == 2)
+ val |= got_address;
+ if (i == 4)
+ val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
+ if (i == 5)
+ val |= plt_index * RELOC_SIZE (htab);
+ if (i == 2 || i == 5)
+ bfd_put_32 (output_bfd, val, ptr);
+ else
+ put_arm_insn (htab, output_bfd, val, ptr);
+ }
+
+ loc = (htab->srelplt2->contents
+ + (plt_index * 2 + 1) * RELOC_SIZE (htab));
+
+ /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
+ referencing the GOT for this PLT entry. */
+ rel.r_offset = plt_address + 8;
+ rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
+ rel.r_addend = got_offset;
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
+ loc += RELOC_SIZE (htab);
+
+ /* Create the R_ARM_ABS32 relocation referencing the
+ beginning of the PLT for this GOT entry. */
+ rel.r_offset = got_address;
+ rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
+ rel.r_addend = 0;
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
+ }
+ else if (htab->nacl_p)
+ {
+ /* Calculate the displacement between the PLT slot and the
+ common tail that's part of the special initial PLT slot. */
+ int32_t tail_displacement
+ = ((splt->output_section->vma + splt->output_offset
+ + ARM_NACL_PLT_TAIL_OFFSET)
+ - (plt_address + htab->plt_entry_size + 4));
+ BFD_ASSERT ((tail_displacement & 3) == 0);
+ tail_displacement >>= 2;
+
+ BFD_ASSERT ((tail_displacement & 0xff000000) == 0
+ || (-tail_displacement & 0xff000000) == 0);
+
+ /* Calculate the displacement between the PLT slot and the entry
+ in the GOT. The offset accounts for the value produced by
+ adding to pc in the penultimate instruction of the PLT stub. */
+ got_displacement = (got_address
+ - (plt_address + htab->plt_entry_size));
+
+ /* NaCl does not support interworking at all. */
+ BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
+
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_nacl_plt_entry[0]
+ | arm_movw_immediate (got_displacement),
+ ptr + 0);
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_nacl_plt_entry[1]
+ | arm_movt_immediate (got_displacement),
+ ptr + 4);
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_nacl_plt_entry[2],
+ ptr + 8);
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_nacl_plt_entry[3]
+ | (tail_displacement & 0x00ffffff),
+ ptr + 12);
+ }
+ else
+ {
+ /* Calculate the displacement between the PLT slot and the
+ entry in the GOT. The eight-byte offset accounts for the
+ value produced by adding to pc in the first instruction
+ of the PLT stub. */
+ got_displacement = got_address - (plt_address + 8);
+
+ BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
+
+ if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
+ {
+ put_thumb_insn (htab, output_bfd,
+ elf32_arm_plt_thumb_stub[0], ptr - 4);
+ put_thumb_insn (htab, output_bfd,
+ elf32_arm_plt_thumb_stub[1], ptr - 2);
+ }
+
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_plt_entry[0]
+ | ((got_displacement & 0x0ff00000) >> 20),
+ ptr + 0);
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_plt_entry[1]
+ | ((got_displacement & 0x000ff000) >> 12),
+ ptr+ 4);
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_plt_entry[2]
+ | (got_displacement & 0x00000fff),
+ ptr + 8);
+#ifdef FOUR_WORD_PLT
+ bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
+#endif
+ }
+
+ /* Fill in the entry in the .rel(a).(i)plt section. */
+ rel.r_offset = got_address;
+ rel.r_addend = 0;
+ if (dynindx == -1)
+ {
+ /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
+ The dynamic linker or static executable then calls SYM_VALUE
+ to determine the correct run-time value of the .igot.plt entry. */
+ rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
+ initial_got_entry = sym_value;
+ }
+ else
+ {
+ rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
+ initial_got_entry = (splt->output_section->vma
+ + splt->output_offset);
+ }
+
+ /* Fill in the entry in the global offset table. */
+ bfd_put_32 (output_bfd, initial_got_entry,
+ sgot->contents + got_offset);
+ }
+
+ if (dynindx == -1)
+ elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
+ else
+ {
+ loc = srel->contents + plt_index * RELOC_SIZE (htab);
+ SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
+ }
+}
+
+/* Some relocations map to different relocations depending on the
+ target. Return the real relocation. */
+
+static int
+arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
+ int r_type)
+{
+ switch (r_type)
+ {
+ case R_ARM_TARGET1:
+ if (globals->target1_is_rel)
+ return R_ARM_REL32;
+ else
+ return R_ARM_ABS32;
+
+ case R_ARM_TARGET2:
+ return globals->target2_reloc;
+
+ default:
+ return r_type;
+ }
+}
+
+/* Return the base VMA address which should be subtracted from real addresses
+ when resolving @dtpoff relocation.
+ This is PT_TLS segment p_vaddr. */
+
+static bfd_vma
+dtpoff_base (struct bfd_link_info *info)
+{
+ /* If tls_sec is NULL, we should have signalled an error already. */
+ if (elf_hash_table (info)->tls_sec == NULL)
+ return 0;
+ return elf_hash_table (info)->tls_sec->vma;
+}
+
+/* Return the relocation value for @tpoff relocation
+ if STT_TLS virtual address is ADDRESS. */
+
+static bfd_vma
+tpoff (struct bfd_link_info *info, bfd_vma address)
+{
+ struct elf_link_hash_table *htab = elf_hash_table (info);
+ bfd_vma base;
+
+ /* If tls_sec is NULL, we should have signalled an error already. */
+ if (htab->tls_sec == NULL)
+ return 0;
+ base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
+ return address - htab->tls_sec->vma + base;
+}
+
+/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
+ VALUE is the relocation value. */
+
+static bfd_reloc_status_type
+elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
+{
+ if (value > 0xfff)
+ return bfd_reloc_overflow;
+
+ value |= bfd_get_32 (abfd, data) & 0xfffff000;
+ bfd_put_32 (abfd, value, data);
+ return bfd_reloc_ok;
+}
+
+/* Handle TLS relaxations. Relaxing is possible for symbols that use
+ R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
+ R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
+
+ Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
+ is to then call final_link_relocate. Return other values in the
+ case of error.
+
+ FIXME:When --emit-relocs is in effect, we'll emit relocs describing
+ the pre-relaxed code. It would be nice if the relocs were updated
+ to match the optimization. */
+
+static bfd_reloc_status_type
+elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
+ bfd *input_bfd, asection *input_sec, bfd_byte *contents,
+ Elf_Internal_Rela *rel, unsigned long is_local)
+{
+ unsigned long insn;
+
+ switch (ELF32_R_TYPE (rel->r_info))
+ {
+ default:
+ return bfd_reloc_notsupported;
+
+ case R_ARM_TLS_GOTDESC:
+ if (is_local)
+ insn = 0;
+ else
+ {
+ insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ if (insn & 1)
+ insn -= 5; /* THUMB */
+ else
+ insn -= 8; /* ARM */
+ }
+ bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
+ return bfd_reloc_continue;
+
+ case R_ARM_THM_TLS_DESCSEQ:
+ /* Thumb insn. */
+ insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
+ if ((insn & 0xff78) == 0x4478) /* add rx, pc */
+ {
+ if (is_local)
+ /* nop */
+ bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
+ }
+ else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
+ {
+ if (is_local)
+ /* nop */
+ bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
+ else
+ /* ldr rx,[ry] */
+ bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
+ }
+ else if ((insn & 0xff87) == 0x4780) /* blx rx */
+ {
+ if (is_local)
+ /* nop */
+ bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
+ else
+ /* mov r0, rx */
+ bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
+ contents + rel->r_offset);
+ }
+ else
+ {
+ if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
+ /* It's a 32 bit instruction, fetch the rest of it for
+ error generation. */
+ insn = (insn << 16)
+ | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
+ (*_bfd_error_handler)
+ (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
+ input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
+ return bfd_reloc_notsupported;
+ }
+ break;
+
+ case R_ARM_TLS_DESCSEQ:
+ /* arm insn. */
+ insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
+ {
+ if (is_local)
+ /* mov rx, ry */
+ bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
+ contents + rel->r_offset);
+ }
+ else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
+ {
+ if (is_local)
+ /* nop */
+ bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
+ else
+ /* ldr rx,[ry] */
+ bfd_put_32 (input_bfd, insn & 0xfffff000,
+ contents + rel->r_offset);
+ }
+ else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
+ {
+ if (is_local)
+ /* nop */
+ bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
+ else
+ /* mov r0, rx */
+ bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
+ contents + rel->r_offset);
+ }
+ else
+ {
+ (*_bfd_error_handler)
+ (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
+ input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
+ return bfd_reloc_notsupported;
+ }
+ break;
+
+ case R_ARM_TLS_CALL:
+ /* GD->IE relaxation, turn the instruction into 'nop' or
+ 'ldr r0, [pc,r0]' */
+ insn = is_local ? 0xe1a00000 : 0xe79f0000;
+ bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
+ break;
+
+ case R_ARM_THM_TLS_CALL:
+ /* GD->IE relaxation */
+ if (!is_local)
+ /* add r0,pc; ldr r0, [r0] */
+ insn = 0x44786800;
+ else if (arch_has_thumb2_nop (globals))
+ /* nop.w */
+ insn = 0xf3af8000;
+ else
+ /* nop; nop */
+ insn = 0xbf00bf00;
+
+ bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
+ bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
+ break;
+ }
+ return bfd_reloc_ok;
+}
+
+/* For a given value of n, calculate the value of G_n as required to
+ deal with group relocations. We return it in the form of an
+ encoded constant-and-rotation, together with the final residual. If n is
+ specified as less than zero, then final_residual is filled with the
+ input value and no further action is performed. */
+
+static bfd_vma
+calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
+{
+ int current_n;
+ bfd_vma g_n;
+ bfd_vma encoded_g_n = 0;
+ bfd_vma residual = value; /* Also known as Y_n. */
+
+ for (current_n = 0; current_n <= n; current_n++)
+ {
+ int shift;
+
+ /* Calculate which part of the value to mask. */
+ if (residual == 0)
+ shift = 0;
+ else
+ {
+ int msb;
+
+ /* Determine the most significant bit in the residual and
+ align the resulting value to a 2-bit boundary. */
+ for (msb = 30; msb >= 0; msb -= 2)
+ if (residual & (3 << msb))
+ break;
+
+ /* The desired shift is now (msb - 6), or zero, whichever
+ is the greater. */
+ shift = msb - 6;
+ if (shift < 0)
+ shift = 0;
+ }
+
+ /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
+ g_n = residual & (0xff << shift);
+ encoded_g_n = (g_n >> shift)
+ | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
+
+ /* Calculate the residual for the next time around. */
+ residual &= ~g_n;
+ }
+
+ *final_residual = residual;
+
+ return encoded_g_n;
+}
+
+/* Given an ARM instruction, determine whether it is an ADD or a SUB.
+ Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
+
+static int
+identify_add_or_sub (bfd_vma insn)
+{
+ int opcode = insn & 0x1e00000;
+
+ if (opcode == 1 << 23) /* ADD */
+ return 1;
+
+ if (opcode == 1 << 22) /* SUB */
+ return -1;
+
+ return 0;
+}
+
+/* Perform a relocation as part of a final link. */
+
+static bfd_reloc_status_type
elf32_arm_final_link_relocate (reloc_howto_type * howto,
bfd * input_bfd,
bfd * output_bfd,
struct bfd_link_info * info,
asection * sym_sec,
const char * sym_name,
- int sym_flags,
+ unsigned char st_type,
+ enum arm_st_branch_type branch_type,
struct elf_link_hash_entry * h,
bfd_boolean * unresolved_reloc_p,
char ** error_message)
unsigned long r_symndx;
bfd_byte * hit_data = contents + rel->r_offset;
bfd_vma * local_got_offsets;
- asection * sgot = NULL;
- asection * splt = NULL;
+ bfd_vma * local_tlsdesc_gotents;
+ asection * sgot;
+ asection * splt;
asection * sreloc = NULL;
asection * srelgot;
bfd_vma addend;
bfd_signed_vma signed_addend;
+ unsigned char dynreloc_st_type;
+ bfd_vma dynreloc_value;
struct elf32_arm_link_hash_table * globals;
+ struct elf32_arm_link_hash_entry *eh;
+ union gotplt_union *root_plt;
+ struct arm_plt_info *arm_plt;
+ bfd_vma plt_offset;
+ bfd_vma gotplt_offset;
+ bfd_boolean has_iplt_entry;
globals = elf32_arm_hash_table (info);
if (globals == NULL)
/* Some relocation types map to different relocations depending on the
target. We pick the right one here. */
r_type = arm_real_reloc_type (globals, r_type);
+
+ /* It is possible to have linker relaxations on some TLS access
+ models. Update our information here. */
+ r_type = elf32_arm_tls_transition (info, r_type, h);
+
if (r_type != howto->type)
howto = elf32_arm_howto_from_type (r_type);
if (bfd_get_start_address (output_bfd) != 0)
elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
+ eh = (struct elf32_arm_link_hash_entry *) h;
sgot = globals->root.sgot;
- splt = globals->root.splt;
- srelgot = globals->root.srelgot;
local_got_offsets = elf_local_got_offsets (input_bfd);
+ local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
+
+ if (globals->root.dynamic_sections_created)
+ srelgot = globals->root.srelgot;
+ else
+ srelgot = NULL;
+
r_symndx = ELF32_R_SYM (rel->r_info);
if (globals->use_rel)
else
addend = signed_addend = rel->r_addend;
+ /* Record the symbol information that should be used in dynamic
+ relocations. */
+ dynreloc_st_type = st_type;
+ dynreloc_value = value;
+ if (branch_type == ST_BRANCH_TO_THUMB)
+ dynreloc_value |= 1;
+
+ /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
+ VALUE appropriately for relocations that we resolve at link time. */
+ has_iplt_entry = FALSE;
+ if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
+ && root_plt->offset != (bfd_vma) -1)
+ {
+ plt_offset = root_plt->offset;
+ gotplt_offset = arm_plt->got_offset;
+
+ if (h == NULL || eh->is_iplt)
+ {
+ has_iplt_entry = TRUE;
+ splt = globals->root.iplt;
+
+ /* Populate .iplt entries here, because not all of them will
+ be seen by finish_dynamic_symbol. The lower bit is set if
+ we have already populated the entry. */
+ if (plt_offset & 1)
+ plt_offset--;
+ else
+ {
+ elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
+ -1, dynreloc_value);
+ root_plt->offset |= 1;
+ }
+
+ /* Static relocations always resolve to the .iplt entry. */
+ st_type = STT_FUNC;
+ value = (splt->output_section->vma
+ + splt->output_offset
+ + plt_offset);
+ branch_type = ST_BRANCH_TO_ARM;
+
+ /* If there are non-call relocations that resolve to the .iplt
+ entry, then all dynamic ones must too. */
+ if (arm_plt->noncall_refcount != 0)
+ {
+ dynreloc_st_type = st_type;
+ dynreloc_value = value;
+ }
+ }
+ else
+ /* We populate the .plt entry in finish_dynamic_symbol. */
+ splt = globals->root.splt;
+ }
+ else
+ {
+ splt = NULL;
+ plt_offset = (bfd_vma) -1;
+ gotplt_offset = (bfd_vma) -1;
+ }
+
switch (r_type)
{
case R_ARM_NONE:
branches in this object should go to it, except if the PLT is too
far away, in which case a long branch stub should be inserted. */
if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
- && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
+ && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
&& r_type != R_ARM_CALL
&& r_type != R_ARM_JUMP24
&& r_type != R_ARM_PLT32)
- && h != NULL
- && splt != NULL
- && h->plt.offset != (bfd_vma) -1)
+ && plt_offset != (bfd_vma) -1)
{
- /* If we've created a .plt section, and assigned a PLT entry to
- this function, it should not be known to bind locally. If
- it were, we would have cleared the PLT entry. */
- BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
+ /* If we've created a .plt section, and assigned a PLT entry
+ to this function, it must either be a STT_GNU_IFUNC reference
+ or not be known to bind locally. In other cases, we should
+ have cleared the PLT entry by now. */
+ BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
value = (splt->output_section->vma
+ splt->output_offset
- + h->plt.offset);
+ + plt_offset);
*unresolved_reloc_p = FALSE;
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
".tls_vars") == 0)
&& ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
|| !SYMBOL_CALLS_LOCAL (info, h))
- && (!strstr (input_section->name, STUB_SUFFIX))
+ && !(input_bfd == globals->stub_bfd
+ && strstr (input_section->name, STUB_SUFFIX))
&& (h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak)
&& r_type != R_ARM_PLT32)
{
Elf_Internal_Rela outrel;
- bfd_byte *loc;
bfd_boolean skip, relocate;
*unresolved_reloc_p = FALSE;
- if (sreloc == NULL)
+ if (sreloc == NULL && globals->root.dynamic_sections_created)
{
sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
! globals->use_rel);
int symbol;
/* This symbol is local, or marked to become local. */
- if (sym_flags == STT_ARM_TFUNC)
- value |= 1;
+ BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
if (globals->symbian_p)
{
asection *osec;
relocate the text and data segments independently,
so the symbol does not matter. */
symbol = 0;
- outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
+ if (dynreloc_st_type == STT_GNU_IFUNC)
+ /* We have an STT_GNU_IFUNC symbol that doesn't resolve
+ to the .iplt entry. Instead, every non-call reference
+ must use an R_ARM_IRELATIVE relocation to obtain the
+ correct run-time address. */
+ outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
+ else
+ outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
if (globals->use_rel)
relocate = TRUE;
else
- outrel.r_addend += value;
+ outrel.r_addend += dynreloc_value;
}
- loc = sreloc->contents;
- loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
- SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
+ elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
/* If this reloc is against an external symbol, we do not want to
fiddle with the addend. Otherwise, we need to include the symbol
return bfd_reloc_ok;
return _bfd_final_link_relocate (howto, input_bfd, input_section,
- contents, rel->r_offset, value,
- (bfd_vma) 0);
+ contents, rel->r_offset,
+ dynreloc_value, (bfd_vma) 0);
}
else switch (r_type)
{
/* Check for Arm calling Arm function. */
/* FIXME: Should we translate the instruction into a BL
instruction instead ? */
- if (sym_flags != STT_ARM_TFUNC)
+ if (branch_type != ST_BRANCH_TO_THUMB)
(*_bfd_error_handler)
(_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
input_bfd,
else if (r_type == R_ARM_PC24)
{
/* Check for Arm calling Thumb function. */
- if (sym_flags == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
{
if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
output_bfd, input_section,
hash = (struct elf32_arm_link_hash_entry *) h;
stub_type = arm_type_of_stub (info, input_section, rel,
- &sym_flags, hash,
- value, sym_sec,
+ st_type, &branch_type,
+ hash, value, sym_sec,
input_bfd, sym_name);
if (stub_type != arm_stub_none)
{
/* The target is out of reach, so redirect the
branch to the local stub for this function. */
-
stub_entry = elf32_arm_get_stub_entry (input_section,
sym_sec, h,
rel, globals,
stub_type);
- if (stub_entry != NULL)
- value = (stub_entry->stub_offset
- + stub_entry->stub_sec->output_offset
- + stub_entry->stub_sec->output_section->vma);
+ {
+ if (stub_entry != NULL)
+ value = (stub_entry->stub_offset
+ + stub_entry->stub_sec->output_offset
+ + stub_entry->stub_sec->output_section->vma);
+
+ if (plt_offset != (bfd_vma) -1)
+ *unresolved_reloc_p = FALSE;
+ }
}
else
{
/* If the call goes through a PLT entry, make sure to
check distance to the right destination address. */
- if (h != NULL
- && splt != NULL
- && h->plt.offset != (bfd_vma) -1)
+ if (plt_offset != (bfd_vma) -1)
{
value = (splt->output_section->vma
+ splt->output_offset
- + h->plt.offset);
+ + plt_offset);
*unresolved_reloc_p = FALSE;
/* The PLT entry is in ARM mode, regardless of the
target function. */
- sym_flags = STT_FUNC;
+ branch_type = ST_BRANCH_TO_ARM;
}
}
}
The jump to the next instruction is optimized as a NOP depending
on the architecture. */
if (h ? (h->root.type == bfd_link_hash_undefweak
- && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
+ && plt_offset == (bfd_vma) -1)
: r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
{
value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
if (r_type == R_ARM_CALL)
{
/* Set the H bit in the BLX instruction. */
- if (sym_flags == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
{
if (addend)
value |= (1 << 24);
/* Select the correct instruction (BL or BLX). */
/* Only if we are not handling a BL to a stub. In this
case, mode switching is performed by the stub. */
- if (sym_flags == STT_ARM_TFUNC && !stub_entry)
+ if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
value |= (1 << 28);
- else
+ else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
{
value &= ~(bfd_vma)(1 << 28);
value |= (1 << 24);
case R_ARM_ABS32:
value += addend;
- if (sym_flags == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
value |= 1;
break;
case R_ARM_REL32:
value += addend;
- if (sym_flags == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
value |= 1;
value -= (input_section->output_section->vma
+ input_section->output_offset + rel->r_offset);
}
value &= 0x7fffffff;
value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
- if (sym_flags == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
value |= 1;
break;
}
bfd_signed_vma relocation;
insn = (bfd_get_16 (input_bfd, hit_data) << 16)
- | bfd_get_16 (input_bfd, hit_data + 2);
+ | bfd_get_16 (input_bfd, hit_data + 2);
- if (globals->use_rel)
- {
- signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
- | ((insn & (1 << 26)) >> 15);
- if (insn & 0xf00000)
- signed_addend = -signed_addend;
- }
+ if (globals->use_rel)
+ {
+ signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
+ | ((insn & (1 << 26)) >> 15);
+ if (insn & 0xf00000)
+ signed_addend = -signed_addend;
+ }
relocation = value + signed_addend;
- relocation -= (input_section->output_section->vma
- + input_section->output_offset
- + rel->r_offset);
+ relocation -= Pa (input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_offset);
- value = abs (relocation);
+ value = abs (relocation);
- if (value >= 0x1000)
- return bfd_reloc_overflow;
+ if (value >= 0x1000)
+ return bfd_reloc_overflow;
insn = (insn & 0xfb0f8f00) | (value & 0xff)
- | ((value & 0x700) << 4)
- | ((value & 0x800) << 15);
- if (relocation < 0)
- insn |= 0xa00000;
+ | ((value & 0x700) << 4)
+ | ((value & 0x800) << 15);
+ if (relocation < 0)
+ insn |= 0xa00000;
bfd_put_16 (input_bfd, insn >> 16, hit_data);
bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
- return bfd_reloc_ok;
+ return bfd_reloc_ok;
}
case R_ARM_THM_PC8:
insn = bfd_get_16 (input_bfd, hit_data);
- if (globals->use_rel)
- addend = (insn & 0x00ff) << 2;
+ if (globals->use_rel)
+ addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
relocation = value + addend;
- relocation -= (input_section->output_section->vma
- + input_section->output_offset
- + rel->r_offset);
+ relocation -= Pa (input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_offset);
- value = abs (relocation);
+ value = abs (relocation);
/* We do not check for overflow of this reloc. Although strictly
speaking this is incorrect, it appears to be necessary in order
bfd_put_16 (input_bfd, insn, hit_data);
- return bfd_reloc_ok;
+ return bfd_reloc_ok;
}
case R_ARM_THM_PC12:
bfd_signed_vma relocation;
insn = (bfd_get_16 (input_bfd, hit_data) << 16)
- | bfd_get_16 (input_bfd, hit_data + 2);
+ | bfd_get_16 (input_bfd, hit_data + 2);
- if (globals->use_rel)
- {
- signed_addend = insn & 0xfff;
- if (!(insn & (1 << 23)))
- signed_addend = -signed_addend;
- }
+ if (globals->use_rel)
+ {
+ signed_addend = insn & 0xfff;
+ if (!(insn & (1 << 23)))
+ signed_addend = -signed_addend;
+ }
relocation = value + signed_addend;
- relocation -= (input_section->output_section->vma
- + input_section->output_offset
- + rel->r_offset);
+ relocation -= Pa (input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_offset);
- value = abs (relocation);
+ value = abs (relocation);
- if (value >= 0x1000)
- return bfd_reloc_overflow;
+ if (value >= 0x1000)
+ return bfd_reloc_overflow;
insn = (insn & 0xff7ff000) | value;
- if (relocation >= 0)
- insn |= (1 << 23);
+ if (relocation >= 0)
+ insn |= (1 << 23);
bfd_put_16 (input_bfd, insn >> 16, hit_data);
bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
- return bfd_reloc_ok;
+ return bfd_reloc_ok;
}
case R_ARM_THM_XPC22:
/* Thumb BL (branch long instruction). */
{
bfd_vma relocation;
- bfd_vma reloc_sign;
+ bfd_vma reloc_sign;
bfd_boolean overflow = FALSE;
bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
The jump to the next instruction is optimized as a NOP.W for
Thumb-2 enabled architectures. */
if (h && h->root.type == bfd_link_hash_undefweak
- && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
+ && plt_offset == (bfd_vma) -1)
{
if (arch_has_thumb2_nop (globals))
{
}
/* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
- with Thumb-1) involving the J1 and J2 bits. */
+ with Thumb-1) involving the J1 and J2 bits. */
if (globals->use_rel)
{
- bfd_vma s = (upper_insn & (1 << 10)) >> 10;
- bfd_vma upper = upper_insn & 0x3ff;
- bfd_vma lower = lower_insn & 0x7ff;
+ bfd_vma s = (upper_insn & (1 << 10)) >> 10;
+ bfd_vma upper = upper_insn & 0x3ff;
+ bfd_vma lower = lower_insn & 0x7ff;
bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
- bfd_vma i1 = j1 ^ s ? 0 : 1;
- bfd_vma i2 = j2 ^ s ? 0 : 1;
+ bfd_vma i1 = j1 ^ s ? 0 : 1;
+ bfd_vma i2 = j2 ^ s ? 0 : 1;
- addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
- /* Sign extend. */
- addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
+ addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
+ /* Sign extend. */
+ addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
signed_addend = addend;
}
/* Check for Thumb to Thumb call. */
/* FIXME: Should we translate the instruction into a BL
instruction instead ? */
- if (sym_flags == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
(*_bfd_error_handler)
(_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
input_bfd,
If it is a call relative to a section name, then it is not a
function call at all, but rather a long jump. Calls through
the PLT do not require stubs. */
- if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
- && (h == NULL || splt == NULL
- || h->plt.offset == (bfd_vma) -1))
+ if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
{
if (globals->use_blx && r_type == R_ARM_THM_CALL)
{
return bfd_reloc_dangerous;
}
}
- else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
+ else if (branch_type == ST_BRANCH_TO_THUMB
+ && globals->use_blx
&& r_type == R_ARM_THM_CALL)
{
/* Make sure this is a BL. */
hash = (struct elf32_arm_link_hash_entry *) h;
stub_type = arm_type_of_stub (info, input_section, rel,
- &sym_flags, hash, value, sym_sec,
+ st_type, &branch_type,
+ hash, value, sym_sec,
input_bfd, sym_name);
if (stub_type != arm_stub_none)
rel, globals,
stub_type);
if (stub_entry != NULL)
- value = (stub_entry->stub_offset
- + stub_entry->stub_sec->output_offset
- + stub_entry->stub_sec->output_section->vma);
+ {
+ value = (stub_entry->stub_offset
+ + stub_entry->stub_sec->output_offset
+ + stub_entry->stub_sec->output_section->vma);
+
+ if (plt_offset != (bfd_vma) -1)
+ *unresolved_reloc_p = FALSE;
+ }
/* If this call becomes a call to Arm, force BLX. */
if (globals->use_blx && (r_type == R_ARM_THM_CALL))
{
if ((stub_entry
&& !arm_stub_is_thumb (stub_entry->stub_type))
- || (sym_flags != STT_ARM_TFUNC))
+ || branch_type != ST_BRANCH_TO_THUMB)
lower_insn = (lower_insn & ~0x1000) | 0x0800;
}
}
}
/* Handle calls via the PLT. */
- if (stub_type == arm_stub_none
- && h != NULL
- && splt != NULL
- && h->plt.offset != (bfd_vma) -1)
+ if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
{
value = (splt->output_section->vma
+ splt->output_offset
- + h->plt.offset);
+ + plt_offset);
if (globals->use_blx && r_type == R_ARM_THM_CALL)
{
the BL to a BLX instruction to call the ARM-mode
PLT entry. */
lower_insn = (lower_insn & ~0x1000) | 0x0800;
- sym_flags = STT_FUNC;
+ branch_type = ST_BRANCH_TO_ARM;
}
else
{
/* Target the Thumb stub before the ARM PLT entry. */
value -= PLT_THUMB_STUB_SIZE;
- sym_flags = STT_ARM_TFUNC;
+ branch_type = ST_BRANCH_TO_THUMB;
}
*unresolved_reloc_p = FALSE;
}
/* Put RELOCATION back into the insn. Assumes two's complement.
We use the Thumb-2 encoding, which is safe even if dealing with
a Thumb-1 instruction by virtue of our overflow check above. */
- reloc_sign = (signed_check < 0) ? 1 : 0;
+ reloc_sign = (signed_check < 0) ? 1 : 0;
upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
- | ((relocation >> 12) & 0x3ff)
- | (reloc_sign << 10);
+ | ((relocation >> 12) & 0x3ff)
+ | (reloc_sign << 10);
lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
- | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
- | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
- | ((relocation >> 1) & 0x7ff);
+ | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
+ | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
+ | ((relocation >> 1) & 0x7ff);
/* Put the relocated value back in the object file: */
bfd_put_16 (input_bfd, upper_insn, hit_data);
}
/* Handle calls via the PLT. */
- if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
+ if (plt_offset != (bfd_vma) -1)
{
value = (splt->output_section->vma
+ splt->output_offset
- + h->plt.offset);
+ + plt_offset);
/* Target the Thumb stub before the ARM PLT entry. */
value -= PLT_THUMB_STUB_SIZE;
*unresolved_reloc_p = FALSE;
/* ??? Should handle interworking? GCC might someday try to
use this for tail calls. */
- relocation = value + signed_addend;
+ relocation = value + signed_addend;
relocation -= (input_section->output_section->vma
+ input_section->output_offset
+ rel->r_offset);
case R_ARM_GOTOFF32:
/* Relocation is relative to the start of the
- global offset table. */
+ global offset table. */
BFD_ASSERT (sgot != NULL);
if (sgot == NULL)
- return bfd_reloc_notsupported;
+ return bfd_reloc_notsupported;
/* If we are addressing a Thumb function, we need to adjust the
address by one, so that attempts to call the function pointer will
correctly interpret it as Thumb code. */
- if (sym_flags == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
value += 1;
/* Note that sgot->output_offset is not involved in this
- calculation. We always want the start of .got. If we
- define _GLOBAL_OFFSET_TABLE in a different way, as is
- permitted by the ABI, we might have to change this
- calculation. */
+ calculation. We always want the start of .got. If we
+ define _GLOBAL_OFFSET_TABLE in a different way, as is
+ permitted by the ABI, we might have to change this
+ calculation. */
value -= sgot->output_section->vma;
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
BFD_ASSERT (sgot != NULL);
if (sgot == NULL)
- return bfd_reloc_notsupported;
+ return bfd_reloc_notsupported;
*unresolved_reloc_p = FALSE;
value = sgot->output_section->vma;
case R_ARM_GOT32:
case R_ARM_GOT_PREL:
/* Relocation is to the entry for this symbol in the
- global offset table. */
+ global offset table. */
if (sgot == NULL)
return bfd_reloc_notsupported;
- if (h != NULL)
+ if (dynreloc_st_type == STT_GNU_IFUNC
+ && plt_offset != (bfd_vma) -1
+ && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
+ {
+ /* We have a relocation against a locally-binding STT_GNU_IFUNC
+ symbol, and the relocation resolves directly to the runtime
+ target rather than to the .iplt entry. This means that any
+ .got entry would be the same value as the .igot.plt entry,
+ so there's no point creating both. */
+ sgot = globals->root.igotplt;
+ value = sgot->output_offset + gotplt_offset;
+ }
+ else if (h != NULL)
{
bfd_vma off;
- bfd_boolean dyn;
off = h->got.offset;
BFD_ASSERT (off != (bfd_vma) -1);
- dyn = globals->root.dynamic_sections_created;
-
- if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
- || (info->shared
- && SYMBOL_REFERENCES_LOCAL (info, h))
- || (ELF_ST_VISIBILITY (h->other)
- && h->root.type == bfd_link_hash_undefweak))
+ if ((off & 1) != 0)
{
- /* This is actually a static link, or it is a -Bsymbolic link
- and the symbol is defined locally. We must initialize this
- entry in the global offset table. Since the offset must
- always be a multiple of 4, we use the least significant bit
- to record whether we have initialized it already.
-
- When doing a dynamic link, we create a .rel(a).got relocation
- entry to initialize the value. This is done in the
- finish_dynamic_symbol routine. */
- if ((off & 1) != 0)
- off &= ~1;
+ /* We have already processsed one GOT relocation against
+ this symbol. */
+ off &= ~1;
+ if (globals->root.dynamic_sections_created
+ && !SYMBOL_REFERENCES_LOCAL (info, h))
+ *unresolved_reloc_p = FALSE;
+ }
+ else
+ {
+ Elf_Internal_Rela outrel;
+
+ if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
+ {
+ /* If the symbol doesn't resolve locally in a static
+ object, we have an undefined reference. If the
+ symbol doesn't resolve locally in a dynamic object,
+ it should be resolved by the dynamic linker. */
+ if (globals->root.dynamic_sections_created)
+ {
+ outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
+ *unresolved_reloc_p = FALSE;
+ }
+ else
+ outrel.r_info = 0;
+ outrel.r_addend = 0;
+ }
else
{
- /* If we are addressing a Thumb function, we need to
- adjust the address by one, so that attempts to
- call the function pointer will correctly
- interpret it as Thumb code. */
- if (sym_flags == STT_ARM_TFUNC)
- value |= 1;
-
- bfd_put_32 (output_bfd, value, sgot->contents + off);
- h->got.offset |= 1;
+ if (dynreloc_st_type == STT_GNU_IFUNC)
+ outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
+ else if (info->shared &&
+ (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
+ || h->root.type != bfd_link_hash_undefweak))
+ outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
+ else
+ outrel.r_info = 0;
+ outrel.r_addend = dynreloc_value;
}
- }
- else
- *unresolved_reloc_p = FALSE;
+ /* The GOT entry is initialized to zero by default.
+ See if we should install a different value. */
+ if (outrel.r_addend != 0
+ && (outrel.r_info == 0 || globals->use_rel))
+ {
+ bfd_put_32 (output_bfd, outrel.r_addend,
+ sgot->contents + off);
+ outrel.r_addend = 0;
+ }
+
+ if (outrel.r_info != 0)
+ {
+ outrel.r_offset = (sgot->output_section->vma
+ + sgot->output_offset
+ + off);
+ elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
+ }
+ h->got.offset |= 1;
+ }
value = sgot->output_offset + off;
}
else
off &= ~1;
else
{
- /* If we are addressing a Thumb function, we need to
- adjust the address by one, so that attempts to
- call the function pointer will correctly
- interpret it as Thumb code. */
- if (sym_flags == STT_ARM_TFUNC)
- value |= 1;
-
if (globals->use_rel)
- bfd_put_32 (output_bfd, value, sgot->contents + off);
+ bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
- if (info->shared)
+ if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
{
Elf_Internal_Rela outrel;
- bfd_byte *loc;
- BFD_ASSERT (srelgot != NULL);
-
- outrel.r_addend = addend + value;
+ outrel.r_addend = addend + dynreloc_value;
outrel.r_offset = (sgot->output_section->vma
+ sgot->output_offset
+ off);
- outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
- loc = srelgot->contents;
- loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
- SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
+ if (dynreloc_st_type == STT_GNU_IFUNC)
+ outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
+ else
+ outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
+ elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
}
local_got_offsets[r_symndx] |= 1;
if (info->shared)
{
Elf_Internal_Rela outrel;
- bfd_byte *loc;
if (srelgot == NULL)
abort ();
bfd_put_32 (output_bfd, outrel.r_addend,
sgot->contents + off);
- loc = srelgot->contents;
- loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
- SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
+ elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
}
else
bfd_put_32 (output_bfd, 1, sgot->contents + off);
rel->r_addend);
}
+ case R_ARM_TLS_CALL:
+ case R_ARM_THM_TLS_CALL:
case R_ARM_TLS_GD32:
case R_ARM_TLS_IE32:
+ case R_ARM_TLS_GOTDESC:
+ case R_ARM_TLS_DESCSEQ:
+ case R_ARM_THM_TLS_DESCSEQ:
{
- bfd_vma off;
- int indx;
+ bfd_vma off, offplt;
+ int indx = 0;
char tls_type;
- if (sgot == NULL)
- abort ();
+ BFD_ASSERT (sgot != NULL);
- indx = 0;
if (h != NULL)
{
bfd_boolean dyn;
indx = h->dynindx;
}
off = h->got.offset;
+ offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
}
else
{
- if (local_got_offsets == NULL)
- abort ();
+ BFD_ASSERT (local_got_offsets != NULL);
off = local_got_offsets[r_symndx];
+ offplt = local_tlsdesc_gotents[r_symndx];
tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
}
- if (tls_type == GOT_UNKNOWN)
- abort ();
+ /* Linker relaxations happens from one of the
+ R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
+ if (ELF32_R_TYPE(rel->r_info) != r_type)
+ tls_type = GOT_TLS_IE;
+
+ BFD_ASSERT (tls_type != GOT_UNKNOWN);
if ((off & 1) != 0)
off &= ~1;
{
bfd_boolean need_relocs = FALSE;
Elf_Internal_Rela outrel;
- bfd_byte *loc = NULL;
int cur_off = off;
/* The GOT entries have not been initialized yet. Do it
|| h->root.type != bfd_link_hash_undefweak))
{
need_relocs = TRUE;
- if (srelgot == NULL)
- abort ();
- loc = srelgot->contents;
- loc += srelgot->reloc_count * RELOC_SIZE (globals);
+ BFD_ASSERT (srelgot != NULL);
}
+ if (tls_type & GOT_TLS_GDESC)
+ {
+ bfd_byte *loc;
+
+ /* We should have relaxed, unless this is an undefined
+ weak symbol. */
+ BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
+ || info->shared);
+ BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
+ <= globals->root.sgotplt->size);
+
+ outrel.r_addend = 0;
+ outrel.r_offset = (globals->root.sgotplt->output_section->vma
+ + globals->root.sgotplt->output_offset
+ + offplt
+ + globals->sgotplt_jump_table_size);
+
+ outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
+ sreloc = globals->root.srelplt;
+ loc = sreloc->contents;
+ loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
+ BFD_ASSERT (loc + RELOC_SIZE (globals)
+ <= sreloc->contents + sreloc->size);
+
+ SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
+
+ /* For globals, the first word in the relocation gets
+ the relocation index and the top bit set, or zero,
+ if we're binding now. For locals, it gets the
+ symbol's offset in the tls section. */
+ bfd_put_32 (output_bfd,
+ !h ? value - elf_hash_table (info)->tls_sec->vma
+ : info->flags & DF_BIND_NOW ? 0
+ : 0x80000000 | ELF32_R_SYM (outrel.r_info),
+ globals->root.sgotplt->contents + offplt
+ + globals->sgotplt_jump_table_size);
+
+ /* Second word in the relocation is always zero. */
+ bfd_put_32 (output_bfd, 0,
+ globals->root.sgotplt->contents + offplt
+ + globals->sgotplt_jump_table_size + 4);
+ }
if (tls_type & GOT_TLS_GD)
{
if (need_relocs)
bfd_put_32 (output_bfd, outrel.r_addend,
sgot->contents + cur_off);
- SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
- srelgot->reloc_count++;
- loc += RELOC_SIZE (globals);
+ elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
if (indx == 0)
bfd_put_32 (output_bfd, value - dtpoff_base (info),
bfd_put_32 (output_bfd, outrel.r_addend,
sgot->contents + cur_off + 4);
-
- SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
- srelgot->reloc_count++;
- loc += RELOC_SIZE (globals);
+ elf32_arm_add_dynreloc (output_bfd, info,
+ srelgot, &outrel);
}
}
else
bfd_put_32 (output_bfd, outrel.r_addend,
sgot->contents + cur_off);
- SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
- srelgot->reloc_count++;
- loc += RELOC_SIZE (globals);
+ elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
}
else
bfd_put_32 (output_bfd, tpoff (info, value),
local_got_offsets[r_symndx] |= 1;
}
- if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
- off += 8;
- value = sgot->output_section->vma + sgot->output_offset + off
- - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
+ if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
+ off += 8;
+ else if (tls_type & GOT_TLS_GDESC)
+ off = offplt;
+
+ if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
+ || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
+ {
+ bfd_signed_vma offset;
+ /* TLS stubs are arm mode. The original symbol is a
+ data object, so branch_type is bogus. */
+ branch_type = ST_BRANCH_TO_ARM;
+ enum elf32_arm_stub_type stub_type
+ = arm_type_of_stub (info, input_section, rel,
+ st_type, &branch_type,
+ (struct elf32_arm_link_hash_entry *)h,
+ globals->tls_trampoline, globals->root.splt,
+ input_bfd, sym_name);
+
+ if (stub_type != arm_stub_none)
+ {
+ struct elf32_arm_stub_hash_entry *stub_entry
+ = elf32_arm_get_stub_entry
+ (input_section, globals->root.splt, 0, rel,
+ globals, stub_type);
+ offset = (stub_entry->stub_offset
+ + stub_entry->stub_sec->output_offset
+ + stub_entry->stub_sec->output_section->vma);
+ }
+ else
+ offset = (globals->root.splt->output_section->vma
+ + globals->root.splt->output_offset
+ + globals->tls_trampoline);
+
+ if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
+ {
+ unsigned long inst;
+
+ offset -= (input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_offset + 8);
+
+ inst = offset >> 2;
+ inst &= 0x00ffffff;
+ value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
+ }
+ else
+ {
+ /* Thumb blx encodes the offset in a complicated
+ fashion. */
+ unsigned upper_insn, lower_insn;
+ unsigned neg;
+
+ offset -= (input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_offset + 4);
+
+ if (stub_type != arm_stub_none
+ && arm_stub_is_thumb (stub_type))
+ {
+ lower_insn = 0xd000;
+ }
+ else
+ {
+ lower_insn = 0xc000;
+ /* Round up the offset to a word boundary */
+ offset = (offset + 2) & ~2;
+ }
+
+ neg = offset < 0;
+ upper_insn = (0xf000
+ | ((offset >> 12) & 0x3ff)
+ | (neg << 10));
+ lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
+ | (((!((offset >> 22) & 1)) ^ neg) << 11)
+ | ((offset >> 1) & 0x7ff);
+ bfd_put_16 (input_bfd, upper_insn, hit_data);
+ bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
+ return bfd_reloc_ok;
+ }
+ }
+ /* These relocations needs special care, as besides the fact
+ they point somewhere in .gotplt, the addend must be
+ adjusted accordingly depending on the type of instruction
+ we refer to */
+ else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
+ {
+ unsigned long data, insn;
+ unsigned thumb;
+
+ data = bfd_get_32 (input_bfd, hit_data);
+ thumb = data & 1;
+ data &= ~1u;
+
+ if (thumb)
+ {
+ insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
+ if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
+ insn = (insn << 16)
+ | bfd_get_16 (input_bfd,
+ contents + rel->r_offset - data + 2);
+ if ((insn & 0xf800c000) == 0xf000c000)
+ /* bl/blx */
+ value = -6;
+ else if ((insn & 0xffffff00) == 0x4400)
+ /* add */
+ value = -5;
+ else
+ {
+ (*_bfd_error_handler)
+ (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
+ input_bfd, input_section,
+ (unsigned long)rel->r_offset, insn);
+ return bfd_reloc_notsupported;
+ }
+ }
+ else
+ {
+ insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
+
+ switch (insn >> 24)
+ {
+ case 0xeb: /* bl */
+ case 0xfa: /* blx */
+ value = -4;
+ break;
+
+ case 0xe0: /* add */
+ value = -8;
+ break;
+
+ default:
+ (*_bfd_error_handler)
+ (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
+ input_bfd, input_section,
+ (unsigned long)rel->r_offset, insn);
+ return bfd_reloc_notsupported;
+ }
+ }
+
+ value += ((globals->root.sgotplt->output_section->vma
+ + globals->root.sgotplt->output_offset + off)
+ - (input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_offset)
+ + globals->sgotplt_jump_table_size);
+ }
+ else
+ value = ((globals->root.sgot->output_section->vma
+ + globals->root.sgot->output_offset + off)
+ - (input_section->output_section->vma
+ + input_section->output_offset + rel->r_offset));
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
}
case R_ARM_TLS_LE32:
- if (info->shared)
+ if (info->shared && !info->pie)
{
(*_bfd_error_handler)
(_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
input_bfd, input_section,
(long) rel->r_offset, howto->name);
- return (bfd_reloc_status_type) FALSE;
+ return bfd_reloc_notsupported;
}
else
value = tpoff (info, value);
+ input_section->output_offset + rel->r_offset);
if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
- return bfd_reloc_overflow;
+ return bfd_reloc_overflow;
- if (sym_flags == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
value |= 1;
if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
- || r_type == R_ARM_MOVT_BREL)
+ || r_type == R_ARM_MOVT_BREL)
value >>= 16;
insn &= 0xfff0f000;
+ input_section->output_offset + rel->r_offset);
if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
- return bfd_reloc_overflow;
+ return bfd_reloc_overflow;
- if (sym_flags == STT_ARM_TFUNC)
+ if (branch_type == ST_BRANCH_TO_THUMB)
value |= 1;
if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
- || r_type == R_ARM_THM_MOVT_BREL)
+ || r_type == R_ARM_THM_MOVT_BREL)
value >>= 16;
insn &= 0xfbf08f00;
case R_ARM_ALU_SB_G2:
{
bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
- bfd_vma pc = input_section->output_section->vma
+ bfd_vma pc = input_section->output_section->vma
+ input_section->output_offset + rel->r_offset;
- /* sb should be the origin of the *segment* containing the symbol.
- It is not clear how to obtain this OS-dependent value, so we
- make an arbitrary choice of zero. */
- bfd_vma sb = 0;
- bfd_vma residual;
- bfd_vma g_n;
+ /* sb should be the origin of the *segment* containing the symbol.
+ It is not clear how to obtain this OS-dependent value, so we
+ make an arbitrary choice of zero. */
+ bfd_vma sb = 0;
+ bfd_vma residual;
+ bfd_vma g_n;
bfd_signed_vma signed_value;
- int group = 0;
-
- /* Determine which group of bits to select. */
- switch (r_type)
- {
- case R_ARM_ALU_PC_G0_NC:
- case R_ARM_ALU_PC_G0:
- case R_ARM_ALU_SB_G0_NC:
- case R_ARM_ALU_SB_G0:
- group = 0;
- break;
-
- case R_ARM_ALU_PC_G1_NC:
- case R_ARM_ALU_PC_G1:
- case R_ARM_ALU_SB_G1_NC:
- case R_ARM_ALU_SB_G1:
- group = 1;
- break;
-
- case R_ARM_ALU_PC_G2:
- case R_ARM_ALU_SB_G2:
- group = 2;
- break;
-
- default:
- abort ();
- }
-
- /* If REL, extract the addend from the insn. If RELA, it will
- have already been fetched for us. */
+ int group = 0;
+
+ /* Determine which group of bits to select. */
+ switch (r_type)
+ {
+ case R_ARM_ALU_PC_G0_NC:
+ case R_ARM_ALU_PC_G0:
+ case R_ARM_ALU_SB_G0_NC:
+ case R_ARM_ALU_SB_G0:
+ group = 0;
+ break;
+
+ case R_ARM_ALU_PC_G1_NC:
+ case R_ARM_ALU_PC_G1:
+ case R_ARM_ALU_SB_G1_NC:
+ case R_ARM_ALU_SB_G1:
+ group = 1;
+ break;
+
+ case R_ARM_ALU_PC_G2:
+ case R_ARM_ALU_SB_G2:
+ group = 2;
+ break;
+
+ default:
+ abort ();
+ }
+
+ /* If REL, extract the addend from the insn. If RELA, it will
+ have already been fetched for us. */
if (globals->use_rel)
- {
- int negative;
- bfd_vma constant = insn & 0xff;
- bfd_vma rotation = (insn & 0xf00) >> 8;
-
- if (rotation == 0)
- signed_addend = constant;
- else
- {
- /* Compensate for the fact that in the instruction, the
- rotation is stored in multiples of 2 bits. */
- rotation *= 2;
-
- /* Rotate "constant" right by "rotation" bits. */
- signed_addend = (constant >> rotation) |
- (constant << (8 * sizeof (bfd_vma) - rotation));
- }
-
- /* Determine if the instruction is an ADD or a SUB.
- (For REL, this determines the sign of the addend.) */
- negative = identify_add_or_sub (insn);
- if (negative == 0)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
- input_bfd, input_section,
- (long) rel->r_offset, howto->name);
- return bfd_reloc_overflow;
- }
-
- signed_addend *= negative;
- }
+ {
+ int negative;
+ bfd_vma constant = insn & 0xff;
+ bfd_vma rotation = (insn & 0xf00) >> 8;
+
+ if (rotation == 0)
+ signed_addend = constant;
+ else
+ {
+ /* Compensate for the fact that in the instruction, the
+ rotation is stored in multiples of 2 bits. */
+ rotation *= 2;
+
+ /* Rotate "constant" right by "rotation" bits. */
+ signed_addend = (constant >> rotation) |
+ (constant << (8 * sizeof (bfd_vma) - rotation));
+ }
+
+ /* Determine if the instruction is an ADD or a SUB.
+ (For REL, this determines the sign of the addend.) */
+ negative = identify_add_or_sub (insn);
+ if (negative == 0)
+ {
+ (*_bfd_error_handler)
+ (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
+ input_bfd, input_section,
+ (long) rel->r_offset, howto->name);
+ return bfd_reloc_overflow;
+ }
+
+ signed_addend *= negative;
+ }
/* Compute the value (X) to go in the place. */
- if (r_type == R_ARM_ALU_PC_G0_NC
- || r_type == R_ARM_ALU_PC_G1_NC
- || r_type == R_ARM_ALU_PC_G0
- || r_type == R_ARM_ALU_PC_G1
- || r_type == R_ARM_ALU_PC_G2)
- /* PC relative. */
- signed_value = value - pc + signed_addend;
- else
- /* Section base relative. */
- signed_value = value - sb + signed_addend;
-
- /* If the target symbol is a Thumb function, then set the
- Thumb bit in the address. */
- if (sym_flags == STT_ARM_TFUNC)
+ if (r_type == R_ARM_ALU_PC_G0_NC
+ || r_type == R_ARM_ALU_PC_G1_NC
+ || r_type == R_ARM_ALU_PC_G0
+ || r_type == R_ARM_ALU_PC_G1
+ || r_type == R_ARM_ALU_PC_G2)
+ /* PC relative. */
+ signed_value = value - pc + signed_addend;
+ else
+ /* Section base relative. */
+ signed_value = value - sb + signed_addend;
+
+ /* If the target symbol is a Thumb function, then set the
+ Thumb bit in the address. */
+ if (branch_type == ST_BRANCH_TO_THUMB)
signed_value |= 1;
- /* Calculate the value of the relevant G_n, in encoded
- constant-with-rotation format. */
- g_n = calculate_group_reloc_mask (abs (signed_value), group,
- &residual);
-
- /* Check for overflow if required. */
- if ((r_type == R_ARM_ALU_PC_G0
- || r_type == R_ARM_ALU_PC_G1
- || r_type == R_ARM_ALU_PC_G2
- || r_type == R_ARM_ALU_SB_G0
- || r_type == R_ARM_ALU_SB_G1
- || r_type == R_ARM_ALU_SB_G2) && residual != 0)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, abs (signed_value), howto->name);
- return bfd_reloc_overflow;
- }
-
- /* Mask out the value and the ADD/SUB part of the opcode; take care
- not to destroy the S bit. */
- insn &= 0xff1ff000;
-
- /* Set the opcode according to whether the value to go in the
- place is negative. */
- if (signed_value < 0)
- insn |= 1 << 22;
- else
- insn |= 1 << 23;
-
- /* Encode the offset. */
- insn |= g_n;
+ /* Calculate the value of the relevant G_n, in encoded
+ constant-with-rotation format. */
+ g_n = calculate_group_reloc_mask (abs (signed_value), group,
+ &residual);
+
+ /* Check for overflow if required. */
+ if ((r_type == R_ARM_ALU_PC_G0
+ || r_type == R_ARM_ALU_PC_G1
+ || r_type == R_ARM_ALU_PC_G2
+ || r_type == R_ARM_ALU_SB_G0
+ || r_type == R_ARM_ALU_SB_G1
+ || r_type == R_ARM_ALU_SB_G2) && residual != 0)
+ {
+ (*_bfd_error_handler)
+ (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
+ input_bfd, input_section,
+ (long) rel->r_offset, abs (signed_value), howto->name);
+ return bfd_reloc_overflow;
+ }
+
+ /* Mask out the value and the ADD/SUB part of the opcode; take care
+ not to destroy the S bit. */
+ insn &= 0xff1ff000;
+
+ /* Set the opcode according to whether the value to go in the
+ place is negative. */
+ if (signed_value < 0)
+ insn |= 1 << 22;
+ else
+ insn |= 1 << 23;
+
+ /* Encode the offset. */
+ insn |= g_n;
bfd_put_32 (input_bfd, insn, hit_data);
}
case R_ARM_LDR_SB_G2:
{
bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
- bfd_vma pc = input_section->output_section->vma
+ bfd_vma pc = input_section->output_section->vma
+ input_section->output_offset + rel->r_offset;
- bfd_vma sb = 0; /* See note above. */
- bfd_vma residual;
+ bfd_vma sb = 0; /* See note above. */
+ bfd_vma residual;
bfd_signed_vma signed_value;
- int group = 0;
-
- /* Determine which groups of bits to calculate. */
- switch (r_type)
- {
- case R_ARM_LDR_PC_G0:
- case R_ARM_LDR_SB_G0:
- group = 0;
- break;
-
- case R_ARM_LDR_PC_G1:
- case R_ARM_LDR_SB_G1:
- group = 1;
- break;
-
- case R_ARM_LDR_PC_G2:
- case R_ARM_LDR_SB_G2:
- group = 2;
- break;
-
- default:
- abort ();
- }
-
- /* If REL, extract the addend from the insn. If RELA, it will
- have already been fetched for us. */
+ int group = 0;
+
+ /* Determine which groups of bits to calculate. */
+ switch (r_type)
+ {
+ case R_ARM_LDR_PC_G0:
+ case R_ARM_LDR_SB_G0:
+ group = 0;
+ break;
+
+ case R_ARM_LDR_PC_G1:
+ case R_ARM_LDR_SB_G1:
+ group = 1;
+ break;
+
+ case R_ARM_LDR_PC_G2:
+ case R_ARM_LDR_SB_G2:
+ group = 2;
+ break;
+
+ default:
+ abort ();
+ }
+
+ /* If REL, extract the addend from the insn. If RELA, it will
+ have already been fetched for us. */
if (globals->use_rel)
- {
- int negative = (insn & (1 << 23)) ? 1 : -1;
- signed_addend = negative * (insn & 0xfff);
- }
+ {
+ int negative = (insn & (1 << 23)) ? 1 : -1;
+ signed_addend = negative * (insn & 0xfff);
+ }
/* Compute the value (X) to go in the place. */
- if (r_type == R_ARM_LDR_PC_G0
- || r_type == R_ARM_LDR_PC_G1
- || r_type == R_ARM_LDR_PC_G2)
- /* PC relative. */
- signed_value = value - pc + signed_addend;
- else
- /* Section base relative. */
- signed_value = value - sb + signed_addend;
-
- /* Calculate the value of the relevant G_{n-1} to obtain
- the residual at that stage. */
- calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
-
- /* Check for overflow. */
- if (residual >= 0x1000)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, abs (signed_value), howto->name);
- return bfd_reloc_overflow;
- }
-
- /* Mask out the value and U bit. */
- insn &= 0xff7ff000;
-
- /* Set the U bit if the value to go in the place is non-negative. */
- if (signed_value >= 0)
- insn |= 1 << 23;
-
- /* Encode the offset. */
- insn |= residual;
+ if (r_type == R_ARM_LDR_PC_G0
+ || r_type == R_ARM_LDR_PC_G1
+ || r_type == R_ARM_LDR_PC_G2)
+ /* PC relative. */
+ signed_value = value - pc + signed_addend;
+ else
+ /* Section base relative. */
+ signed_value = value - sb + signed_addend;
+
+ /* Calculate the value of the relevant G_{n-1} to obtain
+ the residual at that stage. */
+ calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
+
+ /* Check for overflow. */
+ if (residual >= 0x1000)
+ {
+ (*_bfd_error_handler)
+ (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
+ input_bfd, input_section,
+ (long) rel->r_offset, abs (signed_value), howto->name);
+ return bfd_reloc_overflow;
+ }
+
+ /* Mask out the value and U bit. */
+ insn &= 0xff7ff000;
+
+ /* Set the U bit if the value to go in the place is non-negative. */
+ if (signed_value >= 0)
+ insn |= 1 << 23;
+
+ /* Encode the offset. */
+ insn |= residual;
bfd_put_32 (input_bfd, insn, hit_data);
}
case R_ARM_LDRS_SB_G2:
{
bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
- bfd_vma pc = input_section->output_section->vma
+ bfd_vma pc = input_section->output_section->vma
+ input_section->output_offset + rel->r_offset;
- bfd_vma sb = 0; /* See note above. */
- bfd_vma residual;
+ bfd_vma sb = 0; /* See note above. */
+ bfd_vma residual;
bfd_signed_vma signed_value;
- int group = 0;
-
- /* Determine which groups of bits to calculate. */
- switch (r_type)
- {
- case R_ARM_LDRS_PC_G0:
- case R_ARM_LDRS_SB_G0:
- group = 0;
- break;
-
- case R_ARM_LDRS_PC_G1:
- case R_ARM_LDRS_SB_G1:
- group = 1;
- break;
-
- case R_ARM_LDRS_PC_G2:
- case R_ARM_LDRS_SB_G2:
- group = 2;
- break;
-
- default:
- abort ();
- }
-
- /* If REL, extract the addend from the insn. If RELA, it will
- have already been fetched for us. */
+ int group = 0;
+
+ /* Determine which groups of bits to calculate. */
+ switch (r_type)
+ {
+ case R_ARM_LDRS_PC_G0:
+ case R_ARM_LDRS_SB_G0:
+ group = 0;
+ break;
+
+ case R_ARM_LDRS_PC_G1:
+ case R_ARM_LDRS_SB_G1:
+ group = 1;
+ break;
+
+ case R_ARM_LDRS_PC_G2:
+ case R_ARM_LDRS_SB_G2:
+ group = 2;
+ break;
+
+ default:
+ abort ();
+ }
+
+ /* If REL, extract the addend from the insn. If RELA, it will
+ have already been fetched for us. */
if (globals->use_rel)
- {
- int negative = (insn & (1 << 23)) ? 1 : -1;
- signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
- }
+ {
+ int negative = (insn & (1 << 23)) ? 1 : -1;
+ signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
+ }
/* Compute the value (X) to go in the place. */
- if (r_type == R_ARM_LDRS_PC_G0
- || r_type == R_ARM_LDRS_PC_G1
- || r_type == R_ARM_LDRS_PC_G2)
- /* PC relative. */
- signed_value = value - pc + signed_addend;
- else
- /* Section base relative. */
- signed_value = value - sb + signed_addend;
-
- /* Calculate the value of the relevant G_{n-1} to obtain
- the residual at that stage. */
- calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
-
- /* Check for overflow. */
- if (residual >= 0x100)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, abs (signed_value), howto->name);
- return bfd_reloc_overflow;
- }
-
- /* Mask out the value and U bit. */
- insn &= 0xff7ff0f0;
-
- /* Set the U bit if the value to go in the place is non-negative. */
- if (signed_value >= 0)
- insn |= 1 << 23;
-
- /* Encode the offset. */
- insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
+ if (r_type == R_ARM_LDRS_PC_G0
+ || r_type == R_ARM_LDRS_PC_G1
+ || r_type == R_ARM_LDRS_PC_G2)
+ /* PC relative. */
+ signed_value = value - pc + signed_addend;
+ else
+ /* Section base relative. */
+ signed_value = value - sb + signed_addend;
+
+ /* Calculate the value of the relevant G_{n-1} to obtain
+ the residual at that stage. */
+ calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
+
+ /* Check for overflow. */
+ if (residual >= 0x100)
+ {
+ (*_bfd_error_handler)
+ (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
+ input_bfd, input_section,
+ (long) rel->r_offset, abs (signed_value), howto->name);
+ return bfd_reloc_overflow;
+ }
+
+ /* Mask out the value and U bit. */
+ insn &= 0xff7ff0f0;
+
+ /* Set the U bit if the value to go in the place is non-negative. */
+ if (signed_value >= 0)
+ insn |= 1 << 23;
+
+ /* Encode the offset. */
+ insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
bfd_put_32 (input_bfd, insn, hit_data);
}
case R_ARM_LDC_SB_G2:
{
bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
- bfd_vma pc = input_section->output_section->vma
+ bfd_vma pc = input_section->output_section->vma
+ input_section->output_offset + rel->r_offset;
- bfd_vma sb = 0; /* See note above. */
- bfd_vma residual;
+ bfd_vma sb = 0; /* See note above. */
+ bfd_vma residual;
bfd_signed_vma signed_value;
- int group = 0;
-
- /* Determine which groups of bits to calculate. */
- switch (r_type)
- {
- case R_ARM_LDC_PC_G0:
- case R_ARM_LDC_SB_G0:
- group = 0;
- break;
-
- case R_ARM_LDC_PC_G1:
- case R_ARM_LDC_SB_G1:
- group = 1;
- break;
-
- case R_ARM_LDC_PC_G2:
- case R_ARM_LDC_SB_G2:
- group = 2;
- break;
-
- default:
- abort ();
- }
-
- /* If REL, extract the addend from the insn. If RELA, it will
- have already been fetched for us. */
+ int group = 0;
+
+ /* Determine which groups of bits to calculate. */
+ switch (r_type)
+ {
+ case R_ARM_LDC_PC_G0:
+ case R_ARM_LDC_SB_G0:
+ group = 0;
+ break;
+
+ case R_ARM_LDC_PC_G1:
+ case R_ARM_LDC_SB_G1:
+ group = 1;
+ break;
+
+ case R_ARM_LDC_PC_G2:
+ case R_ARM_LDC_SB_G2:
+ group = 2;
+ break;
+
+ default:
+ abort ();
+ }
+
+ /* If REL, extract the addend from the insn. If RELA, it will
+ have already been fetched for us. */
if (globals->use_rel)
- {
- int negative = (insn & (1 << 23)) ? 1 : -1;
- signed_addend = negative * ((insn & 0xff) << 2);
- }
+ {
+ int negative = (insn & (1 << 23)) ? 1 : -1;
+ signed_addend = negative * ((insn & 0xff) << 2);
+ }
/* Compute the value (X) to go in the place. */
- if (r_type == R_ARM_LDC_PC_G0
- || r_type == R_ARM_LDC_PC_G1
- || r_type == R_ARM_LDC_PC_G2)
- /* PC relative. */
- signed_value = value - pc + signed_addend;
- else
- /* Section base relative. */
- signed_value = value - sb + signed_addend;
-
- /* Calculate the value of the relevant G_{n-1} to obtain
- the residual at that stage. */
- calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
-
- /* Check for overflow. (The absolute value to go in the place must be
- divisible by four and, after having been divided by four, must
- fit in eight bits.) */
- if ((residual & 0x3) != 0 || residual >= 0x400)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, abs (signed_value), howto->name);
- return bfd_reloc_overflow;
- }
-
- /* Mask out the value and U bit. */
- insn &= 0xff7fff00;
-
- /* Set the U bit if the value to go in the place is non-negative. */
- if (signed_value >= 0)
- insn |= 1 << 23;
-
- /* Encode the offset. */
- insn |= residual >> 2;
+ if (r_type == R_ARM_LDC_PC_G0
+ || r_type == R_ARM_LDC_PC_G1
+ || r_type == R_ARM_LDC_PC_G2)
+ /* PC relative. */
+ signed_value = value - pc + signed_addend;
+ else
+ /* Section base relative. */
+ signed_value = value - sb + signed_addend;
+
+ /* Calculate the value of the relevant G_{n-1} to obtain
+ the residual at that stage. */
+ calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
+
+ /* Check for overflow. (The absolute value to go in the place must be
+ divisible by four and, after having been divided by four, must
+ fit in eight bits.) */
+ if ((residual & 0x3) != 0 || residual >= 0x400)
+ {
+ (*_bfd_error_handler)
+ (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
+ input_bfd, input_section,
+ (long) rel->r_offset, abs (signed_value), howto->name);
+ return bfd_reloc_overflow;
+ }
+
+ /* Mask out the value and U bit. */
+ insn &= 0xff7fff00;
+
+ /* Set the U bit if the value to go in the place is non-negative. */
+ if (signed_value >= 0)
+ insn |= 1 << 23;
+
+ /* Encode the offset. */
+ insn |= residual >> 2;
bfd_put_32 (input_bfd, insn, hit_data);
}
|| (R_TYPE) == R_ARM_TLS_DTPMOD32 \
|| (R_TYPE) == R_ARM_TLS_TPOFF32 \
|| (R_TYPE) == R_ARM_TLS_LE32 \
- || (R_TYPE) == R_ARM_TLS_IE32)
+ || (R_TYPE) == R_ARM_TLS_IE32 \
+ || IS_ARM_TLS_GNU_RELOC (R_TYPE))
+
+/* Specific set of relocations for the gnu tls dialect. */
+#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
+ ((R_TYPE) == R_ARM_TLS_GOTDESC \
+ || (R_TYPE) == R_ARM_TLS_CALL \
+ || (R_TYPE) == R_ARM_THM_TLS_CALL \
+ || (R_TYPE) == R_ARM_TLS_DESCSEQ \
+ || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
/* Relocate an ARM ELF section. */
r_type = arm_real_reloc_type (globals, r_type);
if ( r_type == R_ARM_GNU_VTENTRY
- || r_type == R_ARM_GNU_VTINHERIT)
- continue;
+ || r_type == R_ARM_GNU_VTINHERIT)
+ continue;
bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
howto = bfd_reloc.howto;
rel->r_offset, TRUE))
return FALSE;
}
-
+
if (globals->use_rel)
{
relocation = (sec->output_section->vma
- relocation;
addend += msec->output_section->vma + msec->output_offset;
- /* Cases here must match those in the preceeding
+ /* Cases here must match those in the preceding
switch statement. */
switch (r_type)
{
sym_type = h->type;
}
- if (sec != NULL && elf_discarded_section (sec))
+ if (sec != NULL && discarded_section (sec))
RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
- rel, relend, howto, contents);
+ rel, 1, relend, howto, 0, contents);
if (info->relocatable)
{
name);
}
- r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
- input_section, contents, rel,
- relocation, info, sec, name,
- (h ? ELF_ST_TYPE (h->type) :
- ELF_ST_TYPE (sym->st_info)), h,
- &unresolved_reloc, &error_message);
+ /* We call elf32_arm_final_link_relocate unless we're completely
+ done, i.e., the relaxation produced the final output we want,
+ and we won't let anybody mess with it. Also, we have to do
+ addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
+ both in relaxed and non-relaxed cases */
+ if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
+ || (IS_ARM_TLS_GNU_RELOC (r_type)
+ && !((h ? elf32_arm_hash_entry (h)->tls_type :
+ elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
+ & GOT_TLS_GDESC)))
+ {
+ r = elf32_arm_tls_relax (globals, input_bfd, input_section,
+ contents, rel, h == NULL);
+ /* This may have been marked unresolved because it came from
+ a shared library. But we've just dealt with that. */
+ unresolved_reloc = 0;
+ }
+ else
+ r = bfd_reloc_continue;
+
+ if (r == bfd_reloc_continue)
+ r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
+ input_section, contents, rel,
+ relocation, info, sec, name, sym_type,
+ (h ? h->target_internal
+ : ARM_SYM_BRANCH_TYPE (sym)), h,
+ &unresolved_reloc, &error_message);
/* Dynamic relocs are not propagated for SEC_DEBUGGING sections
because such sections are not SEC_ALLOC and thus ld.so will
not process them. */
if (unresolved_reloc
- && !((input_section->flags & SEC_DEBUGGING) != 0
- && h->def_dynamic))
+ && !((input_section->flags & SEC_DEBUGGING) != 0
+ && h->def_dynamic)
+ && _bfd_elf_section_offset (output_bfd, info, input_section,
+ rel->r_offset) != (bfd_vma) -1)
{
(*_bfd_error_handler)
(_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
{
arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
xmalloc (sizeof (arm_unwind_table_edit));
-
+
new_edit->type = type;
new_edit->linked_section = linked_section;
new_edit->index = tindex;
-
+
if (tindex > 0)
{
new_edit->next = NULL;
/* Scan .ARM.exidx tables, and create a list describing edits which should be
made to those tables, such that:
-
+
1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
- codes which have been inlined into the index).
+ codes which have been inlined into the index).
If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
The edits are applied when the tables are written
- (in elf32_arm_write_section).
-*/
+ (in elf32_arm_write_section). */
bfd_boolean
elf32_arm_fix_exidx_coverage (asection **text_section_order,
for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
{
asection *sec;
-
+
for (sec = inp->sections; sec != NULL; sec = sec->next)
- {
+ {
struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
-
+
if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
continue;
-
+
if (elf_sec->linked_to)
{
Elf_Internal_Shdr *linked_hdr
- = &elf_section_data (elf_sec->linked_to)->this_hdr;
+ = &elf_section_data (elf_sec->linked_to)->this_hdr;
struct _arm_elf_section_data *linked_sec_arm_data
- = get_arm_elf_section_data (linked_hdr->bfd_section);
+ = get_arm_elf_section_data (linked_hdr->bfd_section);
if (linked_sec_arm_data == NULL)
- continue;
+ continue;
/* Link this .ARM.exidx section back from the text section it
- describes. */
+ describes. */
linked_sec_arm_data->u.text.arm_exidx_sec = sec;
}
}
bfd *ibfd;
if (arm_data == NULL)
- continue;
+ continue;
exidx_sec = arm_data->u.text.arm_exidx_sec;
if (exidx_sec == NULL)
hdr = &elf_section_data (exidx_sec)->this_hdr;
if (hdr->sh_type != SHT_ARM_EXIDX)
- continue;
-
+ continue;
+
exidx_arm_data = get_arm_elf_section_data (exidx_sec);
if (exidx_arm_data == NULL)
- continue;
-
+ continue;
+
ibfd = exidx_sec->owner;
-
+
if (hdr->contents != NULL)
contents = hdr->contents;
else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
/* Free contents if we allocated it ourselves. */
if (contents != hdr->contents)
- free (contents);
+ free (contents);
/* Record edits to be applied later (in elf32_arm_write_section). */
exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
-
+
if (deleted_exidx_bytes > 0)
adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
{
asection *sec, *osec;
- sec = bfd_get_section_by_name (ibfd, name);
+ sec = bfd_get_linker_section (ibfd, name);
if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
return TRUE;
return TRUE;
}
+/* Return a best guess for the machine number based on the attributes. */
+
+static unsigned int
+bfd_arm_get_mach_from_attributes (bfd * abfd)
+{
+ int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
+
+ switch (arch)
+ {
+ case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
+ case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
+ case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
+
+ case TAG_CPU_ARCH_V5TE:
+ {
+ char * name;
+
+ BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
+ name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
+
+ if (name)
+ {
+ if (strcmp (name, "IWMMXT2") == 0)
+ return bfd_mach_arm_iWMMXt2;
+
+ if (strcmp (name, "IWMMXT") == 0)
+ return bfd_mach_arm_iWMMXt;
+
+ if (strcmp (name, "XSCALE") == 0)
+ {
+ int wmmx;
+
+ BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
+ wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
+ switch (wmmx)
+ {
+ case 1: return bfd_mach_arm_iWMMXt;
+ case 2: return bfd_mach_arm_iWMMXt2;
+ default: return bfd_mach_arm_XScale;
+ }
+ }
+ }
+
+ return bfd_mach_arm_5TE;
+ }
+
+ default:
+ return bfd_mach_arm_unknown;
+ }
+}
+
/* Set the right machine number. */
static bfd_boolean
mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
- if (mach != bfd_mach_arm_unknown)
- bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
-
- else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
- bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
-
- else
- bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
+ if (mach == bfd_mach_arm_unknown)
+ {
+ if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
+ mach = bfd_mach_arm_ep9312;
+ else
+ mach = bfd_arm_get_mach_from_attributes (abfd);
+ }
+ bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
return TRUE;
}
return FALSE;
/* If the src and dest have different interworking flags
- then turn off the interworking bit. */
+ then turn off the interworking bit. */
if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
{
if (out_flags & EF_ARM_INTERWORK)
T(V7E_M), /* V6S_M. */
T(V7E_M) /* V7E_M. */
};
+ const int v8[] =
+ {
+ T(V8), /* PRE_V4. */
+ T(V8), /* V4. */
+ T(V8), /* V4T. */
+ T(V8), /* V5T. */
+ T(V8), /* V5TE. */
+ T(V8), /* V5TEJ. */
+ T(V8), /* V6. */
+ T(V8), /* V6KZ. */
+ T(V8), /* V6T2. */
+ T(V8), /* V6K. */
+ T(V8), /* V7. */
+ T(V8), /* V6_M. */
+ T(V8), /* V6S_M. */
+ T(V8), /* V7E_M. */
+ T(V8) /* V8. */
+ };
const int v4t_plus_v6_m[] =
{
-1, /* PRE_V4. */
T(V6_M), /* V6_M. */
T(V6S_M), /* V6S_M. */
T(V7E_M), /* V7E_M. */
+ T(V8), /* V8. */
T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
};
const int *comb[] =
v6_m,
v6s_m,
v7e_m,
+ v8,
/* Pseudo-architecture. */
v4t_plus_v6_m
};
#undef T
}
+/* Query attributes object to see if integer divide instructions may be
+ present in an object. */
+static bfd_boolean
+elf32_arm_attributes_accept_div (const obj_attribute *attr)
+{
+ int arch = attr[Tag_CPU_arch].i;
+ int profile = attr[Tag_CPU_arch_profile].i;
+
+ switch (attr[Tag_DIV_use].i)
+ {
+ case 0:
+ /* Integer divide allowed if instruction contained in archetecture. */
+ if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
+ return TRUE;
+ else if (arch >= TAG_CPU_ARCH_V7E_M)
+ return TRUE;
+ else
+ return FALSE;
+
+ case 1:
+ /* Integer divide explicitly prohibited. */
+ return FALSE;
+
+ default:
+ /* Unrecognised case - treat as allowing divide everywhere. */
+ case 2:
+ /* Integer divide allowed in ARM state. */
+ return TRUE;
+ }
+}
+
+/* Query attributes object to see if integer divide instructions are
+ forbidden to be in the object. This is not the inverse of
+ elf32_arm_attributes_accept_div. */
+static bfd_boolean
+elf32_arm_attributes_forbid_div (const obj_attribute *attr)
+{
+ return attr[Tag_DIV_use].i == 1;
+}
+
/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
are conflicting attributes. */
{
if (out_attr[Tag_MPextension_use].i != 0
&& out_attr[Tag_MPextension_use_legacy].i
- != out_attr[Tag_MPextension_use].i)
+ != out_attr[Tag_MPextension_use].i)
{
_bfd_error_handler
(_("Error: %B has both the current and legacy "
"ARM v6K",
"ARM v7",
"ARM v6-M",
- "ARM v6S-M"
+ "ARM v6S-M",
+ "ARM v8"
};
/* Merge Tag_CPU_arch and Tag_also_compatible_with. */
/* 0 will merge with anything.
'A' and 'S' merge to 'A'.
'R' and 'S' merge to 'R'.
- 'M' and 'A|R|S' is an error. */
+ 'M' and 'A|R|S' is an error. */
if (out_attr[i].i == 0
|| (out_attr[i].i == 'S'
&& (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
when it's 0. It might mean absence of FP hardware if
Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
+#define VFP_VERSION_COUNT 8
static const struct
{
int ver;
int regs;
- } vfp_versions[7] =
+ } vfp_versions[VFP_VERSION_COUNT] =
{
{0, 0},
{1, 16},
{3, 32},
{3, 16},
{4, 32},
- {4, 16}
+ {4, 16},
+ {8, 32}
};
int ver;
int regs;
/* Now we can handle Tag_FP_arch. */
- /* Values greater than 6 aren't defined, so just pick the
- biggest */
- if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
+ /* Values of VFP_VERSION_COUNT or more aren't defined, so just
+ pick the biggest. */
+ if (in_attr[i].i >= VFP_VERSION_COUNT
+ && in_attr[i].i > out_attr[i].i)
{
out_attr[i] = in_attr[i];
break;
if (regs < vfp_versions[out_attr[i].i].regs)
regs = vfp_versions[out_attr[i].i].regs;
/* This assumes all possible supersets are also a valid
- options. */
- for (newval = 6; newval > 0; newval--)
+ options. */
+ for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
{
if (regs == vfp_versions[newval].regs
&& ver == vfp_versions[newval].ver)
case Tag_PCS_config:
if (out_attr[i].i == 0)
out_attr[i].i = in_attr[i].i;
- else if (in_attr[i].i != 0 && out_attr[i].i != 0)
+ else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
{
/* It's sometimes ok to mix different configs, so this is only
- a warning. */
+ a warning. */
_bfd_error_handler
(_("Warning: %B: Conflicting platform configuration"), ibfd);
}
break;
case Tag_DIV_use:
- /* This tag is set to zero if we can use UDIV and SDIV in Thumb
- mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
- SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
- CPU. We will merge as follows: If the input attribute's value
- is one then the output attribute's value remains unchanged. If
- the input attribute's value is zero or two then if the output
- attribute's value is one the output value is set to the input
- value, otherwise the output value must be the same as the
- inputs. */
- if (in_attr[i].i != 1 && out_attr[i].i != 1)
- {
- if (in_attr[i].i != out_attr[i].i)
- {
- _bfd_error_handler
- (_("DIV usage mismatch between %B and %B"),
- ibfd, obfd);
- result = FALSE;
- }
- }
-
- if (in_attr[i].i != 1)
- out_attr[i].i = in_attr[i].i;
-
+ /* A value of zero on input means that the divide instruction may
+ be used if available in the base architecture as specified via
+ Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
+ the user did not want divide instructions. A value of 2
+ explicitly means that divide instructions were allowed in ARM
+ and Thumb state. */
+ if (in_attr[i].i == out_attr[i].i)
+ /* Do nothing. */ ;
+ else if (elf32_arm_attributes_forbid_div (in_attr)
+ && !elf32_arm_attributes_accept_div (out_attr))
+ out_attr[i].i = 1;
+ else if (elf32_arm_attributes_forbid_div (out_attr)
+ && elf32_arm_attributes_accept_div (in_attr))
+ out_attr[i].i = in_attr[i].i;
+ else if (in_attr[i].i == 2)
+ out_attr[i].i = in_attr[i].i;
break;
case Tag_MPextension_use_legacy:
{
_bfd_error_handler
(_("%B has has both the current and legacy "
- "Tag_MPextension_use attributes"),
+ "Tag_MPextension_use attributes"),
ibfd);
result = FALSE;
}
case EF_ARM_EABI_VER5:
fprintf (file, _(" [Version5 EABI]"));
+
+ if (flags & EF_ARM_ABI_FLOAT_SOFT)
+ fprintf (file, _(" [soft-float ABI]"));
+
+ if (flags & EF_ARM_ABI_FLOAT_HARD)
+ fprintf (file, _(" [hard-float ABI]"));
+
+ flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
+
eabi:
if (flags & EF_ARM_BE8)
fprintf (file, _(" [BE8]"));
{
unsigned long r_symndx;
struct elf_link_hash_entry *h = NULL;
+ struct elf32_arm_link_hash_entry *eh;
int r_type;
+ bfd_boolean call_reloc_p;
+ bfd_boolean may_become_dynamic_p;
+ bfd_boolean may_need_local_target_p;
+ union gotplt_union *root_plt;
+ struct arm_plt_info *arm_plt;
r_symndx = ELF32_R_SYM (rel->r_info);
if (r_symndx >= symtab_hdr->sh_info)
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
}
+ eh = (struct elf32_arm_link_hash_entry *) h;
+
+ call_reloc_p = FALSE;
+ may_become_dynamic_p = FALSE;
+ may_need_local_target_p = FALSE;
r_type = ELF32_R_TYPE (rel->r_info);
r_type = arm_real_reloc_type (globals, r_type);
globals->tls_ldm_got.refcount -= 1;
break;
- case R_ARM_ABS32:
- case R_ARM_ABS32_NOI:
- case R_ARM_REL32:
- case R_ARM_REL32_NOI:
case R_ARM_PC24:
case R_ARM_PLT32:
case R_ARM_CALL:
case R_ARM_THM_CALL:
case R_ARM_THM_JUMP24:
case R_ARM_THM_JUMP19:
+ call_reloc_p = TRUE;
+ may_need_local_target_p = TRUE;
+ break;
+
+ case R_ARM_ABS12:
+ if (!globals->vxworks_p)
+ {
+ may_need_local_target_p = TRUE;
+ break;
+ }
+ /* Fall through. */
+ case R_ARM_ABS32:
+ case R_ARM_ABS32_NOI:
+ case R_ARM_REL32:
+ case R_ARM_REL32_NOI:
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
case R_ARM_MOVW_PREL_NC:
case R_ARM_THM_MOVW_PREL_NC:
case R_ARM_THM_MOVT_PREL:
/* Should the interworking branches be here also? */
-
- if (h != NULL)
+ if ((info->shared || globals->root.is_relocatable_executable)
+ && (sec->flags & SEC_ALLOC) != 0)
{
- struct elf32_arm_link_hash_entry *eh;
- struct elf_dyn_relocs **pp;
- struct elf_dyn_relocs *p;
-
- eh = (struct elf32_arm_link_hash_entry *) h;
-
- if (h->plt.refcount > 0)
+ if (h == NULL
+ && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
{
- h->plt.refcount -= 1;
- if (r_type == R_ARM_THM_CALL)
- eh->plt_maybe_thumb_refcount--;
-
- if (r_type == R_ARM_THM_JUMP24
- || r_type == R_ARM_THM_JUMP19)
- eh->plt_thumb_refcount--;
+ call_reloc_p = TRUE;
+ may_need_local_target_p = TRUE;
}
-
- if (r_type == R_ARM_ABS32
- || r_type == R_ARM_REL32
- || r_type == R_ARM_ABS32_NOI
- || r_type == R_ARM_REL32_NOI)
- for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
- if (p->sec == sec)
- {
- p->count -= 1;
- if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
- || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
- p->pc_count -= 1;
- if (p->count == 0)
- *pp = p->next;
- break;
- }
+ else
+ may_become_dynamic_p = TRUE;
}
+ else
+ may_need_local_target_p = TRUE;
break;
default:
break;
}
+
+ if (may_need_local_target_p
+ && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
+ {
+ /* If PLT refcount book-keeping is wrong and too low, we'll
+ see a zero value (going to -1) for the root PLT reference
+ count. */
+ if (root_plt->refcount >= 0)
+ {
+ BFD_ASSERT (root_plt->refcount != 0);
+ root_plt->refcount -= 1;
+ }
+ else
+ /* A value of -1 means the symbol has become local, forced
+ or seeing a hidden definition. Any other negative value
+ is an error. */
+ BFD_ASSERT (root_plt->refcount == -1);
+
+ if (!call_reloc_p)
+ arm_plt->noncall_refcount--;
+
+ if (r_type == R_ARM_THM_CALL)
+ arm_plt->maybe_thumb_refcount--;
+
+ if (r_type == R_ARM_THM_JUMP24
+ || r_type == R_ARM_THM_JUMP19)
+ arm_plt->thumb_refcount--;
+ }
+
+ if (may_become_dynamic_p)
+ {
+ struct elf_dyn_relocs **pp;
+ struct elf_dyn_relocs *p;
+
+ if (h != NULL)
+ pp = &(eh->dyn_relocs);
+ else
+ {
+ Elf_Internal_Sym *isym;
+
+ isym = bfd_sym_from_r_symndx (&globals->sym_cache,
+ abfd, r_symndx);
+ if (isym == NULL)
+ return FALSE;
+ pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
+ if (pp == NULL)
+ return FALSE;
+ }
+ for (; (p = *pp) != NULL; pp = &p->next)
+ if (p->sec == sec)
+ {
+ /* Everything must go for SEC. */
+ *pp = p->next;
+ break;
+ }
+ }
}
return TRUE;
bfd *dynobj;
asection *sreloc;
struct elf32_arm_link_hash_table *htab;
- bfd_boolean needs_plt;
+ bfd_boolean call_reloc_p;
+ bfd_boolean may_become_dynamic_p;
+ bfd_boolean may_need_local_target_p;
unsigned long nsyms;
if (info->relocatable)
return FALSE;
}
- dynobj = elf_hash_table (info)->dynobj;
+ if (htab->root.dynobj == NULL)
+ htab->root.dynobj = abfd;
+ if (!create_ifunc_sections (info))
+ return FALSE;
+
+ dynobj = htab->root.dynobj;
+
symtab_hdr = & elf_symtab_hdr (abfd);
sym_hashes = elf_sym_hashes (abfd);
nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
-
+
rel_end = relocs + sec->reloc_count;
for (rel = relocs; rel < rel_end; rel++)
{
+ Elf_Internal_Sym *isym;
struct elf_link_hash_entry *h;
struct elf32_arm_link_hash_entry *eh;
unsigned long r_symndx;
return FALSE;
}
- if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
- h = NULL;
- else
+ h = NULL;
+ isym = NULL;
+ if (nsyms > 0)
{
- h = sym_hashes[r_symndx - symtab_hdr->sh_info];
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ isym = bfd_sym_from_r_symndx (&htab->sym_cache,
+ abfd, r_symndx);
+ if (isym == NULL)
+ return FALSE;
+ }
+ else
+ {
+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+ while (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
+
+ /* PR15323, ref flags aren't set for references in the
+ same object. */
+ h->root.non_ir_ref = 1;
+ }
}
eh = (struct elf32_arm_link_hash_entry *) h;
+ call_reloc_p = FALSE;
+ may_become_dynamic_p = FALSE;
+ may_need_local_target_p = FALSE;
+
+ /* Could be done earlier, if h were already available. */
+ r_type = elf32_arm_tls_transition (info, r_type, h);
switch (r_type)
- {
+ {
case R_ARM_GOT32:
case R_ARM_GOT_PREL:
case R_ARM_TLS_GD32:
case R_ARM_TLS_IE32:
+ case R_ARM_TLS_GOTDESC:
+ case R_ARM_TLS_DESCSEQ:
+ case R_ARM_THM_TLS_DESCSEQ:
+ case R_ARM_TLS_CALL:
+ case R_ARM_THM_TLS_CALL:
/* This symbol requires a global offset table entry. */
{
int tls_type, old_tls_type;
switch (r_type)
{
case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
+
case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
+
+ case R_ARM_TLS_GOTDESC:
+ case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
+ case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
+ tls_type = GOT_TLS_GDESC; break;
+
default: tls_type = GOT_NORMAL; break;
}
}
else
{
- bfd_signed_vma *local_got_refcounts;
-
/* This is a global offset table entry for a local symbol. */
- local_got_refcounts = elf_local_got_refcounts (abfd);
- if (local_got_refcounts == NULL)
- {
- bfd_size_type size;
-
- size = symtab_hdr->sh_info;
- size *= (sizeof (bfd_signed_vma) + sizeof (char));
- local_got_refcounts = (bfd_signed_vma *)
- bfd_zalloc (abfd, size);
- if (local_got_refcounts == NULL)
- return FALSE;
- elf_local_got_refcounts (abfd) = local_got_refcounts;
- elf32_arm_local_got_tls_type (abfd)
- = (char *) (local_got_refcounts + symtab_hdr->sh_info);
- }
- local_got_refcounts[r_symndx] += 1;
+ if (!elf32_arm_allocate_local_sym_info (abfd))
+ return FALSE;
+ elf_local_got_refcounts (abfd)[r_symndx] += 1;
old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
}
- /* We will already have issued an error message if there is a
- TLS / non-TLS mismatch, based on the symbol type. We don't
- support any linker relaxations. So just combine any TLS
- types needed. */
+ /* If a variable is accessed with both tls methods, two
+ slots may be created. */
+ if (GOT_TLS_GD_ANY_P (old_tls_type)
+ && GOT_TLS_GD_ANY_P (tls_type))
+ tls_type |= old_tls_type;
+
+ /* We will already have issued an error message if there
+ is a TLS/non-TLS mismatch, based on the symbol
+ type. So just combine any TLS types needed. */
if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
&& tls_type != GOT_NORMAL)
tls_type |= old_tls_type;
+ /* If the symbol is accessed in both IE and GDESC
+ method, we're able to relax. Turn off the GDESC flag,
+ without messing up with any other kind of tls types
+ that may be involved */
+ if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
+ tls_type &= ~GOT_TLS_GDESC;
+
if (old_tls_type != tls_type)
{
if (h != NULL)
case R_ARM_GOTOFF32:
case R_ARM_GOTPC:
- if (htab->root.sgot == NULL)
- {
- if (htab->root.dynobj == NULL)
- htab->root.dynobj = abfd;
- if (!create_got_section (htab->root.dynobj, info))
- return FALSE;
- }
+ if (htab->root.sgot == NULL
+ && !create_got_section (htab->root.dynobj, info))
+ return FALSE;
break;
- case R_ARM_ABS12:
- /* VxWorks uses dynamic R_ARM_ABS12 relocations for
- ldr __GOTT_INDEX__ offsets. */
- if (!htab->vxworks_p)
- break;
- /* Fall through. */
-
case R_ARM_PC24:
case R_ARM_PLT32:
case R_ARM_CALL:
case R_ARM_THM_CALL:
case R_ARM_THM_JUMP24:
case R_ARM_THM_JUMP19:
- needs_plt = 1;
- goto normal_reloc;
+ call_reloc_p = TRUE;
+ may_need_local_target_p = TRUE;
+ break;
+
+ case R_ARM_ABS12:
+ /* VxWorks uses dynamic R_ARM_ABS12 relocations for
+ ldr __GOTT_INDEX__ offsets. */
+ if (!htab->vxworks_p)
+ {
+ may_need_local_target_p = TRUE;
+ break;
+ }
+ /* Fall through. */
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
case R_ARM_MOVT_PREL:
case R_ARM_THM_MOVW_PREL_NC:
case R_ARM_THM_MOVT_PREL:
- needs_plt = 0;
- normal_reloc:
/* Should the interworking branches be listed here? */
- if (h != NULL)
+ if ((info->shared || htab->root.is_relocatable_executable)
+ && (sec->flags & SEC_ALLOC) != 0)
{
- /* If this reloc is in a read-only section, we might
- need a copy reloc. We can't check reliably at this
- stage whether the section is read-only, as input
- sections have not yet been mapped to output sections.
- Tentatively set the flag for now, and correct in
- adjust_dynamic_symbol. */
- if (!info->shared)
- h->non_got_ref = 1;
-
- /* We may need a .plt entry if the function this reloc
- refers to is in a different object. We can't tell for
- sure yet, because something later might force the
- symbol local. */
- if (needs_plt)
- h->needs_plt = 1;
-
- /* If we create a PLT entry, this relocation will reference
- it, even if it's an ABS32 relocation. */
- h->plt.refcount += 1;
-
- /* It's too early to use htab->use_blx here, so we have to
- record possible blx references separately from
- relocs that definitely need a thumb stub. */
-
- if (r_type == R_ARM_THM_CALL)
- eh->plt_maybe_thumb_refcount += 1;
-
- if (r_type == R_ARM_THM_JUMP24
- || r_type == R_ARM_THM_JUMP19)
- eh->plt_thumb_refcount += 1;
+ if (h == NULL
+ && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
+ {
+ /* In shared libraries and relocatable executables,
+ we treat local relative references as calls;
+ see the related SYMBOL_CALLS_LOCAL code in
+ allocate_dynrelocs. */
+ call_reloc_p = TRUE;
+ may_need_local_target_p = TRUE;
+ }
+ else
+ /* We are creating a shared library or relocatable
+ executable, and this is a reloc against a global symbol,
+ or a non-PC-relative reloc against a local symbol.
+ We may need to copy the reloc into the output. */
+ may_become_dynamic_p = TRUE;
}
+ else
+ may_need_local_target_p = TRUE;
+ break;
- /* If we are creating a shared library or relocatable executable,
- and this is a reloc against a global symbol, or a non PC
- relative reloc against a local symbol, then we need to copy
- the reloc into the shared library. However, if we are linking
- with -Bsymbolic, we do not need to copy a reloc against a
- global symbol which is defined in an object we are
- including in the link (i.e., DEF_REGULAR is set). At
- this point we have not seen all the input files, so it is
- possible that DEF_REGULAR is not set now but will be set
- later (it is never cleared). We account for that
- possibility below by storing information in the
- dyn_relocs field of the hash table entry. */
- if ((info->shared || htab->root.is_relocatable_executable)
- && (sec->flags & SEC_ALLOC) != 0
- && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
- || (h != NULL && ! h->needs_plt
- && (! info->symbolic || ! h->def_regular))))
- {
- struct elf_dyn_relocs *p, **head;
+ /* This relocation describes the C++ object vtable hierarchy.
+ Reconstruct it for later use during GC. */
+ case R_ARM_GNU_VTINHERIT:
+ if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
+ return FALSE;
+ break;
- /* When creating a shared object, we must copy these
- reloc types into the output file. We create a reloc
- section in dynobj and make room for this reloc. */
- if (sreloc == NULL)
- {
- sreloc = _bfd_elf_make_dynamic_reloc_section
- (sec, dynobj, 2, abfd, ! htab->use_rel);
+ /* This relocation describes which C++ vtable entries are actually
+ used. Record for later use during GC. */
+ case R_ARM_GNU_VTENTRY:
+ BFD_ASSERT (h != NULL);
+ if (h != NULL
+ && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
+ return FALSE;
+ break;
+ }
- if (sreloc == NULL)
- return FALSE;
+ if (h != NULL)
+ {
+ if (call_reloc_p)
+ /* We may need a .plt entry if the function this reloc
+ refers to is in a different object, regardless of the
+ symbol's type. We can't tell for sure yet, because
+ something later might force the symbol local. */
+ h->needs_plt = 1;
+ else if (may_need_local_target_p)
+ /* If this reloc is in a read-only section, we might
+ need a copy reloc. We can't check reliably at this
+ stage whether the section is read-only, as input
+ sections have not yet been mapped to output sections.
+ Tentatively set the flag for now, and correct in
+ adjust_dynamic_symbol. */
+ h->non_got_ref = 1;
+ }
- /* BPABI objects never have dynamic relocations mapped. */
- if (htab->symbian_p)
- {
- flagword flags;
+ if (may_need_local_target_p
+ && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
+ {
+ union gotplt_union *root_plt;
+ struct arm_plt_info *arm_plt;
+ struct arm_local_iplt_info *local_iplt;
- flags = bfd_get_section_flags (dynobj, sreloc);
- flags &= ~(SEC_LOAD | SEC_ALLOC);
- bfd_set_section_flags (dynobj, sreloc, flags);
- }
- }
+ if (h != NULL)
+ {
+ root_plt = &h->plt;
+ arm_plt = &eh->plt;
+ }
+ else
+ {
+ local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
+ if (local_iplt == NULL)
+ return FALSE;
+ root_plt = &local_iplt->root;
+ arm_plt = &local_iplt->arm;
+ }
- /* If this is a global symbol, we count the number of
- relocations we need for this symbol. */
- if (h != NULL)
- {
- head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
- }
- else
- {
- /* Track dynamic relocs needed for local syms too.
- We really need local syms available to do this
- easily. Oh well. */
- asection *s;
- void *vpp;
- Elf_Internal_Sym *isym;
-
- isym = bfd_sym_from_r_symndx (&htab->sym_cache,
- abfd, r_symndx);
- if (isym == NULL)
- return FALSE;
-
- s = bfd_section_from_elf_index (abfd, isym->st_shndx);
- if (s == NULL)
- s = sec;
-
- vpp = &elf_section_data (s)->local_dynrel;
- head = (struct elf_dyn_relocs **) vpp;
- }
+ /* If the symbol is a function that doesn't bind locally,
+ this relocation will need a PLT entry. */
+ if (root_plt->refcount != -1)
+ root_plt->refcount += 1;
- p = *head;
- if (p == NULL || p->sec != sec)
- {
- bfd_size_type amt = sizeof *p;
-
- p = (struct elf_dyn_relocs *)
- bfd_alloc (htab->root.dynobj, amt);
- if (p == NULL)
- return FALSE;
- p->next = *head;
- *head = p;
- p->sec = sec;
- p->count = 0;
- p->pc_count = 0;
- }
+ if (!call_reloc_p)
+ arm_plt->noncall_refcount++;
- if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
- p->pc_count += 1;
- p->count += 1;
- }
- break;
+ /* It's too early to use htab->use_blx here, so we have to
+ record possible blx references separately from
+ relocs that definitely need a thumb stub. */
+
+ if (r_type == R_ARM_THM_CALL)
+ arm_plt->maybe_thumb_refcount += 1;
+
+ if (r_type == R_ARM_THM_JUMP24
+ || r_type == R_ARM_THM_JUMP19)
+ arm_plt->thumb_refcount += 1;
+ }
+
+ if (may_become_dynamic_p)
+ {
+ struct elf_dyn_relocs *p, **head;
+
+ /* Create a reloc section in dynobj. */
+ if (sreloc == NULL)
+ {
+ sreloc = _bfd_elf_make_dynamic_reloc_section
+ (sec, dynobj, 2, abfd, ! htab->use_rel);
+
+ if (sreloc == NULL)
+ return FALSE;
+
+ /* BPABI objects never have dynamic relocations mapped. */
+ if (htab->symbian_p)
+ {
+ flagword flags;
+
+ flags = bfd_get_section_flags (dynobj, sreloc);
+ flags &= ~(SEC_LOAD | SEC_ALLOC);
+ bfd_set_section_flags (dynobj, sreloc, flags);
+ }
+ }
+
+ /* If this is a global symbol, count the number of
+ relocations we need for this symbol. */
+ if (h != NULL)
+ head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
+ else
+ {
+ head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
+ if (head == NULL)
+ return FALSE;
+ }
- /* This relocation describes the C++ object vtable hierarchy.
- Reconstruct it for later use during GC. */
- case R_ARM_GNU_VTINHERIT:
- if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
- return FALSE;
- break;
+ p = *head;
+ if (p == NULL || p->sec != sec)
+ {
+ bfd_size_type amt = sizeof *p;
+
+ p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
+ if (p == NULL)
+ return FALSE;
+ p->next = *head;
+ *head = p;
+ p->sec = sec;
+ p->count = 0;
+ p->pc_count = 0;
+ }
- /* This relocation describes which C++ vtable entries are actually
- used. Record for later use during GC. */
- case R_ARM_GNU_VTENTRY:
- BFD_ASSERT (h != NULL);
- if (h != NULL
- && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
- return FALSE;
- break;
- }
+ if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
+ p->pc_count += 1;
+ p->count += 1;
+ }
}
return TRUE;
Elf_Internal_Shdr **elf_shdrp;
bfd_boolean again;
+ _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
+
/* Marking EH data may cause additional code sections to be marked,
requiring multiple passes. */
again = TRUE;
/* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
- if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
+ if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
+ section, symbols, offset,
filename_ptr, functionname_ptr,
- line_ptr, 0,
+ line_ptr, NULL, 0,
& elf_tdata (abfd)->dwarf2_find_line_info))
{
if (!*functionname_ptr)
/* Make sure we know what is going on here. */
BFD_ASSERT (dynobj != NULL
&& (h->needs_plt
+ || h->type == STT_GNU_IFUNC
|| h->u.weakdef != NULL
|| (h->def_dynamic
&& h->ref_regular
/* If this is a function, put it in the procedure linkage table. We
will fill in the contents of the procedure linkage table later,
when we know the address of the .got section. */
- if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
- || h->needs_plt)
+ if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
{
+ /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
+ symbol binds locally. */
if (h->plt.refcount <= 0
- || SYMBOL_CALLS_LOCAL (info, h)
- || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
- && h->root.type == bfd_link_hash_undefweak))
+ || (h->type != STT_GNU_IFUNC
+ && (SYMBOL_CALLS_LOCAL (info, h)
+ || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ && h->root.type == bfd_link_hash_undefweak))))
{
/* This case can occur if we saw a PLT32 reloc in an input
file, but the symbol was never referred to by a dynamic
such a case, we don't actually need to build a procedure
linkage table, and we can just do a PC24 reloc instead. */
h->plt.offset = (bfd_vma) -1;
- eh->plt_thumb_refcount = 0;
- eh->plt_maybe_thumb_refcount = 0;
+ eh->plt.thumb_refcount = 0;
+ eh->plt.maybe_thumb_refcount = 0;
+ eh->plt.noncall_refcount = 0;
h->needs_plt = 0;
}
and non-function syms in check-relocs; Objects loaded later in
the link may change h->type. So fix it now. */
h->plt.offset = (bfd_vma) -1;
- eh->plt_thumb_refcount = 0;
- eh->plt_maybe_thumb_refcount = 0;
+ eh->plt.thumb_refcount = 0;
+ eh->plt.maybe_thumb_refcount = 0;
+ eh->plt.noncall_refcount = 0;
}
/* If this is a weak symbol, and there is a real definition, the
if (info->shared || globals->root.is_relocatable_executable)
return TRUE;
- if (h->size == 0)
- {
- (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
- h->root.root.string);
- return TRUE;
- }
-
/* We must allocate the symbol in our .dynbss section, which will
become part of the .bss section of the executable. There will be
an entry for this symbol in the .dynsym section. The dynamic
determine the address it must put in the global offset table, so
both the dynamic object and the regular object will refer to the
same memory location for the variable. */
- s = bfd_get_section_by_name (dynobj, ".dynbss");
+ s = bfd_get_linker_section (dynobj, ".dynbss");
BFD_ASSERT (s != NULL);
/* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
copy the initial value out of the dynamic object and into the
runtime process image. We need to remember the offset into the
.rel(a).bss section we are going to use. */
- if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
+ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
{
asection *srel;
- srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
- BFD_ASSERT (srel != NULL);
- srel->size += RELOC_SIZE (globals);
+ srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
+ elf32_arm_allocate_dynrelocs (info, srel, 1);
h->needs_copy = 1;
}
dynamic relocs. */
static bfd_boolean
-allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
+allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
{
struct bfd_link_info *info;
struct elf32_arm_link_hash_table *htab;
struct elf32_arm_link_hash_entry *eh;
struct elf_dyn_relocs *p;
- bfd_signed_vma thumb_refs;
-
- eh = (struct elf32_arm_link_hash_entry *) h;
if (h->root.type == bfd_link_hash_indirect)
return TRUE;
- if (h->root.type == bfd_link_hash_warning)
- /* When warning symbols are created, they **replace** the "real"
- entry in the hash table, thus we never get to see the real
- symbol in a hash traversal. So look at it now. */
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
+ eh = (struct elf32_arm_link_hash_entry *) h;
info = (struct bfd_link_info *) inf;
htab = elf32_arm_hash_table (info);
if (htab == NULL)
return FALSE;
- if (htab->root.dynamic_sections_created
+ if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
&& h->plt.refcount > 0)
{
/* Make sure this symbol is output as a dynamic symbol.
return FALSE;
}
+ /* If the call in the PLT entry binds locally, the associated
+ GOT entry should use an R_ARM_IRELATIVE relocation instead of
+ the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
+ than the .plt section. */
+ if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
+ {
+ eh->is_iplt = 1;
+ if (eh->plt.noncall_refcount == 0
+ && SYMBOL_REFERENCES_LOCAL (info, h))
+ /* All non-call references can be resolved directly.
+ This means that they can (and in some cases, must)
+ resolve directly to the run-time target, rather than
+ to the PLT. That in turns means that any .got entry
+ would be equal to the .igot.plt entry, so there's
+ no point having both. */
+ h->got.refcount = 0;
+ }
+
if (info->shared
+ || eh->is_iplt
|| WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
{
- asection *s = htab->root.splt;
-
- /* If this is the first .plt entry, make room for the special
- first entry. */
- if (s->size == 0)
- s->size += htab->plt_header_size;
-
- h->plt.offset = s->size;
-
- /* If we will insert a Thumb trampoline before this PLT, leave room
- for it. */
- thumb_refs = eh->plt_thumb_refcount;
- if (!htab->use_blx)
- thumb_refs += eh->plt_maybe_thumb_refcount;
-
- if (thumb_refs > 0)
- {
- h->plt.offset += PLT_THUMB_STUB_SIZE;
- s->size += PLT_THUMB_STUB_SIZE;
- }
+ elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
/* If this symbol is not defined in a regular file, and we are
not generating a shared library, then set the symbol to this
if (! info->shared
&& !h->def_regular)
{
- h->root.u.def.section = s;
+ h->root.u.def.section = htab->root.splt;
h->root.u.def.value = h->plt.offset;
/* Make sure the function is not marked as Thumb, in case
it is the target of an ABS32 relocation, which will
point to the PLT entry. */
- if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
- h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
- }
-
- /* Make room for this entry. */
- s->size += htab->plt_entry_size;
-
- if (!htab->symbian_p)
- {
- /* We also need to make an entry in the .got.plt section, which
- will be placed in the .got section by the linker script. */
- eh->plt_got_offset = htab->root.sgotplt->size;
- htab->root.sgotplt->size += 4;
+ h->target_internal = ST_BRANCH_TO_ARM;
}
- /* We also need to make an entry in the .rel(a).plt section. */
- htab->root.srelplt->size += RELOC_SIZE (htab);
+ htab->next_tls_desc_index++;
/* VxWorks executables have a second set of relocations for
each PLT entry. They go in a separate relocation section,
/* There is a relocation for the initial PLT entry:
an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
if (h->plt.offset == htab->plt_header_size)
- htab->srelplt2->size += RELOC_SIZE (htab);
+ elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
/* There are two extra relocations for each subsequent
PLT entry: an R_ARM_32 relocation for the GOT entry,
and an R_ARM_32 relocation for the PLT entry. */
- htab->srelplt2->size += RELOC_SIZE (htab) * 2;
+ elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
}
}
else
h->needs_plt = 0;
}
+ eh = (struct elf32_arm_link_hash_entry *) h;
+ eh->tlsdesc_got = (bfd_vma) -1;
+
if (h->got.refcount > 0)
{
asection *s;
s->size += 4;
else
{
+ if (tls_type & GOT_TLS_GDESC)
+ {
+ /* R_ARM_TLS_DESC needs 2 GOT slots. */
+ eh->tlsdesc_got
+ = (htab->root.sgotplt->size
+ - elf32_arm_compute_jump_table_size (htab));
+ htab->root.sgotplt->size += 8;
+ h->got.offset = (bfd_vma) -2;
+ /* plt.got_offset needs to know there's a TLS_DESC
+ reloc in the middle of .got.plt. */
+ htab->num_tls_desc++;
+ }
+
if (tls_type & GOT_TLS_GD)
- /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
- s->size += 8;
+ {
+ /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
+ the symbol is both GD and GDESC, got.offset may
+ have been overwritten. */
+ h->got.offset = s->size;
+ s->size += 8;
+ }
+
if (tls_type & GOT_TLS_IE)
/* R_ARM_TLS_IE32 needs one GOT slot. */
s->size += 4;
|| h->root.type != bfd_link_hash_undefweak))
{
if (tls_type & GOT_TLS_IE)
- htab->root.srelgot->size += RELOC_SIZE (htab);
+ elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
if (tls_type & GOT_TLS_GD)
- htab->root.srelgot->size += RELOC_SIZE (htab);
+ elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
+
+ if (tls_type & GOT_TLS_GDESC)
+ {
+ elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
+ /* GDESC needs a trampoline to jump to. */
+ htab->tls_trampoline = -1;
+ }
+ /* Only GD needs it. GDESC just emits one relocation per
+ 2 entries. */
if ((tls_type & GOT_TLS_GD) && indx != 0)
- htab->root.srelgot->size += RELOC_SIZE (htab);
+ elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
}
- else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
- || h->root.type != bfd_link_hash_undefweak)
- && (info->shared
- || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
- htab->root.srelgot->size += RELOC_SIZE (htab);
+ else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
+ {
+ if (htab->root.dynamic_sections_created)
+ /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
+ elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
+ }
+ else if (h->type == STT_GNU_IFUNC
+ && eh->plt.noncall_refcount == 0)
+ /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
+ they all resolve dynamically instead. Reserve room for the
+ GOT entry's R_ARM_IRELATIVE relocation. */
+ elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
+ else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
+ || h->root.type != bfd_link_hash_undefweak))
+ /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
+ elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
}
}
else
/* Allocate stubs for exported Thumb functions on v4t. */
if (!htab->use_blx && h->dynindx != -1
&& h->def_regular
- && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
+ && h->target_internal == ST_BRANCH_TO_THUMB
&& ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
{
struct elf_link_hash_entry * th;
NULL, TRUE, FALSE, &bh);
myh = (struct elf_link_hash_entry *) bh;
- myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
+ myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
myh->forced_local = 1;
+ myh->target_internal = ST_BRANCH_TO_THUMB;
eh->export_glue = myh;
th = record_arm_to_thumb_glue (info, h);
/* Point the symbol at the stub. */
h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
+ h->target_internal = ST_BRANCH_TO_ARM;
h->root.u.def.section = th->root.u.def.section;
h->root.u.def.value = th->root.u.def.value & ~1;
}
if (info->shared || htab->root.is_relocatable_executable)
{
/* The only relocs that use pc_count are R_ARM_REL32 and
- R_ARM_REL32_NOI, which will appear on something like
- ".long foo - .". We want calls to protected symbols to resolve
- directly to the function rather than going via the plt. If people
- want function pointer comparisons to work as expected then they
- should avoid writing assembly like ".long foo - .". */
+ R_ARM_REL32_NOI, which will appear on something like
+ ".long foo - .". We want calls to protected symbols to resolve
+ directly to the function rather than going via the plt. If people
+ want function pointer comparisons to work as expected then they
+ should avoid writing assembly like ".long foo - .". */
if (SYMBOL_CALLS_LOCAL (info, h))
{
struct elf_dyn_relocs **pp;
}
/* Also discard relocs on undefined weak syms with non-default
- visibility. */
+ visibility. */
if (eh->dyn_relocs != NULL
&& h->root.type == bfd_link_hash_undefweak)
{
for (p = eh->dyn_relocs; p != NULL; p = p->next)
{
asection *sreloc = elf_section_data (p->sec)->sreloc;
- sreloc->size += p->count * RELOC_SIZE (htab);
+ if (h->type == STT_GNU_IFUNC
+ && eh->plt.noncall_refcount == 0
+ && SYMBOL_REFERENCES_LOCAL (info, h))
+ elf32_arm_allocate_irelocs (info, sreloc, p->count);
+ else
+ elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
}
return TRUE;
struct elf32_arm_link_hash_entry * eh;
struct elf_dyn_relocs * p;
- if (h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
-
eh = (struct elf32_arm_link_hash_entry *) h;
for (p = eh->dyn_relocs; p != NULL; p = p->next)
{
/* Set the contents of the .interp section to the interpreter. */
if (info->executable)
{
- s = bfd_get_section_by_name (dynobj, ".interp");
+ s = bfd_get_linker_section (dynobj, ".interp");
BFD_ASSERT (s != NULL);
s->size = sizeof ELF_DYNAMIC_INTERPRETER;
s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
{
bfd_signed_vma *local_got;
bfd_signed_vma *end_local_got;
+ struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
char *local_tls_type;
+ bfd_vma *local_tlsdesc_gotent;
bfd_size_type locsymcount;
Elf_Internal_Shdr *symtab_hdr;
asection *srel;
bfd_boolean is_vxworks = htab->vxworks_p;
+ unsigned int symndx;
if (! is_arm_elf (ibfd))
continue;
struct elf_dyn_relocs *p;
for (p = (struct elf_dyn_relocs *)
- elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
+ elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
{
if (!bfd_is_abs_section (p->sec)
&& bfd_is_abs_section (p->sec->output_section))
else if (p->count != 0)
{
srel = elf_section_data (p->sec)->sreloc;
- srel->size += p->count * RELOC_SIZE (htab);
+ elf32_arm_allocate_dynrelocs (info, srel, p->count);
if ((p->sec->output_section->flags & SEC_READONLY) != 0)
info->flags |= DF_TEXTREL;
}
symtab_hdr = & elf_symtab_hdr (ibfd);
locsymcount = symtab_hdr->sh_info;
end_local_got = local_got + locsymcount;
+ local_iplt_ptr = elf32_arm_local_iplt (ibfd);
local_tls_type = elf32_arm_local_got_tls_type (ibfd);
+ local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
+ symndx = 0;
s = htab->root.sgot;
srel = htab->root.srelgot;
- for (; local_got < end_local_got; ++local_got, ++local_tls_type)
+ for (; local_got < end_local_got;
+ ++local_got, ++local_iplt_ptr, ++local_tls_type,
+ ++local_tlsdesc_gotent, ++symndx)
{
+ *local_tlsdesc_gotent = (bfd_vma) -1;
+ local_iplt = *local_iplt_ptr;
+ if (local_iplt != NULL)
+ {
+ struct elf_dyn_relocs *p;
+
+ if (local_iplt->root.refcount > 0)
+ {
+ elf32_arm_allocate_plt_entry (info, TRUE,
+ &local_iplt->root,
+ &local_iplt->arm);
+ if (local_iplt->arm.noncall_refcount == 0)
+ /* All references to the PLT are calls, so all
+ non-call references can resolve directly to the
+ run-time target. This means that the .got entry
+ would be the same as the .igot.plt entry, so there's
+ no point creating both. */
+ *local_got = 0;
+ }
+ else
+ {
+ BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
+ local_iplt->root.offset = (bfd_vma) -1;
+ }
+
+ for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
+ {
+ asection *psrel;
+
+ psrel = elf_section_data (p->sec)->sreloc;
+ if (local_iplt->arm.noncall_refcount == 0)
+ elf32_arm_allocate_irelocs (info, psrel, p->count);
+ else
+ elf32_arm_allocate_dynrelocs (info, psrel, p->count);
+ }
+ }
if (*local_got > 0)
{
+ Elf_Internal_Sym *isym;
+
*local_got = s->size;
if (*local_tls_type & GOT_TLS_GD)
/* TLS_GD relocs need an 8-byte structure in the GOT. */
s->size += 8;
+ if (*local_tls_type & GOT_TLS_GDESC)
+ {
+ *local_tlsdesc_gotent = htab->root.sgotplt->size
+ - elf32_arm_compute_jump_table_size (htab);
+ htab->root.sgotplt->size += 8;
+ *local_got = (bfd_vma) -2;
+ /* plt.got_offset needs to know there's a TLS_DESC
+ reloc in the middle of .got.plt. */
+ htab->num_tls_desc++;
+ }
if (*local_tls_type & GOT_TLS_IE)
s->size += 4;
- if (*local_tls_type == GOT_NORMAL)
- s->size += 4;
- if (info->shared || *local_tls_type == GOT_TLS_GD)
- srel->size += RELOC_SIZE (htab);
+ if (*local_tls_type & GOT_NORMAL)
+ {
+ /* If the symbol is both GD and GDESC, *local_got
+ may have been overwritten. */
+ *local_got = s->size;
+ s->size += 4;
+ }
+
+ isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
+ if (isym == NULL)
+ return FALSE;
+
+ /* If all references to an STT_GNU_IFUNC PLT are calls,
+ then all non-call references, including this GOT entry,
+ resolve directly to the run-time target. */
+ if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
+ && (local_iplt == NULL
+ || local_iplt->arm.noncall_refcount == 0))
+ elf32_arm_allocate_irelocs (info, srel, 1);
+ else if (info->shared || output_bfd->flags & DYNAMIC)
+ {
+ if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
+ || *local_tls_type & GOT_TLS_GD)
+ elf32_arm_allocate_dynrelocs (info, srel, 1);
+
+ if (info->shared && *local_tls_type & GOT_TLS_GDESC)
+ {
+ elf32_arm_allocate_dynrelocs (info,
+ htab->root.srelplt, 1);
+ htab->tls_trampoline = -1;
+ }
+ }
}
else
*local_got = (bfd_vma) -1;
htab->tls_ldm_got.offset = htab->root.sgot->size;
htab->root.sgot->size += 8;
if (info->shared)
- htab->root.srelgot->size += RELOC_SIZE (htab);
+ elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
}
else
htab->tls_ldm_got.offset = -1;
/* Allocate global sym .plt and .got entries, and space for global
sym dynamic relocs. */
- elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
+ elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
/* Here we rummage through the found bfds to collect glue information. */
for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
|| !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
- /* xgettext:c-format */
- _bfd_error_handler (_("Errors encountered processing file %s"),
+ /* xgettext:c-format */
+ _bfd_error_handler (_("Errors encountered processing file %s"),
ibfd->filename);
}
/* Allocate space for the glue sections now that we've sized them. */
bfd_elf32_arm_allocate_interworking_sections (info);
+ /* For every jump slot reserved in the sgotplt, reloc_count is
+ incremented. However, when we reserve space for TLS descriptors,
+ it's not incremented, so in order to compute the space reserved
+ for them, it suffices to multiply the reloc count by the jump
+ slot size. */
+ if (htab->root.srelplt)
+ htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
+
+ if (htab->tls_trampoline)
+ {
+ if (htab->root.splt->size == 0)
+ htab->root.splt->size += htab->plt_header_size;
+
+ htab->tls_trampoline = htab->root.splt->size;
+ htab->root.splt->size += htab->plt_entry_size;
+
+ /* If we're not using lazy TLS relocations, don't generate the
+ PLT and GOT entries they require. */
+ if (!(info->flags & DF_BIND_NOW))
+ {
+ htab->dt_tlsdesc_got = htab->root.sgot->size;
+ htab->root.sgot->size += 4;
+
+ htab->dt_tlsdesc_plt = htab->root.splt->size;
+ htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
+ }
+ }
+
/* The check_relocs and adjust_dynamic_symbol entry points have
determined the sizes of the various dynamic sections. Allocate
memory for them. */
of the dynobj section names depend upon the input files. */
name = bfd_get_section_name (dynobj, s);
- if (strcmp (name, ".plt") == 0)
+ if (s == htab->root.splt)
{
/* Remember whether there is a PLT. */
plt = s->size != 0;
s->reloc_count = 0;
}
}
- else if (! CONST_STRNEQ (name, ".got")
- && strcmp (name, ".dynbss") != 0)
+ else if (s != htab->root.sgot
+ && s != htab->root.sgotplt
+ && s != htab->root.iplt
+ && s != htab->root.igotplt
+ && s != htab->sdynbss)
{
/* It's not one of our sections, so don't allocate space. */
continue;
htab->use_rel ? DT_REL : DT_RELA)
|| !add_dynamic_entry (DT_JMPREL, 0))
return FALSE;
+
+ if (htab->dt_tlsdesc_plt &&
+ (!add_dynamic_entry (DT_TLSDESC_PLT,0)
+ || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
+ return FALSE;
}
if (relocs)
return TRUE;
}
-/* Finish up dynamic symbol handling. We set the contents of various
- dynamic sections here. */
+/* Size sections even though they're not dynamic. We use it to setup
+ _TLS_MODULE_BASE_, if needed. */
static bfd_boolean
-elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
- struct bfd_link_info * info,
- struct elf_link_hash_entry * h,
- Elf_Internal_Sym * sym)
+elf32_arm_always_size_sections (bfd *output_bfd,
+ struct bfd_link_info *info)
{
- struct elf32_arm_link_hash_table *htab;
- struct elf32_arm_link_hash_entry *eh;
+ asection *tls_sec;
- htab = elf32_arm_hash_table (info);
- if (htab == NULL)
- return FALSE;
+ if (info->relocatable)
+ return TRUE;
- eh = (struct elf32_arm_link_hash_entry *) h;
+ tls_sec = elf_hash_table (info)->tls_sec;
- if (h->plt.offset != (bfd_vma) -1)
+ if (tls_sec)
{
- asection * splt;
- asection * srel;
- bfd_byte *loc;
- bfd_vma plt_index;
- Elf_Internal_Rela rel;
-
- /* This symbol has an entry in the procedure linkage table. Set
- it up. */
-
- BFD_ASSERT (h->dynindx != -1);
+ struct elf_link_hash_entry *tlsbase;
- splt = htab->root.splt;
- srel = htab->root.srelplt;
- BFD_ASSERT (splt != NULL && srel != NULL);
+ tlsbase = elf_link_hash_lookup
+ (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
- /* Fill in the entry in the procedure linkage table. */
- if (htab->symbian_p)
- {
- put_arm_insn (htab, output_bfd,
- elf32_arm_symbian_plt_entry[0],
- splt->contents + h->plt.offset);
- bfd_put_32 (output_bfd,
- elf32_arm_symbian_plt_entry[1],
- splt->contents + h->plt.offset + 4);
-
- /* Fill in the entry in the .rel.plt section. */
- rel.r_offset = (splt->output_section->vma
- + splt->output_offset
- + h->plt.offset + 4);
- rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
-
- /* Get the index in the procedure linkage table which
- corresponds to this symbol. This is the index of this symbol
- in all the symbols for which we are making plt entries. The
- first entry in the procedure linkage table is reserved. */
- plt_index = ((h->plt.offset - htab->plt_header_size)
- / htab->plt_entry_size);
- }
- else
+ if (tlsbase)
{
- bfd_vma got_offset, got_address, plt_address;
- bfd_vma got_displacement;
- asection * sgot;
- bfd_byte * ptr;
-
- sgot = htab->root.sgotplt;
- BFD_ASSERT (sgot != NULL);
-
- /* Get the offset into the .got.plt table of the entry that
- corresponds to this function. */
- got_offset = eh->plt_got_offset;
-
- /* Get the index in the procedure linkage table which
- corresponds to this symbol. This is the index of this symbol
- in all the symbols for which we are making plt entries. The
- first three entries in .got.plt are reserved; after that
- symbols appear in the same order as in .plt. */
- plt_index = (got_offset - 12) / 4;
-
- /* Calculate the address of the GOT entry. */
- got_address = (sgot->output_section->vma
- + sgot->output_offset
- + got_offset);
-
- /* ...and the address of the PLT entry. */
- plt_address = (splt->output_section->vma
- + splt->output_offset
- + h->plt.offset);
-
- ptr = splt->contents + h->plt.offset;
- if (htab->vxworks_p && info->shared)
- {
- unsigned int i;
- bfd_vma val;
-
- for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
- {
- val = elf32_arm_vxworks_shared_plt_entry[i];
- if (i == 2)
- val |= got_address - sgot->output_section->vma;
- if (i == 5)
- val |= plt_index * RELOC_SIZE (htab);
- if (i == 2 || i == 5)
- bfd_put_32 (output_bfd, val, ptr);
- else
- put_arm_insn (htab, output_bfd, val, ptr);
- }
- }
- else if (htab->vxworks_p)
- {
- unsigned int i;
- bfd_vma val;
-
- for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
- {
- val = elf32_arm_vxworks_exec_plt_entry[i];
- if (i == 2)
- val |= got_address;
- if (i == 4)
- val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
- if (i == 5)
- val |= plt_index * RELOC_SIZE (htab);
- if (i == 2 || i == 5)
- bfd_put_32 (output_bfd, val, ptr);
- else
- put_arm_insn (htab, output_bfd, val, ptr);
- }
-
- loc = (htab->srelplt2->contents
- + (plt_index * 2 + 1) * RELOC_SIZE (htab));
-
- /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
- referencing the GOT for this PLT entry. */
- rel.r_offset = plt_address + 8;
- rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
- rel.r_addend = got_offset;
- SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
- loc += RELOC_SIZE (htab);
-
- /* Create the R_ARM_ABS32 relocation referencing the
- beginning of the PLT for this GOT entry. */
- rel.r_offset = got_address;
- rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
- rel.r_addend = 0;
- SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
- }
- else
- {
- bfd_signed_vma thumb_refs;
- /* Calculate the displacement between the PLT slot and the
- entry in the GOT. The eight-byte offset accounts for the
- value produced by adding to pc in the first instruction
- of the PLT stub. */
- got_displacement = got_address - (plt_address + 8);
+ struct bfd_link_hash_entry *bh = NULL;
+ const struct elf_backend_data *bed
+ = get_elf_backend_data (output_bfd);
+
+ if (!(_bfd_generic_link_add_one_symbol
+ (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
+ tls_sec, 0, NULL, FALSE,
+ bed->collect, &bh)))
+ return FALSE;
- BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
+ tlsbase->type = STT_TLS;
+ tlsbase = (struct elf_link_hash_entry *)bh;
+ tlsbase->def_regular = 1;
+ tlsbase->other = STV_HIDDEN;
+ (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
+ }
+ }
+ return TRUE;
+}
- thumb_refs = eh->plt_thumb_refcount;
- if (!htab->use_blx)
- thumb_refs += eh->plt_maybe_thumb_refcount;
+/* Finish up dynamic symbol handling. We set the contents of various
+ dynamic sections here. */
- if (thumb_refs > 0)
- {
- put_thumb_insn (htab, output_bfd,
- elf32_arm_plt_thumb_stub[0], ptr - 4);
- put_thumb_insn (htab, output_bfd,
- elf32_arm_plt_thumb_stub[1], ptr - 2);
- }
+static bfd_boolean
+elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
+ struct bfd_link_info * info,
+ struct elf_link_hash_entry * h,
+ Elf_Internal_Sym * sym)
+{
+ struct elf32_arm_link_hash_table *htab;
+ struct elf32_arm_link_hash_entry *eh;
- put_arm_insn (htab, output_bfd,
- elf32_arm_plt_entry[0]
- | ((got_displacement & 0x0ff00000) >> 20),
- ptr + 0);
- put_arm_insn (htab, output_bfd,
- elf32_arm_plt_entry[1]
- | ((got_displacement & 0x000ff000) >> 12),
- ptr+ 4);
- put_arm_insn (htab, output_bfd,
- elf32_arm_plt_entry[2]
- | (got_displacement & 0x00000fff),
- ptr + 8);
-#ifdef FOUR_WORD_PLT
- bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
-#endif
- }
+ htab = elf32_arm_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
- /* Fill in the entry in the global offset table. */
- bfd_put_32 (output_bfd,
- (splt->output_section->vma
- + splt->output_offset),
- sgot->contents + got_offset);
+ eh = (struct elf32_arm_link_hash_entry *) h;
- /* Fill in the entry in the .rel(a).plt section. */
- rel.r_addend = 0;
- rel.r_offset = got_address;
- rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
+ if (h->plt.offset != (bfd_vma) -1)
+ {
+ if (!eh->is_iplt)
+ {
+ BFD_ASSERT (h->dynindx != -1);
+ elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
+ h->dynindx, 0);
}
- loc = srel->contents + plt_index * RELOC_SIZE (htab);
- SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
-
if (!h->def_regular)
{
/* Mark the symbol as undefined, rather than as defined in
if (!h->ref_regular_nonweak)
sym->st_value = 0;
}
- }
-
- if (h->got.offset != (bfd_vma) -1
- && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
- && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
- {
- asection * sgot;
- asection * srel;
- Elf_Internal_Rela rel;
- bfd_byte *loc;
- bfd_vma offset;
-
- /* This symbol has an entry in the global offset table. Set it
- up. */
- sgot = htab->root.sgot;
- srel = htab->root.srelgot;
- BFD_ASSERT (sgot != NULL && srel != NULL);
-
- offset = (h->got.offset & ~(bfd_vma) 1);
- rel.r_addend = 0;
- rel.r_offset = (sgot->output_section->vma
- + sgot->output_offset
- + offset);
-
- /* If this is a static link, or it is a -Bsymbolic link and the
- symbol is defined locally or was forced to be local because
- of a version file, we just want to emit a RELATIVE reloc.
- The entry in the global offset table will already have been
- initialized in the relocate_section function. */
- if (info->shared
- && SYMBOL_REFERENCES_LOCAL (info, h))
- {
- BFD_ASSERT ((h->got.offset & 1) != 0);
- rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
- if (!htab->use_rel)
- {
- rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
- bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
- }
- }
- else
+ else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
{
- BFD_ASSERT ((h->got.offset & 1) == 0);
- bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
- rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
+ /* At least one non-call relocation references this .iplt entry,
+ so the .iplt entry is the function's canonical address. */
+ sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
+ sym->st_target_internal = ST_BRANCH_TO_ARM;
+ sym->st_shndx = (_bfd_elf_section_from_bfd_section
+ (output_bfd, htab->root.iplt->output_section));
+ sym->st_value = (h->plt.offset
+ + htab->root.iplt->output_section->vma
+ + htab->root.iplt->output_offset);
}
-
- loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
- SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
}
if (h->needs_copy)
{
asection * s;
Elf_Internal_Rela rel;
- bfd_byte *loc;
/* This symbol needs a copy reloc. Set it up. */
BFD_ASSERT (h->dynindx != -1
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
- loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
- SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
+ elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
}
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
to the ".got" section. */
- if (strcmp (h->root.root.string, "_DYNAMIC") == 0
+ if (h == htab->root.hdynamic
|| (!htab->vxworks_p && h == htab->root.hgot))
sym->st_shndx = SHN_ABS;
return TRUE;
}
+static void
+arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
+ void *contents,
+ const unsigned long *template, unsigned count)
+{
+ unsigned ix;
+
+ for (ix = 0; ix != count; ix++)
+ {
+ unsigned long insn = template[ix];
+
+ /* Emit mov pc,rx if bx is not permitted. */
+ if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
+ insn = (insn & 0xf000000f) | 0x01a0f000;
+ put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
+ }
+}
+
+/* Install the special first PLT entry for elf32-arm-nacl. Unlike
+ other variants, NaCl needs this entry in a static executable's
+ .iplt too. When we're handling that case, GOT_DISPLACEMENT is
+ zero. For .iplt really only the last bundle is useful, and .iplt
+ could have a shorter first entry, with each individual PLT entry's
+ relative branch calculated differently so it targets the last
+ bundle instead of the instruction before it (labelled .Lplt_tail
+ above). But it's simpler to keep the size and layout of PLT0
+ consistent with the dynamic case, at the cost of some dead code at
+ the start of .iplt and the one dead store to the stack at the start
+ of .Lplt_tail. */
+static void
+arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
+ asection *plt, bfd_vma got_displacement)
+{
+ unsigned int i;
+
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_nacl_plt0_entry[0]
+ | arm_movw_immediate (got_displacement),
+ plt->contents + 0);
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_nacl_plt0_entry[1]
+ | arm_movt_immediate (got_displacement),
+ plt->contents + 4);
+
+ for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
+ put_arm_insn (htab, output_bfd,
+ elf32_arm_nacl_plt0_entry[i],
+ plt->contents + (i * 4));
+}
+
/* Finish up the dynamic sections. */
static bfd_boolean
dynobj = elf_hash_table (info)->dynobj;
sgot = htab->root.sgotplt;
- BFD_ASSERT (htab->symbian_p || sgot != NULL);
- sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
+ /* A broken linker script might have discarded the dynamic sections.
+ Catch this here so that we do not seg-fault later on. */
+ if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
+ return FALSE;
+ sdyn = bfd_get_linker_section (dynobj, ".dynamic");
if (elf_hash_table (info)->dynamic_sections_created)
{
splt = htab->root.splt;
BFD_ASSERT (splt != NULL && sdyn != NULL);
+ BFD_ASSERT (htab->symbian_p || sgot != NULL);
dyncon = (Elf32_External_Dyn *) sdyn->contents;
dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
name = RELOC_SECTION (htab, ".plt");
get_vma:
s = bfd_get_section_by_name (output_bfd, name);
- BFD_ASSERT (s != NULL);
+ if (s == NULL)
+ {
+ /* PR ld/14397: Issue an error message if a required section is missing. */
+ (*_bfd_error_handler)
+ (_("error: required section '%s' not found in the linker script"), name);
+ bfd_set_error (bfd_error_invalid_operation);
+ return FALSE;
+ }
if (!htab->symbian_p)
dyn.d_un.d_ptr = s->vma;
else
}
break;
+ case DT_TLSDESC_PLT:
+ s = htab->root.splt;
+ dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
+ + htab->dt_tlsdesc_plt);
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+
+ case DT_TLSDESC_GOT:
+ s = htab->root.sgot;
+ dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
+ + htab->dt_tlsdesc_got);
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+
/* Set the bottom bit of DT_INIT/FINI if the
corresponding function is Thumb. */
case DT_INIT:
eh = elf_link_hash_lookup (elf_hash_table (info), name,
FALSE, FALSE, TRUE);
- if (eh != NULL
- && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
+ if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
{
dyn.d_un.d_val |= 1;
bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
SWAP_RELOC_OUT (htab) (output_bfd, &rel,
htab->srelplt2->contents);
}
+ else if (htab->nacl_p)
+ arm_nacl_put_plt0 (htab, output_bfd, splt,
+ got_address + 8 - (plt_address + 16));
else
{
got_displacement = got_address - (plt_address + 16);
if (splt->output_section->owner == output_bfd)
elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
+ if (htab->dt_tlsdesc_plt)
+ {
+ bfd_vma got_address
+ = sgot->output_section->vma + sgot->output_offset;
+ bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
+ + htab->root.sgot->output_offset);
+ bfd_vma plt_address
+ = splt->output_section->vma + splt->output_offset;
+
+ arm_put_trampoline (htab, output_bfd,
+ splt->contents + htab->dt_tlsdesc_plt,
+ dl_tlsdesc_lazy_trampoline, 6);
+
+ bfd_put_32 (output_bfd,
+ gotplt_address + htab->dt_tlsdesc_got
+ - (plt_address + htab->dt_tlsdesc_plt)
+ - dl_tlsdesc_lazy_trampoline[6],
+ splt->contents + htab->dt_tlsdesc_plt + 24);
+ bfd_put_32 (output_bfd,
+ got_address - (plt_address + htab->dt_tlsdesc_plt)
+ - dl_tlsdesc_lazy_trampoline[7],
+ splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
+ }
+
+ if (htab->tls_trampoline)
+ {
+ arm_put_trampoline (htab, output_bfd,
+ splt->contents + htab->tls_trampoline,
+ tls_trampoline, 3);
+#ifdef FOUR_WORD_PLT
+ bfd_put_32 (output_bfd, 0x00000000,
+ splt->contents + htab->tls_trampoline + 12);
+#endif
+ }
+
if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
{
/* Correct the .rel(a).plt.unloaded relocations. They will have
}
}
+ if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
+ /* NaCl uses a special first entry in .iplt too. */
+ arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
+
/* Fill in the first three entries in the global offset table. */
if (sgot)
{
if (globals != NULL && globals->byteswap_code)
i_ehdrp->e_flags |= EF_ARM_BE8;
}
+
+ if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
+ && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
+ {
+ int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
+ if (abi)
+ i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
+ else
+ i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
+ }
}
static enum elf_reloc_type_class
-elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
+elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ const asection *rel_sec ATTRIBUTE_UNUSED,
+ const Elf_Internal_Rela *rela)
{
switch ((int) ELF32_R_TYPE (rela->r_info))
{
}
}
-/* Set the right machine number for an Arm ELF file. */
-
-static bfd_boolean
-elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
-{
- if (hdr->sh_type == SHT_NOTE)
- *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
-
- return TRUE;
-}
-
static void
elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
{
typedef struct
{
- void *finfo;
+ void *flaginfo;
struct bfd_link_info *info;
asection *sec;
int sec_shndx;
sym.st_other = 0;
sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
sym.st_shndx = osi->sec_shndx;
+ sym.st_target_internal = 0;
elf32_arm_section_map_add (osi->sec, names[type][1], offset);
- return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
+ return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
}
-
-/* Output mapping symbols for PLT entries associated with H. */
+/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
+ IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
static bfd_boolean
-elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
+elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
+ bfd_boolean is_iplt_entry_p,
+ union gotplt_union *root_plt,
+ struct arm_plt_info *arm_plt)
{
- output_arch_syminfo *osi = (output_arch_syminfo *) inf;
struct elf32_arm_link_hash_table *htab;
- struct elf32_arm_link_hash_entry *eh;
- bfd_vma addr;
-
- if (h->root.type == bfd_link_hash_indirect)
- return TRUE;
-
- if (h->root.type == bfd_link_hash_warning)
- /* When warning symbols are created, they **replace** the "real"
- entry in the hash table, thus we never get to see the real
- symbol in a hash traversal. So look at it now. */
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
+ bfd_vma addr, plt_header_size;
- if (h->plt.offset == (bfd_vma) -1)
+ if (root_plt->offset == (bfd_vma) -1)
return TRUE;
htab = elf32_arm_hash_table (osi->info);
if (htab == NULL)
return FALSE;
- eh = (struct elf32_arm_link_hash_entry *) h;
- addr = h->plt.offset;
+ if (is_iplt_entry_p)
+ {
+ osi->sec = htab->root.iplt;
+ plt_header_size = 0;
+ }
+ else
+ {
+ osi->sec = htab->root.splt;
+ plt_header_size = htab->plt_header_size;
+ }
+ osi->sec_shndx = (_bfd_elf_section_from_bfd_section
+ (osi->info->output_bfd, osi->sec->output_section));
+
+ addr = root_plt->offset & -2;
if (htab->symbian_p)
{
if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
return FALSE;
}
+ else if (htab->nacl_p)
+ {
+ if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
+ return FALSE;
+ }
else
{
- bfd_signed_vma thumb_refs;
+ bfd_boolean thumb_stub_p;
- thumb_refs = eh->plt_thumb_refcount;
- if (!htab->use_blx)
- thumb_refs += eh->plt_maybe_thumb_refcount;
-
- if (thumb_refs > 0)
+ thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
+ if (thumb_stub_p)
{
if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
return FALSE;
/* A three-word PLT with no Thumb thunk contains only Arm code,
so only need to output a mapping symbol for the first PLT entry and
entries with thumb thunks. */
- if (thumb_refs > 0 || addr == 20)
+ if (thumb_stub_p || addr == plt_header_size)
{
if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
return FALSE;
return TRUE;
}
+/* Output mapping symbols for PLT entries associated with H. */
+
+static bfd_boolean
+elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
+{
+ output_arch_syminfo *osi = (output_arch_syminfo *) inf;
+ struct elf32_arm_link_hash_entry *eh;
+
+ if (h->root.type == bfd_link_hash_indirect)
+ return TRUE;
+
+ if (h->root.type == bfd_link_hash_warning)
+ /* When warning symbols are created, they **replace** the "real"
+ entry in the hash table, thus we never get to see the real
+ symbol in a hash traversal. So look at it now. */
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
+
+ eh = (struct elf32_arm_link_hash_entry *) h;
+ return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
+ &h->plt, &eh->plt);
+}
+
/* Output a single local symbol for a generated stub. */
static bfd_boolean
sym.st_other = 0;
sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
sym.st_shndx = osi->sec_shndx;
- return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
+ sym.st_target_internal = 0;
+ return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
}
static bfd_boolean
static bfd_boolean
elf32_arm_output_arch_local_syms (bfd *output_bfd,
struct bfd_link_info *info,
- void *finfo,
+ void *flaginfo,
int (*func) (void *, const char *,
Elf_Internal_Sym *,
asection *,
check_use_blx (htab);
- osi.finfo = finfo;
+ osi.flaginfo = flaginfo;
osi.info = info;
osi.func = func;
== SEC_HAS_CONTENTS
&& get_arm_elf_section_data (osi.sec) != NULL
&& get_arm_elf_section_data (osi.sec)->mapcount == 0
- && osi.sec->size > 0)
+ && osi.sec->size > 0
+ && (osi.sec->flags & SEC_EXCLUDE) == 0)
{
osi.sec_shndx = _bfd_elf_section_from_bfd_section
(output_bfd, osi.sec->output_section);
/* ARM->Thumb glue. */
if (htab->arm_glue_size > 0)
{
- osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
- ARM2THUMB_GLUE_SECTION_NAME);
+ osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
+ ARM2THUMB_GLUE_SECTION_NAME);
osi.sec_shndx = _bfd_elf_section_from_bfd_section
(output_bfd, osi.sec->output_section);
/* Thumb->ARM glue. */
if (htab->thumb_glue_size > 0)
{
- osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
- THUMB2ARM_GLUE_SECTION_NAME);
+ osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
+ THUMB2ARM_GLUE_SECTION_NAME);
osi.sec_shndx = _bfd_elf_section_from_bfd_section
(output_bfd, osi.sec->output_section);
/* ARMv4 BX veneers. */
if (htab->bx_glue_size > 0)
{
- osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
- ARM_BX_GLUE_SECTION_NAME);
+ osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
+ ARM_BX_GLUE_SECTION_NAME);
osi.sec_shndx = _bfd_elf_section_from_bfd_section
(output_bfd, osi.sec->output_section);
}
/* Finally, output mapping symbols for the PLT. */
- if (!htab->root.splt || htab->root.splt->size == 0)
- return TRUE;
-
- osi.sec = htab->root.splt;
- osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
- osi.sec->output_section);
- /* Output mapping symbols for the plt header. SymbianOS does not have a
- plt header. */
- if (htab->vxworks_p)
+ if (htab->root.splt && htab->root.splt->size > 0)
{
- /* VxWorks shared libraries have no PLT header. */
- if (!info->shared)
+ osi.sec = htab->root.splt;
+ osi.sec_shndx = (_bfd_elf_section_from_bfd_section
+ (output_bfd, osi.sec->output_section));
+
+ /* Output mapping symbols for the plt header. SymbianOS does not have a
+ plt header. */
+ if (htab->vxworks_p)
+ {
+ /* VxWorks shared libraries have no PLT header. */
+ if (!info->shared)
+ {
+ if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
+ return FALSE;
+ if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
+ return FALSE;
+ }
+ }
+ else if (htab->nacl_p)
+ {
+ if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
+ return FALSE;
+ }
+ else if (!htab->symbian_p)
{
if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
return FALSE;
- if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
+#ifndef FOUR_WORD_PLT
+ if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
return FALSE;
+#endif
}
}
- else if (!htab->symbian_p)
+ if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
{
+ /* NaCl uses a special first entry in .iplt too. */
+ osi.sec = htab->root.iplt;
+ osi.sec_shndx = (_bfd_elf_section_from_bfd_section
+ (output_bfd, osi.sec->output_section));
if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
return FALSE;
-#ifndef FOUR_WORD_PLT
- if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
+ }
+ if ((htab->root.splt && htab->root.splt->size > 0)
+ || (htab->root.iplt && htab->root.iplt->size > 0))
+ {
+ elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
+ for (input_bfd = info->input_bfds;
+ input_bfd != NULL;
+ input_bfd = input_bfd->link_next)
+ {
+ struct arm_local_iplt_info **local_iplt;
+ unsigned int i, num_syms;
+
+ local_iplt = elf32_arm_local_iplt (input_bfd);
+ if (local_iplt != NULL)
+ {
+ num_syms = elf_symtab_hdr (input_bfd).sh_info;
+ for (i = 0; i < num_syms; i++)
+ if (local_iplt[i] != NULL
+ && !elf32_arm_output_plt_map_1 (&osi, TRUE,
+ &local_iplt[i]->root,
+ &local_iplt[i]->arm))
+ return FALSE;
+ }
+ }
+ }
+ if (htab->dt_tlsdesc_plt != 0)
+ {
+ /* Mapping symbols for the lazy tls trampoline. */
+ if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
+ return FALSE;
+
+ if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
+ htab->dt_tlsdesc_plt + 24))
+ return FALSE;
+ }
+ if (htab->tls_trampoline != 0)
+ {
+ /* Mapping symbols for the tls trampoline. */
+ if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
+ return FALSE;
+#ifdef FOUR_WORD_PLT
+ if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
+ htab->tls_trampoline + 12))
return FALSE;
#endif
}
- elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
return TRUE;
}
{
unsigned long first_word = bfd_get_32 (output_bfd, from);
unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
-
+
/* High bit of first word is supposed to be zero. */
if ((first_word & 0x80000000ul) == 0)
first_word = offset_prel31 (first_word, offset);
-
+
/* If the high bit of the first word is clear, and the bit pattern is not 0x1
(EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
second_word = offset_prel31 (second_word, offset);
-
+
bfd_put_32 (output_bfd, first_word, to);
bfd_put_32 (output_bfd, second_word, to + 4);
}
/* Data for make_branch_to_a8_stub(). */
-struct a8_branch_to_stub_data {
+struct a8_branch_to_stub_data
+{
asection *writing_section;
bfd_byte *contents;
};
static bfd_boolean
make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
- void *in_arg)
+ void *in_arg)
{
struct elf32_arm_stub_hash_entry *stub_entry;
struct a8_branch_to_stub_data *data;
unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
for (errnode = arm_data->erratumlist; errnode != 0;
- errnode = errnode->next)
- {
- bfd_vma target = errnode->vma - offset;
-
- switch (errnode->type)
- {
- case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
- {
- bfd_vma branch_to_veneer;
- /* Original condition code of instruction, plus bit mask for
- ARM B instruction. */
- unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
- | 0x0a000000;
+ errnode = errnode->next)
+ {
+ bfd_vma target = errnode->vma - offset;
+
+ switch (errnode->type)
+ {
+ case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
+ {
+ bfd_vma branch_to_veneer;
+ /* Original condition code of instruction, plus bit mask for
+ ARM B instruction. */
+ unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
+ | 0x0a000000;
/* The instruction is before the label. */
target -= 4;
/* Above offset included in -4 below. */
branch_to_veneer = errnode->u.b.veneer->vma
- - errnode->vma - 4;
+ - errnode->vma - 4;
if ((signed) branch_to_veneer < -(1 << 25)
|| (signed) branch_to_veneer >= (1 << 25))
(*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
"range"), output_bfd);
- insn |= (branch_to_veneer >> 2) & 0xffffff;
- contents[endianflip ^ target] = insn & 0xff;
- contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
- contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
- contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
- }
- break;
+ insn |= (branch_to_veneer >> 2) & 0xffffff;
+ contents[endianflip ^ target] = insn & 0xff;
+ contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
+ contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
+ contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
+ }
+ break;
case VFP11_ERRATUM_ARM_VENEER:
- {
- bfd_vma branch_from_veneer;
- unsigned int insn;
+ {
+ bfd_vma branch_from_veneer;
+ unsigned int insn;
- /* Take size of veneer into account. */
- branch_from_veneer = errnode->u.v.branch->vma
- - errnode->vma - 12;
+ /* Take size of veneer into account. */
+ branch_from_veneer = errnode->u.v.branch->vma
+ - errnode->vma - 12;
if ((signed) branch_from_veneer < -(1 << 25)
|| (signed) branch_from_veneer >= (1 << 25))
(*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
"range"), output_bfd);
- /* Original instruction. */
- insn = errnode->u.v.branch->u.b.vfp_insn;
- contents[endianflip ^ target] = insn & 0xff;
- contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
- contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
- contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
-
- /* Branch back to insn after original insn. */
- insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
- contents[endianflip ^ (target + 4)] = insn & 0xff;
- contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
- contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
- contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
- }
- break;
+ /* Original instruction. */
+ insn = errnode->u.v.branch->u.b.vfp_insn;
+ contents[endianflip ^ target] = insn & 0xff;
+ contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
+ contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
+ contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
+
+ /* Branch back to insn after original insn. */
+ insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
+ contents[endianflip ^ (target + 4)] = insn & 0xff;
+ contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
+ contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
+ contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
+ }
+ break;
- default:
- abort ();
- }
- }
+ default:
+ abort ();
+ }
+ }
}
if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
{
arm_unwind_table_edit *edit_node
- = arm_data->u.exidx.unwind_edit_list;
+ = arm_data->u.exidx.unwind_edit_list;
/* Now, sec->size is the size of the section we will write. The original
- size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
+ size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
markers) was sec->rawsize. (This isn't the case if we perform no
edits, then rawsize will be zero and we should use size). */
bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
bfd_vma add_to_offsets = 0;
for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
- {
+ {
if (edit_node)
{
unsigned int edit_index = edit_node->index;
-
+
if (in_index < edit_index && in_index * 8 < input_size)
- {
+ {
copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
contents + in_index * 8, add_to_offsets);
out_index++;
else if (in_index == edit_index
|| (in_index * 8 >= input_size
&& edit_index == UINT_MAX))
- {
+ {
switch (edit_node->type)
{
case DELETE_EXIDX_ENTRY:
in_index++;
add_to_offsets += 8;
break;
-
+
case INSERT_EXIDX_CANTUNWIND_AT_END:
{
- asection *text_sec = edit_node->linked_section;
+ asection *text_sec = edit_node->linked_section;
bfd_vma text_offset = text_sec->output_section->vma
+ text_sec->output_offset
+ text_sec->size;
bfd_vma exidx_offset = offset + out_index * 8;
- unsigned long prel31_offset;
+ unsigned long prel31_offset;
/* Note: this is meant to be equivalent to an
R_ARM_PREL31 relocation. These synthetic
}
break;
}
-
+
edit_node = edit_node->next;
}
}
ptr = map[0].vma;
for (i = 0; i < mapcount; i++)
- {
- if (i == mapcount - 1)
+ {
+ if (i == mapcount - 1)
end = sec->size;
- else
- end = map[i + 1].vma;
+ else
+ end = map[i + 1].vma;
- switch (map[i].type)
+ switch (map[i].type)
{
case 'a':
/* Byte swap code words. */
while (ptr + 3 < end)
- {
- tmp = contents[ptr];
- contents[ptr] = contents[ptr + 3];
- contents[ptr + 3] = tmp;
- tmp = contents[ptr + 1];
- contents[ptr + 1] = contents[ptr + 2];
- contents[ptr + 2] = tmp;
- ptr += 4;
- }
+ {
+ tmp = contents[ptr];
+ contents[ptr] = contents[ptr + 3];
+ contents[ptr + 3] = tmp;
+ tmp = contents[ptr + 1];
+ contents[ptr + 1] = contents[ptr + 2];
+ contents[ptr + 2] = tmp;
+ ptr += 4;
+ }
break;
case 't':
/* Byte swap code halfwords. */
while (ptr + 1 < end)
- {
- tmp = contents[ptr];
- contents[ptr] = contents[ptr + 1];
- contents[ptr + 1] = tmp;
- ptr += 2;
- }
+ {
+ tmp = contents[ptr];
+ contents[ptr] = contents[ptr + 1];
+ contents[ptr + 1] = tmp;
+ ptr += 2;
+ }
break;
case 'd':
/* Leave data alone. */
break;
}
- ptr = end;
- }
+ ptr = end;
+ }
}
free (map);
return FALSE;
}
-/* Display STT_ARM_TFUNC symbols as functions. */
-
-static void
-elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
- asymbol *asym)
-{
- elf_symbol_type *elfsym = (elf_symbol_type *) asym;
-
- if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
- elfsym->symbol.flags |= BSF_FUNCTION;
-}
-
-
/* Mangle thumb function symbols as we read them in. */
static bfd_boolean
return FALSE;
/* New EABI objects mark thumb function symbols by setting the low bit of
- the address. Turn these into STT_ARM_TFUNC. */
- if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
- && (dst->st_value & 1))
+ the address. */
+ if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
+ || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
+ {
+ if (dst->st_value & 1)
+ {
+ dst->st_value &= ~(bfd_vma) 1;
+ dst->st_target_internal = ST_BRANCH_TO_THUMB;
+ }
+ else
+ dst->st_target_internal = ST_BRANCH_TO_ARM;
+ }
+ else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
{
- dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
- dst->st_value &= ~(bfd_vma) 1;
+ dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
+ dst->st_target_internal = ST_BRANCH_TO_THUMB;
}
+ else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
+ dst->st_target_internal = ST_BRANCH_LONG;
+ else
+ dst->st_target_internal = ST_BRANCH_UNKNOWN;
+
return TRUE;
}
of the address set, as per the new EABI. We do this unconditionally
because objcopy does not set the elf header flags until after
it writes out the symbol table. */
- if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
+ if (src->st_target_internal == ST_BRANCH_TO_THUMB)
{
newsym = *src;
- newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
+ if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
+ newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
if (newsym.st_shndx != SHN_UNDEF)
- {
- /* Do this only for defined symbols. At link type, the static
- linker will simulate the work of dynamic linker of resolving
- symbols and will carry over the thumbness of found symbols to
- the output symbol table. It's not clear how it happens, but
- the thumbness of undefined symbols can well be different at
- runtime, and writing '1' for them will be confusing for users
- and possibly for dynamic linker itself.
- */
- newsym.st_value |= 1;
- }
+ {
+ /* Do this only for defined symbols. At link type, the static
+ linker will simulate the work of dynamic linker of resolving
+ symbols and will carry over the thumbness of found symbols to
+ the output symbol table. It's not clear how it happens, but
+ the thumbness of undefined symbols can well be different at
+ runtime, and writing '1' for them will be confusing for users
+ and possibly for dynamic linker itself.
+ */
+ newsym.st_value |= 1;
+ }
src = &newsym;
}
/* If there is already a PT_ARM_EXIDX header, then we do not
want to add another one. This situation arises when running
"strip"; the input binary already has the header. */
- m = elf_tdata (abfd)->segment_map;
+ m = elf_seg_map (abfd);
while (m && m->p_type != PT_ARM_EXIDX)
m = m->next;
if (!m)
{
m = (struct elf_segment_map *)
- bfd_zalloc (abfd, sizeof (struct elf_segment_map));
+ bfd_zalloc (abfd, sizeof (struct elf_segment_map));
if (m == NULL)
return FALSE;
m->p_type = PT_ARM_EXIDX;
m->count = 1;
m->sections[0] = sec;
- m->next = elf_tdata (abfd)->segment_map;
- elf_tdata (abfd)->segment_map = m;
+ m->next = elf_seg_map (abfd);
+ elf_seg_map (abfd) = m;
}
}
return 0;
}
-/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
+/* Hook called by the linker routine which adds symbols from an object
+ file. */
static bfd_boolean
-elf32_arm_is_function_type (unsigned int type)
-{
- return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
+elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
+ Elf_Internal_Sym *sym, const char **namep,
+ flagword *flagsp, asection **secp, bfd_vma *valp)
+{
+ if ((abfd->flags & DYNAMIC) == 0
+ && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
+ || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
+ elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
+
+ if (elf32_arm_hash_table (info)->vxworks_p
+ && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
+ flagsp, secp, valp))
+ return FALSE;
+
+ return TRUE;
}
/* We use this to override swap_symbol_in and swap_symbol_out. */
#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
-#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
+#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
+#define elf_backend_always_size_sections elf32_arm_always_size_sections
#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
#define elf_backend_post_process_headers elf32_arm_post_process_headers
#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
#define elf_backend_object_p elf32_arm_object_p
-#define elf_backend_section_flags elf32_arm_section_flags
#define elf_backend_fake_sections elf32_arm_fake_sections
#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
#define elf_backend_final_write_processing elf32_arm_final_write_processing
#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
-#define elf_backend_symbol_processing elf32_arm_symbol_processing
#define elf_backend_size_info elf32_arm_size_info
#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
-#define elf_backend_is_function_type elf32_arm_is_function_type
+#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
#define elf_backend_can_refcount 1
#define elf_backend_can_gc_sections 1
#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
#undef elf_backend_obj_attrs_section_type
#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
-#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
-#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
+#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
+#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
+
+#include "elf32-target.h"
+
+/* Native Client targets. */
+
+#undef TARGET_LITTLE_SYM
+#define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
+#undef TARGET_LITTLE_NAME
+#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
+#undef TARGET_BIG_SYM
+#define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
+#undef TARGET_BIG_NAME
+#define TARGET_BIG_NAME "elf32-bigarm-nacl"
+
+/* Like elf32_arm_link_hash_table_create -- but overrides
+ appropriately for NaCl. */
+
+static struct bfd_link_hash_table *
+elf32_arm_nacl_link_hash_table_create (bfd *abfd)
+{
+ struct bfd_link_hash_table *ret;
+
+ ret = elf32_arm_link_hash_table_create (abfd);
+ if (ret)
+ {
+ struct elf32_arm_link_hash_table *htab
+ = (struct elf32_arm_link_hash_table *) ret;
+
+ htab->nacl_p = 1;
+
+ htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
+ htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
+ }
+ return ret;
+}
+
+/* Since NaCl doesn't use the ARM-specific unwind format, we don't
+ really need to use elf32_arm_modify_segment_map. But we do it
+ anyway just to reduce gratuitous differences with the stock ARM backend. */
+
+static bfd_boolean
+elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
+{
+ return (elf32_arm_modify_segment_map (abfd, info)
+ && nacl_modify_segment_map (abfd, info));
+}
+
+#undef elf32_bed
+#define elf32_bed elf32_arm_nacl_bed
+#undef bfd_elf32_bfd_link_hash_table_create
+#define bfd_elf32_bfd_link_hash_table_create \
+ elf32_arm_nacl_link_hash_table_create
+#undef elf_backend_plt_alignment
+#define elf_backend_plt_alignment 4
+#undef elf_backend_modify_segment_map
+#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
+#undef elf_backend_modify_program_headers
+#define elf_backend_modify_program_headers nacl_modify_program_headers
+
+#undef ELF_MAXPAGESIZE
+#define ELF_MAXPAGESIZE 0x10000
#include "elf32-target.h"
+/* Reset to defaults. */
+#undef elf_backend_plt_alignment
+#undef elf_backend_modify_segment_map
+#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
+#undef elf_backend_modify_program_headers
+
/* VxWorks Targets. */
#undef TARGET_LITTLE_SYM
#undef bfd_elf32_bfd_link_hash_table_create
#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
-#undef elf_backend_add_symbol_hook
-#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
#undef elf_backend_final_write_processing
#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
#undef elf_backend_emit_relocs
bfd_boolean flags_compatible = TRUE;
asection *sec;
- /* Check if we have the same endianess. */
+ /* Check if we have the same endianness. */
if (! _bfd_generic_verify_endian_match (ibfd, obfd))
return FALSE;
flags then do not bother setting the flags for the output
architecture, instead allow future merges to do this. If no
future merges ever set these flags then they will retain their
- uninitialised values, which surprise surprise, correspond
- to the default values. */
+ uninitialised values, which surprise surprise, correspond
+ to the default values. */
if (bfd_get_arch_info (ibfd)->the_default
&& elf_elfheader (ibfd)->e_flags == 0)
return TRUE;
if ((bfd_get_section_flags (ibfd, sec)
& (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
== (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
- only_data_sections = FALSE;
+ only_data_sections = FALSE;
null_input_bfd = FALSE;
break;
dynsec = bfd_get_section_by_name (abfd, ".dynamic");
if (dynsec)
{
- for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
+ for (m = elf_seg_map (abfd); m != NULL; m = m->next)
if (m->p_type == PT_DYNAMIC)
break;
if (m == NULL)
{
m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
- m->next = elf_tdata (abfd)->segment_map;
- elf_tdata (abfd)->segment_map = m;
+ m->next = elf_seg_map (abfd);
+ elf_seg_map (abfd) = m;
}
}
#define ELF_DYNAMIC_SEC_FLAGS \
(SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
-#undef elf_backend_add_symbol_hook
#undef elf_backend_emit_relocs
#undef bfd_elf32_bfd_link_hash_table_create
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