arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
/* Force return logic to be reviewed for each new architecture. */
- BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
- || arch == TAG_CPU_ARCH_V8M_BASE
- || arch == TAG_CPU_ARCH_V8M_MAIN);
+ BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
if (arch == TAG_CPU_ARCH_V6_M
|| arch == TAG_CPU_ARCH_V6S_M
arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
/* Force return logic to be reviewed for each new architecture. */
- BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
- || arch == TAG_CPU_ARCH_V8M_BASE
- || arch == TAG_CPU_ARCH_V8M_MAIN);
+ BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
return (arch == TAG_CPU_ARCH_V6T2
|| arch == TAG_CPU_ARCH_V7
|| arch == TAG_CPU_ARCH_V7E_M
|| arch == TAG_CPU_ARCH_V8
+ || arch == TAG_CPU_ARCH_V8R
|| arch == TAG_CPU_ARCH_V8M_MAIN);
}
bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
/* Force return logic to be reviewed for each new architecture. */
- BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
- || arch == TAG_CPU_ARCH_V8M_BASE
- || arch == TAG_CPU_ARCH_V8M_MAIN);
+ BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
/* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
return (arch == TAG_CPU_ARCH_V6T2
Tag_CPU_arch);
/* Force return logic to be reviewed for each new architecture. */
- BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
- || arch == TAG_CPU_ARCH_V8M_BASE
- || arch == TAG_CPU_ARCH_V8M_MAIN);
+ BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
return (arch == TAG_CPU_ARCH_V6T2
|| arch == TAG_CPU_ARCH_V6K
|| arch == TAG_CPU_ARCH_V7
- || arch == TAG_CPU_ARCH_V8);
+ || arch == TAG_CPU_ARCH_V8
+ || arch == TAG_CPU_ARCH_V8R);
}
static bfd_boolean
_bfd_error_handler
(_("%B(%s): warning: interworking not enabled.\n"
" first occurrence: %B: ARM call to Thumb"),
- sym_sec->owner, input_bfd, name);
+ sym_sec->owner, name, input_bfd);
}
/* We have an extra 2-bytes reach because of
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): error: multiple load detected"
+ (_("%B(%A+%#x): error: multiple load detected"
" in non-last IT block instruction :"
" STM32L4XX veneer cannot be generated.\n"
"Use gcc option -mrestrict-it to generate"
" only one instruction per IT block.\n"),
- abfd, sec, (long) i);
+ abfd, sec, i);
}
else
{
| bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' in TLS trampoline"),
- input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
+ (_("%B(%A+%#Lx): unexpected Thumb instruction '%#lx' in TLS trampoline"),
+ input_bfd, input_sec, rel->r_offset, insn);
return bfd_reloc_notsupported;
}
break;
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' in TLS trampoline"),
- input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
+ (_("%B(%A+%#Lx): unexpected ARM instruction '%#lx' in TLS trampoline"),
+ input_bfd, input_sec, rel->r_offset, insn);
return bfd_reloc_notsupported;
}
break;
return bfd_reloc_notsupported;
BFD_ASSERT (is_arm_elf (input_bfd));
+ BFD_ASSERT (howto != NULL);
/* Some relocation types map to different relocations depending on the
target. We pick the right one here. */
+ input_section->output_offset
+ rel->r_offset);
- value = relocation;
+ /* PR 21523: Use an absolute value. The user of this reloc will
+ have already selected an ADD or SUB insn appropriately. */
+ value = labs (relocation);
if (value >= 0x1000)
return bfd_reloc_overflow;
+ /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
+ if (branch_type == ST_BRANCH_TO_THUMB)
+ value |= 1;
+
insn = (insn & 0xfb0f8f00) | (value & 0xff)
| ((value & 0x700) << 4)
| ((value & 0x800) << 15);
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
- input_bfd, input_section,
- (unsigned long)rel->r_offset, insn);
+ (_("%B(%A+%#Lx): unexpected Thumb instruction '%#lx' referenced by TLS_GOTDESC"),
+ input_bfd, input_section, rel->r_offset, insn);
return bfd_reloc_notsupported;
}
}
default:
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
- input_bfd, input_section,
- (unsigned long)rel->r_offset, insn);
+ (_("%B(%A+%#Lx): unexpected ARM instruction '%#lx' referenced by TLS_GOTDESC"),
+ input_bfd, input_section, rel->r_offset, insn);
return bfd_reloc_notsupported;
}
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
- input_bfd, input_section,
- (long) rel->r_offset, howto->name);
+ (_("%B(%A+%#Lx): %s relocation not permitted in shared object"),
+ input_bfd, input_section, rel->r_offset, howto->name);
return bfd_reloc_notsupported;
}
else
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
- input_bfd, input_section,
- (long) rel->r_offset, howto->name);
+ (_("%B(%A+%#Lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
+ input_bfd, input_section, rel->r_offset);
return bfd_reloc_overflow;
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
- howto->name);
+ (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
+ input_bfd, input_section, rel->r_offset,
+ signed_value < 0 ? -signed_value : signed_value, howto->name);
return bfd_reloc_overflow;
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, labs (signed_value), howto->name);
+ (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
+ input_bfd, input_section, rel->r_offset,
+ signed_value < 0 ? -signed_value : signed_value, howto->name);
return bfd_reloc_overflow;
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, labs (signed_value), howto->name);
+ (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
+ input_bfd, input_section, rel->r_offset,
+ signed_value < 0 ? -signed_value : signed_value, howto->name);
return bfd_reloc_overflow;
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, labs (signed_value), howto->name);
+ (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
+ input_bfd, input_section, rel->r_offset,
+ signed_value < 0 ? -signed_value : signed_value, howto->name);
return bfd_reloc_overflow;
}
|| r_type == R_ARM_GNU_VTINHERIT)
continue;
- bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
- howto = bfd_reloc.howto;
+ howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
+
+ if (howto == NULL)
+ return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
h = NULL;
sym = NULL;
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
+ (_("%B(%A+%#Lx): %s relocation against SEC_MERGE section"),
input_bfd, input_section,
- (long) rel->r_offset, howto->name);
+ rel->r_offset, howto->name);
return FALSE;
}
_bfd_error_handler
((sym_type == STT_TLS
/* xgettext:c-format */
- ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
+ ? _("%B(%A+%#Lx): %s used with TLS symbol %s")
/* xgettext:c-format */
- : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
+ : _("%B(%A+%#Lx): %s used with non-TLS symbol %s")),
input_bfd,
input_section,
- (long) rel->r_offset,
+ rel->r_offset,
howto->name,
name);
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
+ (_("%B(%A+%#Lx): unresolvable %s relocation against symbol `%s'"),
input_bfd,
input_section,
- (long) rel->r_offset,
+ rel->r_offset,
howto->name,
h->root.root.string);
return FALSE;
T(V8), /* V7E_M. */
T(V8) /* V8. */
};
+ const int v8r[] =
+ {
+ T(V8R), /* PRE_V4. */
+ T(V8R), /* V4. */
+ T(V8R), /* V4T. */
+ T(V8R), /* V5T. */
+ T(V8R), /* V5TE. */
+ T(V8R), /* V5TEJ. */
+ T(V8R), /* V6. */
+ T(V8R), /* V6KZ. */
+ T(V8R), /* V6T2. */
+ T(V8R), /* V6K. */
+ T(V8R), /* V7. */
+ T(V8R), /* V6_M. */
+ T(V8R), /* V6S_M. */
+ T(V8R), /* V7E_M. */
+ T(V8), /* V8. */
+ T(V8R), /* V8R. */
+ };
const int v8m_baseline[] =
{
-1, /* PRE_V4. */
T(V8M_BASE), /* V6S_M. */
-1, /* V7E_M. */
-1, /* V8. */
- -1,
+ -1, /* V8R. */
T(V8M_BASE) /* V8-M BASELINE. */
};
const int v8m_mainline[] =
T(V8M_MAIN), /* V6S_M. */
T(V8M_MAIN), /* V7E_M. */
-1, /* V8. */
- -1,
+ -1, /* V8R. */
T(V8M_MAIN), /* V8-M BASELINE. */
T(V8M_MAIN) /* V8-M MAINLINE. */
};
T(V6S_M), /* V6S_M. */
T(V7E_M), /* V7E_M. */
T(V8), /* V8. */
- -1, /* Unused. */
+ -1, /* V8R. */
T(V8M_BASE), /* V8-M BASELINE. */
T(V8M_MAIN), /* V8-M MAINLINE. */
T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
v6s_m,
v7e_m,
v8,
- NULL,
+ v8r,
v8m_baseline,
v8m_mainline,
/* Pseudo-architecture. */
follow the requirement of the input. */
if (out_attr[i].i == 0)
{
+ /* This assert is still reasonable, we shouldn't
+ produce the suspicious build attribute
+ combination (See below for in_attr). */
BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
out_attr[i].i = in_attr[i].i;
out_attr[Tag_ABI_HardFP_use].i
nothing. */
else if (in_attr[i].i == 0)
{
- BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
+ /* We used to assert that Tag_ABI_HardFP_use was
+ zero here, but we should never assert when
+ consuming an object file that has suspicious
+ build attributes. The single precision variant
+ of 'no FP architecture' is still 'no FP
+ architecture', so we just ignore the tag in this
+ case. */
break;
}
if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
{
_bfd_error_handler
- (_("%B has has both the current and legacy "
+ (_("%B has both the current and legacy "
"Tag_MPextension_use attributes"),
ibfd);
result = FALSE;
Elf_Internal_Sym *isym;
struct elf_link_hash_entry *h;
struct elf32_arm_link_hash_entry *eh;
- unsigned long r_symndx;
+ unsigned int r_symndx;
int r_type;
r_symndx = ELF32_R_SYM (rel->r_info);
/* PR15323, ref flags aren't set for references in the
same object. */
- h->root.non_ir_ref = 1;
+ h->root.non_ir_ref_regular = 1;
}
}
{
struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
+ /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
+ Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
+ library to be a relocatable object file. */
+ BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
if (globals->cmse_implib)
return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
else
branch_to_veneer - (1 << 24) : 0;
_bfd_error_handler
- (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
- "Jump out of range by %ld bytes. "
+ (_("%B(%#Lx): error: Cannot create STM32L4XX veneer. "
+ "Jump out of range by %Ld bytes. "
"Cannot encode branch instruction. "),
output_bfd,
- (long) (stm32l4xx_errnode->vma - 4),
+ stm32l4xx_errnode->vma - 4,
out_of_range);
continue;
}
projects / deliverable / binutils-gdb.git / blobdiff