/* SPU specific support for 32-bit ELF
- Copyright (C) 2006-2017 Free Software Foundation, Inc.
+ Copyright (C) 2006-2019 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
array, so it must be declared in the order of that type. */
static reloc_howto_type elf_howto_table[] = {
- HOWTO (R_SPU_NONE, 0, 3, 0, FALSE, 0, complain_overflow_dont,
+ HOWTO (R_SPU_NONE, 0, 3, 0, FALSE, 0, complain_overflow_dont,
bfd_elf_generic_reloc, "SPU_NONE",
FALSE, 0, 0x00000000, FALSE),
- HOWTO (R_SPU_ADDR10, 4, 2, 10, FALSE, 14, complain_overflow_bitfield,
+ HOWTO (R_SPU_ADDR10, 4, 2, 10, FALSE, 14, complain_overflow_bitfield,
bfd_elf_generic_reloc, "SPU_ADDR10",
FALSE, 0, 0x00ffc000, FALSE),
- HOWTO (R_SPU_ADDR16, 2, 2, 16, FALSE, 7, complain_overflow_bitfield,
+ HOWTO (R_SPU_ADDR16, 2, 2, 16, FALSE, 7, complain_overflow_bitfield,
bfd_elf_generic_reloc, "SPU_ADDR16",
FALSE, 0, 0x007fff80, FALSE),
HOWTO (R_SPU_ADDR16_HI, 16, 2, 16, FALSE, 7, complain_overflow_bitfield,
HOWTO (R_SPU_ADDR16_LO, 0, 2, 16, FALSE, 7, complain_overflow_dont,
bfd_elf_generic_reloc, "SPU_ADDR16_LO",
FALSE, 0, 0x007fff80, FALSE),
- HOWTO (R_SPU_ADDR18, 0, 2, 18, FALSE, 7, complain_overflow_bitfield,
+ HOWTO (R_SPU_ADDR18, 0, 2, 18, FALSE, 7, complain_overflow_bitfield,
bfd_elf_generic_reloc, "SPU_ADDR18",
FALSE, 0, 0x01ffff80, FALSE),
- HOWTO (R_SPU_ADDR32, 0, 2, 32, FALSE, 0, complain_overflow_dont,
+ HOWTO (R_SPU_ADDR32, 0, 2, 32, FALSE, 0, complain_overflow_dont,
bfd_elf_generic_reloc, "SPU_ADDR32",
FALSE, 0, 0xffffffff, FALSE),
- HOWTO (R_SPU_REL16, 2, 2, 16, TRUE, 7, complain_overflow_bitfield,
+ HOWTO (R_SPU_REL16, 2, 2, 16, TRUE, 7, complain_overflow_bitfield,
bfd_elf_generic_reloc, "SPU_REL16",
FALSE, 0, 0x007fff80, TRUE),
- HOWTO (R_SPU_ADDR7, 0, 2, 7, FALSE, 14, complain_overflow_dont,
+ HOWTO (R_SPU_ADDR7, 0, 2, 7, FALSE, 14, complain_overflow_dont,
bfd_elf_generic_reloc, "SPU_ADDR7",
FALSE, 0, 0x001fc000, FALSE),
- HOWTO (R_SPU_REL9, 2, 2, 9, TRUE, 0, complain_overflow_signed,
- spu_elf_rel9, "SPU_REL9",
+ HOWTO (R_SPU_REL9, 2, 2, 9, TRUE, 0, complain_overflow_signed,
+ spu_elf_rel9, "SPU_REL9",
FALSE, 0, 0x0180007f, TRUE),
- HOWTO (R_SPU_REL9I, 2, 2, 9, TRUE, 0, complain_overflow_signed,
- spu_elf_rel9, "SPU_REL9I",
+ HOWTO (R_SPU_REL9I, 2, 2, 9, TRUE, 0, complain_overflow_signed,
+ spu_elf_rel9, "SPU_REL9I",
FALSE, 0, 0x0000c07f, TRUE),
- HOWTO (R_SPU_ADDR10I, 0, 2, 10, FALSE, 14, complain_overflow_signed,
+ HOWTO (R_SPU_ADDR10I, 0, 2, 10, FALSE, 14, complain_overflow_signed,
bfd_elf_generic_reloc, "SPU_ADDR10I",
FALSE, 0, 0x00ffc000, FALSE),
- HOWTO (R_SPU_ADDR16I, 0, 2, 16, FALSE, 7, complain_overflow_signed,
+ HOWTO (R_SPU_ADDR16I, 0, 2, 16, FALSE, 7, complain_overflow_signed,
bfd_elf_generic_reloc, "SPU_ADDR16I",
FALSE, 0, 0x007fff80, FALSE),
- HOWTO (R_SPU_REL32, 0, 2, 32, TRUE, 0, complain_overflow_dont,
+ HOWTO (R_SPU_REL32, 0, 2, 32, TRUE, 0, complain_overflow_dont,
bfd_elf_generic_reloc, "SPU_REL32",
FALSE, 0, 0xffffffff, TRUE),
- HOWTO (R_SPU_ADDR16X, 0, 2, 16, FALSE, 7, complain_overflow_bitfield,
+ HOWTO (R_SPU_ADDR16X, 0, 2, 16, FALSE, 7, complain_overflow_bitfield,
bfd_elf_generic_reloc, "SPU_ADDR16X",
FALSE, 0, 0x007fff80, FALSE),
- HOWTO (R_SPU_PPU32, 0, 2, 32, FALSE, 0, complain_overflow_dont,
+ HOWTO (R_SPU_PPU32, 0, 2, 32, FALSE, 0, complain_overflow_dont,
bfd_elf_generic_reloc, "SPU_PPU32",
FALSE, 0, 0xffffffff, FALSE),
- HOWTO (R_SPU_PPU64, 0, 4, 64, FALSE, 0, complain_overflow_dont,
+ HOWTO (R_SPU_PPU64, 0, 4, 64, FALSE, 0, complain_overflow_dont,
bfd_elf_generic_reloc, "SPU_PPU64",
FALSE, 0, -1, FALSE),
- HOWTO (R_SPU_ADD_PIC, 0, 0, 0, FALSE, 0, complain_overflow_dont,
+ HOWTO (R_SPU_ADD_PIC, 0, 0, 0, FALSE, 0, complain_overflow_dont,
bfd_elf_generic_reloc, "SPU_ADD_PIC",
FALSE, 0, 0x00000000, FALSE),
};
}
}
-static void
-spu_elf_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
+static bfd_boolean
+spu_elf_info_to_howto (bfd *abfd,
arelent *cache_ptr,
Elf_Internal_Rela *dst)
{
if (r_type >= R_SPU_max)
{
/* xgettext:c-format */
- _bfd_error_handler (_("%B: unrecognised SPU reloc number: %d"),
+ _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
abfd, r_type);
bfd_set_error (bfd_error_bad_value);
- r_type = R_SPU_NONE;
+ return FALSE;
}
cache_ptr->howto = &elf_howto_table[(int) r_type];
+ return TRUE;
}
static reloc_howto_type *
flagword flags;
ibfd = info->input_bfds;
+ /* This should really be SEC_LINKER_CREATED, but then we'd need
+ to write out the section ourselves. */
flags = SEC_LOAD | SEC_READONLY | SEC_HAS_CONTENTS | SEC_IN_MEMORY;
s = bfd_make_section_anyway_with_flags (ibfd, SPU_PTNOTE_SPUNAME, flags);
if (s == NULL
|| !bfd_set_section_alignment (ibfd, s, 4))
return FALSE;
+ /* Because we didn't set SEC_LINKER_CREATED we need to set the
+ proper section type. */
+ elf_section_type (s) = SHT_NOTE;
name_len = strlen (bfd_get_filename (info->output_bfd)) + 1;
size = 12 + ((sizeof (SPU_PLUGIN_NAME) + 3) & -4);
if ((s->vma - vma_start) & (htab->params->line_size - 1))
{
- info->callbacks->einfo (_("%X%P: overlay section %A "
- "does not start on a cache line.\n"),
+ info->callbacks->einfo (_("%X%P: overlay section %pA "
+ "does not start on a cache line\n"),
s);
bfd_set_error (bfd_error_bad_value);
return 0;
}
else if (s->size > htab->params->line_size)
{
- info->callbacks->einfo (_("%X%P: overlay section %A "
- "is larger than a cache line.\n"),
+ info->callbacks->einfo (_("%X%P: overlay section %pA "
+ "is larger than a cache line\n"),
s);
bfd_set_error (bfd_error_bad_value);
return 0;
s = alloc_sec[i];
if (s->vma < ovl_end)
{
- info->callbacks->einfo (_("%X%P: overlay section %A "
- "is not in cache area.\n"),
+ info->callbacks->einfo (_("%X%P: overlay section %pA "
+ "is not in cache area\n"),
alloc_sec[i-1]);
bfd_set_error (bfd_error_bad_value);
return 0;
if (s0->vma != s->vma)
{
/* xgettext:c-format */
- info->callbacks->einfo (_("%X%P: overlay sections %A "
- "and %A do not start at the "
- "same address.\n"),
+ info->callbacks->einfo (_("%X%P: overlay sections %pA "
+ "and %pA do not start at the "
+ "same address\n"),
s0, s);
bfd_set_error (bfd_error_bad_value);
return 0;
}
_bfd_error_handler
/* xgettext:c-format */
- (_("warning: call to non-function symbol %s defined in %B"),
+ (_("warning: call to non-function symbol %s defined in %pB"),
sym_name, sym_sec->owner);
}
if (stub_type != br000_ovl_stub
&& lrlive != stub_type - br000_ovl_stub)
/* xgettext:c-format */
- info->callbacks->einfo (_("%A:0x%v lrlive .brinfo (%u) differs "
+ info->callbacks->einfo (_("%pA:0x%v lrlive .brinfo (%u) differs "
"from analysis (%u)\n"),
isec, irela->r_offset, lrlive,
stub_type - br000_ovl_stub);
else if (h->root.u.def.section->owner != NULL)
{
/* xgettext:c-format */
- _bfd_error_handler (_("%B is not allowed to define %s"),
+ _bfd_error_handler (_("%pB is not allowed to define %s"),
h->root.u.def.section->owner,
h->root.root.string);
bfd_set_error (bfd_error_bad_value);
return &sinfo->fun[mid];
}
/* xgettext:c-format */
- info->callbacks->einfo (_("%A:0x%v not found in function table\n"),
+ info->callbacks->einfo (_("%pA:0x%v not found in function table\n"),
sec, offset);
bfd_set_error (bfd_error_bad_value);
return NULL;
if (!warned)
info->callbacks->einfo
/* xgettext:c-format */
- (_("%B(%A+0x%v): call to non-code section"
- " %B(%A), analysis incomplete\n"),
+ (_("%pB(%pA+0x%v): call to non-code section"
+ " %pB(%pA), analysis incomplete\n"),
sec->owner, sec, irela->r_offset,
sym_sec->owner, sym_sec);
warned = TRUE;
const char *f2 = func_name (call->fun);
/* xgettext:c-format */
- info->callbacks->info (_("Stack analysis will ignore the call "
+ info->callbacks->info (_("stack analysis will ignore the call "
"from %s to %s\n"),
f1, f2);
}
if (i == base)
{
/* xgettext:c-format */
- info->callbacks->einfo (_("%B:%A%s exceeds overlay size\n"),
+ info->callbacks->einfo (_("%pB:%pA%s exceeds overlay size\n"),
ovly_sections[2 * i]->owner,
ovly_sections[2 * i],
ovly_sections[2 * i + 1] ? " + rodata" : "");
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%B(%s+%#Lx): unresolvable %s relocation against symbol `%s'"),
+ (_("%pB(%s+%#" PRIx64 "): "
+ "unresolvable %s relocation against symbol `%s'"),
input_bfd,
bfd_get_section_name (input_bfd, input_section),
- rel->r_offset,
+ (uint64_t) rel->r_offset,
howto->name,
sym_name);
ret = FALSE;
{
asection *toe, *s;
struct elf_segment_map *m, *m_overlay;
- struct elf_segment_map **p, **p_overlay;
+ struct elf_segment_map **p, **p_overlay, **first_load;
unsigned int i;
if (info == NULL)
/* Move all overlay segments onto a separate list. */
p = &elf_seg_map (abfd);
p_overlay = &m_overlay;
+ m_overlay = NULL;
+ first_load = NULL;
while (*p != NULL)
{
- if ((*p)->p_type == PT_LOAD && (*p)->count == 1
- && spu_elf_section_data ((*p)->sections[0])->u.o.ovl_index != 0)
+ if ((*p)->p_type == PT_LOAD)
{
- m = *p;
- *p = m->next;
- *p_overlay = m;
- p_overlay = &m->next;
- continue;
+ if (!first_load)
+ first_load = p;
+ if ((*p)->count == 1
+ && spu_elf_section_data ((*p)->sections[0])->u.o.ovl_index != 0)
+ {
+ m = *p;
+ *p = m->next;
+ *p_overlay = m;
+ p_overlay = &m->next;
+ continue;
+ }
}
-
p = &((*p)->next);
}
/* Re-insert overlay segments at the head of the segment map. */
- *p_overlay = elf_seg_map (abfd);
- elf_seg_map (abfd) = m_overlay;
+ if (m_overlay != NULL)
+ {
+ p = first_load;
+ if (*p != NULL && (*p)->p_type == PT_LOAD && (*p)->includes_filehdr)
+ /* It doesn't really make sense for someone to include the ELF
+ file header into an spu image, but if they do the code that
+ assigns p_offset needs to see the segment containing the
+ header first. */
+ p = &(*p)->next;
+ *p_overlay = *p;
+ *p = m_overlay;
+ }
return TRUE;
}
bfd_vma base_end;
/* If there aren't any relocs, then there's nothing more
- to do. */
+ to do. */
if ((isec->flags & SEC_ALLOC) == 0
|| (isec->flags & SEC_RELOC) == 0
|| isec->reloc_count == 0)
return FALSE;
/* 1 quadword can contain up to 4 R_SPU_ADDR32
- relocations. They are stored in a single word by
- saving the upper 28 bits of the address and setting the
- lower 4 bits to a bit mask of the words that have the
- relocation. BASE_END keeps track of the next quadword. */
+ relocations. They are stored in a single word by
+ saving the upper 28 bits of the address and setting the
+ lower 4 bits to a bit mask of the words that have the
+ relocation. BASE_END keeps track of the next quadword. */
irela = internal_relocs;
irelaend = irela + isec->reloc_count;
base_end = 0;
#define ELF_MACHINE_CODE EM_SPU
/* This matches the alignment need for DMA. */
#define ELF_MAXPAGESIZE 0x80
-#define elf_backend_rela_normal 1
+#define elf_backend_rela_normal 1
#define elf_backend_can_gc_sections 1
#define bfd_elf32_bfd_reloc_type_lookup spu_elf_reloc_type_lookup
#define elf_backend_additional_program_headers spu_elf_additional_program_headers
#define elf_backend_modify_segment_map spu_elf_modify_segment_map
#define elf_backend_modify_program_headers spu_elf_modify_program_headers
-#define elf_backend_post_process_headers spu_elf_post_process_headers
+#define elf_backend_post_process_headers spu_elf_post_process_headers
#define elf_backend_fake_sections spu_elf_fake_sections
#define elf_backend_special_sections spu_elf_special_sections
#define bfd_elf32_bfd_final_link spu_elf_final_link