/* MIPS-specific support for ELF
- Copyright (C) 1993-2014 Free Software Foundation, Inc.
+ Copyright (C) 1993-2017 Free Software Foundation, Inc.
Most of the information added by Ian Lance Taylor, Cygnus Support,
<ian@cygnus.com>.
#include "elfxx-mips.h"
#include "elf/mips.h"
#include "elf-vxworks.h"
+#include "dwarf2.h"
/* Get the ECOFF swapping routines. */
#include "coff/sym.h"
struct elf_link_hash_entry *low;
/* The least dynamic symbol table index corresponding to a non-TLS
symbol with a GOT entry. */
- long min_got_dynindx;
+ bfd_size_type min_got_dynindx;
/* The greatest dynamic symbol table index corresponding to a symbol
with a GOT entry that is not referenced (e.g., a dynamic symbol
with dynamic relocations pointing to it from non-primary GOTs). */
- long max_unref_got_dynindx;
- /* The greatest dynamic symbol table index not corresponding to a
+ bfd_size_type max_unref_got_dynindx;
+ /* The greatest dynamic symbol table index corresponding to a local
+ symbol. */
+ bfd_size_type max_local_dynindx;
+ /* The greatest dynamic symbol table index corresponding to an external
symbol without a GOT entry. */
- long max_non_got_dynindx;
+ bfd_size_type max_non_got_dynindx;
};
/* We make up to two PLT entries if needed, one for standard MIPS code
/* True if we can only use 32-bit microMIPS instructions. */
bfd_boolean insn32;
+ /* True if we suppress checks for invalid branches between ISA modes. */
+ bfd_boolean ignore_branch_isa;
+
/* True if we're generating code for VxWorks. */
bfd_boolean is_vxworks;
/* Shortcuts to some dynamic sections, or NULL if they are not
being used. */
- asection *srelbss;
- asection *sdynbss;
- asection *srelplt;
asection *srelplt2;
- asection *sgotplt;
- asection *splt;
asection *sstubs;
- asection *sgot;
/* The master GOT information. */
struct mips_got_info *got_info;
#define MICROMIPS_P(abfd) \
((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MICROMIPS) != 0)
+/* Nonzero if ABFD is MIPS R6. */
+#define MIPSR6_P(abfd) \
+ ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R6 \
+ || (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_64R6)
+
/* The IRIX compatibility level we are striving for. */
#define IRIX_COMPAT(abfd) \
(get_elf_backend_data (abfd)->elf_backend_mips_irix_compat (abfd))
((ABI_64_P (abfd) \
? 0xdf998010 /* ld t9,0x8010(gp) */ \
: 0x8f998010)) /* lw t9,0x8010(gp) */
-#define STUB_MOVE(abfd) \
- ((ABI_64_P (abfd) \
- ? 0x03e0782d /* daddu t7,ra */ \
- : 0x03e07821)) /* addu t7,ra */
+#define STUB_MOVE 0x03e07825 /* or t7,ra,zero */
#define STUB_LUI(VAL) (0x3c180000 + (VAL)) /* lui t8,VAL */
-#define STUB_JALR 0x0320f809 /* jalr t9,ra */
+#define STUB_JALR 0x0320f809 /* jalr ra,t9 */
#define STUB_ORI(VAL) (0x37180000 + (VAL)) /* ori t8,t8,VAL */
#define STUB_LI16U(VAL) (0x34180000 + (VAL)) /* ori t8,zero,VAL unsigned */
#define STUB_LI16S(abfd, VAL) \
? 0xdf3c8010 /* ld t9,0x8010(gp) */ \
: 0xff3c8010) /* lw t9,0x8010(gp) */
#define STUB_MOVE_MICROMIPS 0x0dff /* move t7,ra */
-#define STUB_MOVE32_MICROMIPS(abfd) \
- (ABI_64_P (abfd) \
- ? 0x581f7950 /* daddu t7,ra,zero */ \
- : 0x001f7950) /* addu t7,ra,zero */
+#define STUB_MOVE32_MICROMIPS 0x001f7a90 /* or t7,ra,zero */
#define STUB_LUI_MICROMIPS(VAL) \
(0x41b80000 + (VAL)) /* lui t8,VAL */
#define STUB_JALR_MICROMIPS 0x45d9 /* jalr t9 */
0x8f990000, /* lw $25, %lo(&GOTPLT[0])($28) */
0x279c0000, /* addiu $28, $28, %lo(&GOTPLT[0]) */
0x031cc023, /* subu $24, $24, $28 */
- 0x03e07821, /* move $15, $31 # 32-bit move (addu) */
+ 0x03e07825, /* or t7, ra, zero */
0x0018c082, /* srl $24, $24, 2 */
0x0320f809, /* jalr $25 */
0x2718fffe /* subu $24, $24, 2 */
0x8dd90000, /* lw $25, %lo(&GOTPLT[0])($14) */
0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
0x030ec023, /* subu $24, $24, $14 */
- 0x03e07821, /* move $15, $31 # 32-bit move (addu) */
+ 0x03e07825, /* or t7, ra, zero */
0x0018c082, /* srl $24, $24, 2 */
0x0320f809, /* jalr $25 */
0x2718fffe /* subu $24, $24, 2 */
0xddd90000, /* ld $25, %lo(&GOTPLT[0])($14) */
0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
0x030ec023, /* subu $24, $24, $14 */
- 0x03e0782d, /* move $15, $31 # 64-bit move (daddu) */
+ 0x03e07825, /* or t7, ra, zero */
0x0018c0c2, /* srl $24, $24, 3 */
0x0320f809, /* jalr $25 */
0x2718fffe /* subu $24, $24, 2 */
0xff3c, 0x0000, /* lw $25, %lo(&GOTPLT[0])($28) */
0x339c, 0x0000, /* addiu $28, $28, %lo(&GOTPLT[0]) */
0x0398, 0xc1d0, /* subu $24, $24, $28 */
- 0x001f, 0x7950, /* move $15, $31 */
+ 0x001f, 0x7a90, /* or $15, $31, zero */
0x0318, 0x1040, /* srl $24, $24, 2 */
0x03f9, 0x0f3c, /* jalr $25 */
0x3318, 0xfffe /* subu $24, $24, 2 */
0x03200008 /* jr $25 */
};
+/* In the following PLT entry the JR and ADDIU instructions will
+ be swapped in _bfd_mips_elf_finish_dynamic_symbol because
+ LOAD_INTERLOCKS_P will be true for MIPS R6. */
+static const bfd_vma mipsr6_exec_plt_entry[] =
+{
+ 0x3c0f0000, /* lui $15, %hi(.got.plt entry) */
+ 0x01f90000, /* l[wd] $25, %lo(.got.plt entry)($15) */
+ 0x25f80000, /* addiu $24, $15, %lo(.got.plt entry) */
+ 0x03200009 /* jr $25 */
+};
+
/* The format of subsequent MIPS16 o32 PLT entries. We use v0 ($2)
and v1 ($3) as temporaries because t8 ($24) and t9 ($25) are not
directly addressable. */
const char *prefix, asection *s, bfd_vma value,
bfd_vma size)
{
+ bfd_boolean micromips_p = ELF_ST_IS_MICROMIPS (h->root.other);
struct bfd_link_hash_entry *bh;
struct elf_link_hash_entry *elfh;
- const char *name;
+ char *name;
+ bfd_boolean res;
- if (ELF_ST_IS_MICROMIPS (h->root.other))
+ if (micromips_p)
value |= 1;
/* Create a new symbol. */
- name = ACONCAT ((prefix, h->root.root.root.string, NULL));
+ name = concat (prefix, h->root.root.root.string, NULL);
bh = NULL;
- if (!_bfd_generic_link_add_one_symbol (info, s->owner, name,
- BSF_LOCAL, s, value, NULL,
- TRUE, FALSE, &bh))
+ res = _bfd_generic_link_add_one_symbol (info, s->owner, name,
+ BSF_LOCAL, s, value, NULL,
+ TRUE, FALSE, &bh);
+ free (name);
+ if (! res)
return FALSE;
/* Make it a local function. */
elfh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
elfh->size = size;
elfh->forced_local = 1;
+ if (micromips_p)
+ elfh->other = ELF_ST_SET_MICROMIPS (elfh->other);
return TRUE;
}
{
struct bfd_link_hash_entry *bh;
struct elf_link_hash_entry *elfh;
- const char *name;
+ char *name;
asection *s;
bfd_vma value;
+ bfd_boolean res;
/* Read the symbol's value. */
BFD_ASSERT (h->root.root.type == bfd_link_hash_defined
value = h->root.root.u.def.value;
/* Create a new symbol. */
- name = ACONCAT ((prefix, h->root.root.root.string, NULL));
+ name = concat (prefix, h->root.root.root.string, NULL);
bh = NULL;
- if (!_bfd_generic_link_add_one_symbol (info, s->owner, name,
- BSF_LOCAL, s, value, NULL,
- TRUE, FALSE, &bh))
+ res = _bfd_generic_link_add_one_symbol (info, s->owner, name,
+ BSF_LOCAL, s, value, NULL,
+ TRUE, FALSE, &bh);
+ free (name);
+ if (! res)
return FALSE;
/* Make it local and copy the other attributes from H. */
h->fn_stub->flags &= ~SEC_RELOC;
h->fn_stub->reloc_count = 0;
h->fn_stub->flags |= SEC_EXCLUDE;
+ h->fn_stub->output_section = bfd_abs_section_ptr;
}
if (h->call_stub != NULL
h->call_stub->flags &= ~SEC_RELOC;
h->call_stub->reloc_count = 0;
h->call_stub->flags |= SEC_EXCLUDE;
+ h->call_stub->output_section = bfd_abs_section_ptr;
}
if (h->call_fp_stub != NULL
h->call_fp_stub->flags &= ~SEC_RELOC;
h->call_fp_stub->reloc_count = 0;
h->call_fp_stub->flags |= SEC_EXCLUDE;
+ h->call_fp_stub->output_section = bfd_abs_section_ptr;
}
}
|| h->root.root.type == bfd_link_hash_defweak)
&& h->root.def_regular
&& !bfd_is_abs_section (h->root.root.u.def.section)
+ && !bfd_is_und_section (h->root.root.u.def.section)
&& (!ELF_ST_IS_MIPS16 (h->root.other)
|| (h->fn_stub && h->need_fn_stub))
&& (PIC_OBJECT_P (h->root.root.u.def.section->owner)
/* Prefer to use LUI/ADDIU stubs if the function is at the beginning
of the section and if we would need no more than 2 nops. */
value = mips_elf_get_la25_target (stub, &s);
+ if (ELF_ST_IS_MICROMIPS (stub->h->root.other))
+ value &= ~1;
use_trampoline_p = (value != 0 || s->alignment_power > 4);
h->la25_stub = stub;
struct mips_htab_traverse_info *hti;
hti = (struct mips_htab_traverse_info *) data;
- if (!hti->info->relocatable)
+ if (!bfd_link_relocatable (hti->info))
mips_elf_check_mips16_stubs (hti->info, h);
if (mips_elf_local_pic_function_p (h))
being PIC. If we're creating a non-relocatable object with
non-PIC branches and jumps to H, make sure that H has an la25
stub. */
- if (hti->info->relocatable)
+ if (bfd_link_relocatable (hti->info))
{
if (!PIC_OBJECT_P (hti->output_bfd))
h->root.other = ELF_ST_SET_MIPS_PIC (h->root.other);
All we need to do here is shuffle the bits appropriately.
As above, the two 16-bit halves must be swapped on a
- little-endian system. */
+ little-endian system.
+
+ Finally R_MIPS16_PC16_S1 corresponds to R_MIPS_PC16, however the
+ relocatable field is shifted by 1 rather than 2 and the same bit
+ shuffling is done as with the relocations above. */
static inline bfd_boolean
mips16_reloc_p (int r_type)
case R_MIPS16_TLS_GOTTPREL:
case R_MIPS16_TLS_TPREL_HI16:
case R_MIPS16_TLS_TPREL_LO16:
+ case R_MIPS16_PC16_S1:
return TRUE;
default:
return r_type == R_MIPS_GOT_PAGE || r_type == R_MICROMIPS_GOT_PAGE;
}
-static inline bfd_boolean
-got_ofst_reloc_p (unsigned int r_type)
-{
- return r_type == R_MIPS_GOT_OFST || r_type == R_MICROMIPS_GOT_OFST;
-}
-
-static inline bfd_boolean
-got_hi16_reloc_p (unsigned int r_type)
-{
- return r_type == R_MIPS_GOT_HI16 || r_type == R_MICROMIPS_GOT_HI16;
-}
-
static inline bfd_boolean
got_lo16_reloc_p (unsigned int r_type)
{
{
return (r_type == R_MIPS_HI16
|| r_type == R_MIPS16_HI16
- || r_type == R_MICROMIPS_HI16);
+ || r_type == R_MICROMIPS_HI16
+ || r_type == R_MIPS_PCHI16);
}
static inline bfd_boolean
{
return (r_type == R_MIPS_LO16
|| r_type == R_MIPS16_LO16
- || r_type == R_MICROMIPS_LO16);
+ || r_type == R_MICROMIPS_LO16
+ || r_type == R_MIPS_PCLO16);
}
static inline bfd_boolean
|| r_type == R_MICROMIPS_26_S1);
}
+static inline bfd_boolean
+b_reloc_p (int r_type)
+{
+ return (r_type == R_MIPS_PC26_S2
+ || r_type == R_MIPS_PC21_S2
+ || r_type == R_MIPS_PC16
+ || r_type == R_MIPS_GNU_REL16_S2
+ || r_type == R_MIPS16_PC16_S1
+ || r_type == R_MICROMIPS_PC16_S1
+ || r_type == R_MICROMIPS_PC10_S1
+ || r_type == R_MICROMIPS_PC7_S1);
+}
+
+static inline bfd_boolean
+aligned_pcrel_reloc_p (int r_type)
+{
+ return (r_type == R_MIPS_PC18_S3
+ || r_type == R_MIPS_PC19_S2);
+}
+
+static inline bfd_boolean
+branch_reloc_p (int r_type)
+{
+ return (r_type == R_MIPS_26
+ || r_type == R_MIPS_PC26_S2
+ || r_type == R_MIPS_PC21_S2
+ || r_type == R_MIPS_PC16
+ || r_type == R_MIPS_GNU_REL16_S2);
+}
+
+static inline bfd_boolean
+mips16_branch_reloc_p (int r_type)
+{
+ return (r_type == R_MIPS16_26
+ || r_type == R_MIPS16_PC16_S1);
+}
+
static inline bfd_boolean
micromips_branch_reloc_p (int r_type)
{
bfd_boolean need_relocs = FALSE;
bfd_boolean dyn = elf_hash_table (info)->dynamic_sections_created;
- if (h && WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
- && (!info->shared || !SYMBOL_REFERENCES_LOCAL (info, h)))
+ if (h && WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
+ && (!bfd_link_pic (info) || !SYMBOL_REFERENCES_LOCAL (info, h)))
indx = h->dynindx;
- if ((info->shared || indx != 0)
+ if ((bfd_link_pic (info) || indx != 0)
&& (h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak))
return 1;
case GOT_TLS_LDM:
- return info->shared ? 1 : 0;
+ return bfd_link_pic (info) ? 1 : 0;
default:
return 0;
if (htab == NULL)
return;
- sgot = htab->sgot;
+ sgot = htab->root.sgot;
indx = 0;
if (h != NULL)
{
bfd_boolean dyn = elf_hash_table (info)->dynamic_sections_created;
- if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, &h->root)
- && (!info->shared || !SYMBOL_REFERENCES_LOCAL (info, &h->root)))
+ if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info),
+ &h->root)
+ && (!bfd_link_pic (info)
+ || !SYMBOL_REFERENCES_LOCAL (info, &h->root)))
indx = h->root.dynindx;
}
if (entry->tls_initialized)
return;
- if ((info->shared || indx != 0)
+ if ((bfd_link_pic (info) || indx != 0)
&& (h == NULL
|| ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak))
sgot->contents + got_offset
+ MIPS_ELF_GOT_SIZE (abfd));
- if (!info->shared)
+ if (!bfd_link_pic (info))
MIPS_ELF_PUT_WORD (abfd, 1,
sgot->contents + got_offset);
else
BFD_ASSERT (h->plt.plist->gotplt_index != MINUS_ONE);
/* Calculate the address of the associated .got.plt entry. */
- got_address = (htab->sgotplt->output_section->vma
- + htab->sgotplt->output_offset
+ got_address = (htab->root.sgotplt->output_section->vma
+ + htab->root.sgotplt->output_offset
+ (h->plt.plist->gotplt_index
* MIPS_ELF_GOT_SIZE (info->output_bfd)));
g = mips_elf_bfd_got (obfd, FALSE);
got_index = ((h->dynindx - global_got_dynindx + g->local_gotno)
* MIPS_ELF_GOT_SIZE (obfd));
- BFD_ASSERT (got_index < htab->sgot->size);
+ BFD_ASSERT (got_index < htab->root.sgot->size);
return got_index;
}
BFD_ASSERT (entry);
gotidx = entry->gotidx;
- BFD_ASSERT (gotidx > 0 && gotidx < htab->sgot->size);
+ BFD_ASSERT (gotidx > 0 && gotidx < htab->root.sgot->size);
if (lookup.tls_type)
{
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
- sgot = htab->sgot;
+ sgot = htab->root.sgot;
gp = _bfd_get_gp_value (output_bfd)
+ mips_elf_adjust_gp (output_bfd, htab->got_info, input_bfd);
BFD_ASSERT (entry);
gotidx = entry->gotidx;
- BFD_ASSERT (gotidx > 0 && gotidx < htab->sgot->size);
+ BFD_ASSERT (gotidx > 0 && gotidx < htab->root.sgot->size);
return entry;
}
if (g->assigned_low_gotno > g->assigned_high_gotno)
{
/* We didn't allocate enough space in the GOT. */
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("not enough GOT space for local GOT entries"));
bfd_set_error (bfd_error_bad_value);
return NULL;
*entry = lookup;
*loc = entry;
- MIPS_ELF_PUT_WORD (abfd, value, htab->sgot->contents + entry->gotidx);
+ MIPS_ELF_PUT_WORD (abfd, value, htab->root.sgot->contents + entry->gotidx);
/* These GOT entries need a dynamic relocation on VxWorks. */
if (htab->is_vxworks)
bfd_vma got_address;
s = mips_elf_rel_dyn_section (info, FALSE);
- got_address = (htab->sgot->output_section->vma
- + htab->sgot->output_offset
+ got_address = (htab->root.sgot->output_section->vma
+ + htab->root.sgot->output_offset
+ entry->gotidx);
rloc = s->contents + (s->reloc_count++ * sizeof (Elf32_External_Rela));
bfd_size_type count;
count = 0;
- if (info->shared || elf_hash_table (info)->is_relocatable_executable)
+ if (bfd_link_pic (info)
+ || elf_hash_table (info)->is_relocatable_executable)
{
asection *p;
const struct elf_backend_data *bed;
struct mips_elf_hash_sort_data hsd;
struct mips_got_info *g;
- if (elf_hash_table (info)->dynsymcount == 0)
- return TRUE;
-
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
+ if (htab->root.dynsymcount == 0)
+ return TRUE;
+
g = htab->got_info;
if (g == NULL)
return TRUE;
hsd.low = NULL;
hsd.max_unref_got_dynindx
= hsd.min_got_dynindx
- = (elf_hash_table (info)->dynsymcount - g->reloc_only_gotno);
- hsd.max_non_got_dynindx = count_section_dynsyms (abfd, info) + 1;
- mips_elf_link_hash_traverse (((struct mips_elf_link_hash_table *)
- elf_hash_table (info)),
- mips_elf_sort_hash_table_f,
- &hsd);
+ = (htab->root.dynsymcount - g->reloc_only_gotno);
+ /* Add 1 to local symbol indices to account for the mandatory NULL entry
+ at the head of the table; see `_bfd_elf_link_renumber_dynsyms'. */
+ hsd.max_local_dynindx = count_section_dynsyms (abfd, info) + 1;
+ hsd.max_non_got_dynindx = htab->root.local_dynsymcount + 1;
+ mips_elf_link_hash_traverse (htab, mips_elf_sort_hash_table_f, &hsd);
/* There should have been enough room in the symbol table to
accommodate both the GOT and non-GOT symbols. */
+ BFD_ASSERT (hsd.max_local_dynindx <= htab->root.local_dynsymcount + 1);
BFD_ASSERT (hsd.max_non_got_dynindx <= hsd.min_got_dynindx);
- BFD_ASSERT ((unsigned long) hsd.max_unref_got_dynindx
- == elf_hash_table (info)->dynsymcount);
- BFD_ASSERT (elf_hash_table (info)->dynsymcount - hsd.min_got_dynindx
- == g->global_gotno);
+ BFD_ASSERT (hsd.max_unref_got_dynindx == htab->root.dynsymcount);
+ BFD_ASSERT (htab->root.dynsymcount - hsd.min_got_dynindx == g->global_gotno);
/* Now we know which dynamic symbol has the lowest dynamic symbol
table index in the GOT. */
switch (h->global_got_area)
{
case GGA_NONE:
- h->root.dynindx = hsd->max_non_got_dynindx++;
+ if (h->root.forced_local)
+ h->root.dynindx = hsd->max_local_dynindx++;
+ else
+ h->root.dynindx = hsd->max_non_got_dynindx++;
break;
case GGA_NORMAL:
/* If this is an executable that must provide a definition of the symbol,
either though PLTs or copy relocations, then that address should go in
the local rather than global GOT. */
- if (info->executable && h->has_static_relocs)
+ if (bfd_link_executable (info) && h->has_static_relocs)
return TRUE;
return FALSE;
}
arg->g->assigned_low_gotno += 1;
- if (arg->info->shared
+ if (bfd_link_pic (arg->info)
|| (elf_hash_table (arg->info)->dynamic_sections_created
&& entry->d.h->root.def_dynamic
&& !entry->d.h->root.def_regular))
BFD_ASSERT (g->assigned_low_gotno == g->local_gotno + g->global_gotno);
g->assigned_low_gotno = save_assign;
- if (info->shared)
+ if (bfd_link_pic (info))
{
g->relocs += g->local_gotno - g->assigned_low_gotno;
BFD_ASSERT (g->assigned_low_gotno == g->next->local_gotno
BFD_ASSERT (htab != NULL);
/* This function may be called more than once. */
- if (htab->sgot)
+ if (htab->root.sgot)
return TRUE;
flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
if (s == NULL
|| ! bfd_set_section_alignment (abfd, s, 4))
return FALSE;
- htab->sgot = s;
+ htab->root.sgot = s;
/* Define the symbol _GLOBAL_OFFSET_TABLE_. We don't do this in the
linker script because we don't want to define the symbol if we
h->other = (h->other & ~ELF_ST_VISIBILITY (-1)) | STV_HIDDEN;
elf_hash_table (info)->hgot = h;
- if (info->shared
+ if (bfd_link_pic (info)
&& ! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
| SEC_LINKER_CREATED);
if (s == NULL)
return FALSE;
- htab->sgotplt = s;
+ htab->root.sgotplt = s;
return TRUE;
}
is_gott_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *h)
{
return (mips_elf_hash_table (info)->is_vxworks
- && info->shared
+ && bfd_link_pic (info)
&& (strcmp (h->root.root.string, "__GOTT_BASE__") == 0
|| strcmp (h->root.root.string, "__GOTT_INDEX__") == 0));
}
{
case R_MIPS_26:
case R_MIPS_PC16:
+ case R_MIPS_PC21_S2:
+ case R_MIPS_PC26_S2:
case R_MICROMIPS_26_S1:
case R_MICROMIPS_PC7_S1:
case R_MICROMIPS_PC10_S1:
/* TRUE if the symbol referred to by this relocation is a local
symbol. */
bfd_boolean local_p, was_local_p;
+ /* TRUE if the symbol referred to by this relocation is a section
+ symbol. */
+ bfd_boolean section_p = FALSE;
/* TRUE if the symbol referred to by this relocation is "_gp_disp". */
bfd_boolean gp_disp_p = FALSE;
/* TRUE if the symbol referred to by this relocation is
/* Figure out the value of the symbol. */
if (local_p)
{
+ bfd_boolean micromips_p = MICROMIPS_P (abfd);
Elf_Internal_Sym *sym;
sym = local_syms + r_symndx;
sec = local_sections[r_symndx];
+ section_p = ELF_ST_TYPE (sym->st_info) == STT_SECTION;
+
symbol = sec->output_section->vma + sec->output_offset;
- if (ELF_ST_TYPE (sym->st_info) != STT_SECTION
- || (sec->flags & SEC_MERGE))
+ if (!section_p || (sec->flags & SEC_MERGE))
symbol += sym->st_value;
- if ((sec->flags & SEC_MERGE)
- && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
+ if ((sec->flags & SEC_MERGE) && section_p)
{
addend = _bfd_elf_rel_local_sym (abfd, sym, &sec, addend);
addend -= symbol;
*namep = bfd_elf_string_from_elf_section (input_bfd,
symtab_hdr->sh_link,
sym->st_name);
- if (*namep == '\0')
+ if (*namep == NULL || **namep == '\0')
*namep = bfd_section_name (input_bfd, sec);
- target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (sym->st_other);
- target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (sym->st_other);
+ /* For relocations against a section symbol and ones against no
+ symbol (absolute relocations) infer the ISA mode from the addend. */
+ if (section_p || r_symndx == STN_UNDEF)
+ {
+ target_is_16_bit_code_p = (addend & 1) && !micromips_p;
+ target_is_micromips_code_p = (addend & 1) && micromips_p;
+ }
+ /* For relocations against an absolute symbol infer the ISA mode
+ from the value of the symbol plus addend. */
+ else if (bfd_is_abs_section (sec))
+ {
+ target_is_16_bit_code_p = ((symbol + addend) & 1) && !micromips_p;
+ target_is_micromips_code_p = ((symbol + addend) & 1) && micromips_p;
+ }
+ /* Otherwise just use the regular symbol annotation available. */
+ else
+ {
+ target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (sym->st_other);
+ target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (sym->st_other);
+ }
}
else
{
Otherwise, we should define the symbol with a value of 0.
FIXME: It should probably get into the symbol table
somehow as well. */
- BFD_ASSERT (! info->shared);
+ BFD_ASSERT (! bfd_link_pic (info));
BFD_ASSERT (bfd_get_section_by_name (abfd, ".dynamic") == NULL);
symbol = 0;
}
http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf */
symbol = 0;
}
- else if ((*info->callbacks->undefined_symbol)
- (info, h->root.root.root.string, input_bfd,
- input_section, relocation->r_offset,
- (info->unresolved_syms_in_objects == RM_GENERATE_ERROR)
- || ELF_ST_VISIBILITY (h->root.other)))
- {
- return bfd_reloc_undefined;
- }
else
{
- return bfd_reloc_notsupported;
+ (*info->callbacks->undefined_symbol)
+ (info, h->root.root.root.string, input_bfd,
+ input_section, relocation->r_offset,
+ (info->unresolved_syms_in_objects == RM_GENERATE_ERROR)
+ || ELF_ST_VISIBILITY (h->root.other));
+ return bfd_reloc_undefined;
}
target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (h->root.other);
(c) the section allows direct references to MIPS16 functions. */
if (r_type != R_MIPS16_26
- && !info->relocatable
+ && !bfd_link_relocatable (info)
&& ((h != NULL
&& h->fn_stub != NULL
&& (r_type != R_MIPS16_CALL16 || h->need_fn_stub))
to a standard MIPS function, we need to redirect the call to the stub.
Note that we specifically exclude R_MIPS16_CALL16 from this behavior;
indirect calls should use an indirect stub instead. */
- else if (r_type == R_MIPS16_26 && !info->relocatable
+ else if (r_type == R_MIPS16_26 && !bfd_link_relocatable (info)
&& ((h != NULL && (h->call_stub != NULL || h->call_fp_stub != NULL))
|| (local_p
&& mips_elf_tdata (input_bfd)->local_call_stubs != NULL
else if (h != NULL && h->la25_stub
&& mips_elf_relocation_needs_la25_stub (input_bfd, r_type,
target_is_16_bit_code_p))
- symbol = (h->la25_stub->stub_section->output_section->vma
- + h->la25_stub->stub_section->output_offset
- + h->la25_stub->offset);
+ {
+ symbol = (h->la25_stub->stub_section->output_section->vma
+ + h->la25_stub->stub_section->output_offset
+ + h->la25_stub->offset);
+ if (ELF_ST_IS_MICROMIPS (h->root.other))
+ symbol |= 1;
+ }
/* For direct MIPS16 and microMIPS calls make sure the compressed PLT
entry is used if a standard PLT entry has also been made. In this
case the symbol will have been set by mips_elf_set_plt_sym_value
to point to the standard PLT entry, so redirect to the compressed
one. */
- else if ((r_type == R_MIPS16_26 || r_type == R_MICROMIPS_26_S1)
- && !info->relocatable
+ else if ((mips16_branch_reloc_p (r_type)
+ || micromips_branch_reloc_p (r_type))
+ && !bfd_link_relocatable (info)
&& h != NULL
&& h->use_plt_entry
&& h->root.plt.plist->comp_offset != MINUS_ONE
{
bfd_boolean micromips_p = MICROMIPS_P (abfd);
- sec = htab->splt;
+ sec = htab->root.splt;
symbol = (sec->output_section->vma
+ sec->output_offset
+ htab->plt_header_size
}
/* Make sure MIPS16 and microMIPS are not used together. */
- if ((r_type == R_MIPS16_26 && target_is_micromips_code_p)
+ if ((mips16_branch_reloc_p (r_type) && target_is_micromips_code_p)
|| (micromips_branch_reloc_p (r_type) && target_is_16_bit_code_p))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("MIPS16 and microMIPS functions cannot call each other"));
return bfd_reloc_notsupported;
}
because the assembly writer may have "known" that any definition of the
symbol would be 16-bit code, and that direct jumps were therefore
acceptable. */
- *cross_mode_jump_p = (!info->relocatable
+ *cross_mode_jump_p = (!bfd_link_relocatable (info)
&& !(h && h->root.root.type == bfd_link_hash_undefweak)
- && ((r_type == R_MIPS16_26 && !target_is_16_bit_code_p)
- || (r_type == R_MICROMIPS_26_S1
+ && ((mips16_branch_reloc_p (r_type)
+ && !target_is_16_bit_code_p)
+ || (micromips_branch_reloc_p (r_type)
&& !target_is_micromips_code_p)
- || ((r_type == R_MIPS_26 || r_type == R_MIPS_JALR)
+ || ((branch_reloc_p (r_type)
+ || r_type == R_MIPS_JALR)
&& (target_is_16_bit_code_p
|| target_is_micromips_code_p))));
if (!TLS_RELOC_P (r_type)
&& !elf_hash_table (info)->dynamic_sections_created)
/* This is a static link. We must initialize the GOT entry. */
- MIPS_ELF_PUT_WORD (dynobj, symbol, htab->sgot->contents + g);
+ MIPS_ELF_PUT_WORD (dynobj, symbol, htab->root.sgot->contents + g);
}
}
else if (!htab->is_vxworks
return bfd_reloc_continue;
case R_MIPS_16:
- value = symbol + _bfd_mips_elf_sign_extend (addend, 16);
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 16);
+ value = symbol + addend;
overflowed_p = mips_elf_overflow_p (value, 16);
break;
case R_MIPS_32:
case R_MIPS_REL32:
case R_MIPS_64:
- if ((info->shared
+ if ((bfd_link_pic (info)
|| (htab->root.dynamic_sections_created
&& h != NULL
&& h->root.def_dynamic
{
unsigned int shift;
- /* Make sure the target of JALX is word-aligned. Bit 0 must be
- the correct ISA mode selector and bit 1 must be 0. */
- if (*cross_mode_jump_p && (symbol & 3) != (r_type == R_MIPS_26))
- return bfd_reloc_outofrange;
-
/* Shift is 2, unusually, for microMIPS JALX. */
shift = (!*cross_mode_jump_p && r_type == R_MICROMIPS_26_S1) ? 1 : 2;
- if (was_local_p)
- value = addend | ((p + 4) & (0xfc000000 << shift));
- else
+ if (howto->partial_inplace && !section_p)
value = _bfd_mips_elf_sign_extend (addend, 26 + shift);
- value = (value + symbol) >> shift;
- if (!was_local_p && h->root.root.type != bfd_link_hash_undefweak)
+ else
+ value = addend;
+ value += symbol;
+
+ /* Make sure the target of a jump is suitably aligned. Bit 0 must
+ be the correct ISA mode selector except for weak undefined
+ symbols. */
+ if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ && (*cross_mode_jump_p
+ ? (value & 3) != (r_type == R_MIPS_26)
+ : (value & ((1 << shift) - 1)) != (r_type != R_MIPS_26)))
+ return bfd_reloc_outofrange;
+
+ value >>= shift;
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = (value >> 26) != ((p + 4) >> (26 + shift));
value &= howto->dst_mask;
}
value = mips_elf_high (addend + gp - p - 1);
else
value = mips_elf_high (addend + gp - p);
- overflowed_p = mips_elf_overflow_p (value, 16);
}
break;
to them before. */
if (was_local_p)
value += gp0;
- overflowed_p = mips_elf_overflow_p (value, 16);
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 16);
break;
case R_MIPS16_GOT16:
case R_MIPS_PC16:
case R_MIPS_GNU_REL16_S2:
- value = symbol + _bfd_mips_elf_sign_extend (addend, 18) - p;
- overflowed_p = mips_elf_overflow_p (value, 18);
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 18);
+
+ /* No need to exclude weak undefined symbols here as they resolve
+ to 0 and never set `*cross_mode_jump_p', so this alignment check
+ will never trigger for them. */
+ if (*cross_mode_jump_p
+ ? ((symbol + addend) & 3) != 1
+ : ((symbol + addend) & 3) != 0)
+ return bfd_reloc_outofrange;
+
+ value = symbol + addend - p;
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 18);
+ value >>= howto->rightshift;
+ value &= howto->dst_mask;
+ break;
+
+ case R_MIPS16_PC16_S1:
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 17);
+
+ if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ && (*cross_mode_jump_p
+ ? ((symbol + addend) & 3) != 0
+ : ((symbol + addend) & 1) == 0))
+ return bfd_reloc_outofrange;
+
+ value = symbol + addend - p;
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 17);
+ value >>= howto->rightshift;
+ value &= howto->dst_mask;
+ break;
+
+ case R_MIPS_PC21_S2:
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 23);
+
+ if ((symbol + addend) & 3)
+ return bfd_reloc_outofrange;
+
+ value = symbol + addend - p;
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 23);
+ value >>= howto->rightshift;
+ value &= howto->dst_mask;
+ break;
+
+ case R_MIPS_PC26_S2:
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 28);
+
+ if ((symbol + addend) & 3)
+ return bfd_reloc_outofrange;
+
+ value = symbol + addend - p;
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 28);
+ value >>= howto->rightshift;
+ value &= howto->dst_mask;
+ break;
+
+ case R_MIPS_PC18_S3:
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 21);
+
+ if ((symbol + addend) & 7)
+ return bfd_reloc_outofrange;
+
+ value = symbol + addend - ((p | 7) ^ 7);
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 21);
+ value >>= howto->rightshift;
+ value &= howto->dst_mask;
+ break;
+
+ case R_MIPS_PC19_S2:
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 21);
+
+ if ((symbol + addend) & 3)
+ return bfd_reloc_outofrange;
+
+ value = symbol + addend - p;
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 21);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
+ case R_MIPS_PCHI16:
+ value = mips_elf_high (symbol + addend - p);
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 16);
+ value &= howto->dst_mask;
+ break;
+
+ case R_MIPS_PCLO16:
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 16);
+ value = symbol + addend - p;
+ value &= howto->dst_mask;
+ break;
+
case R_MICROMIPS_PC7_S1:
- value = symbol + _bfd_mips_elf_sign_extend (addend, 8) - p;
- overflowed_p = mips_elf_overflow_p (value, 8);
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 8);
+
+ if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ && (*cross_mode_jump_p
+ ? ((symbol + addend + 2) & 3) != 0
+ : ((symbol + addend + 2) & 1) == 0))
+ return bfd_reloc_outofrange;
+
+ value = symbol + addend - p;
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 8);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MICROMIPS_PC10_S1:
- value = symbol + _bfd_mips_elf_sign_extend (addend, 11) - p;
- overflowed_p = mips_elf_overflow_p (value, 11);
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 11);
+
+ if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ && (*cross_mode_jump_p
+ ? ((symbol + addend + 2) & 3) != 0
+ : ((symbol + addend + 2) & 1) == 0))
+ return bfd_reloc_outofrange;
+
+ value = symbol + addend - p;
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 11);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MICROMIPS_PC16_S1:
- value = symbol + _bfd_mips_elf_sign_extend (addend, 17) - p;
- overflowed_p = mips_elf_overflow_p (value, 17);
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 17);
+
+ if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ && (*cross_mode_jump_p
+ ? ((symbol + addend) & 3) != 0
+ : ((symbol + addend) & 1) == 0))
+ return bfd_reloc_outofrange;
+
+ value = symbol + addend - p;
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 17);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MICROMIPS_PC23_S2:
- value = symbol + _bfd_mips_elf_sign_extend (addend, 25) - ((p | 3) ^ 3);
- overflowed_p = mips_elf_overflow_p (value, 25);
+ if (howto->partial_inplace)
+ addend = _bfd_mips_elf_sign_extend (addend, 25);
+ value = symbol + addend - ((p | 3) ^ 3);
+ if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = mips_elf_overflow_p (value, 25);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
when the symbol does not resolve locally. */
if (h != NULL && !SYMBOL_CALLS_LOCAL (info, &h->root))
return bfd_reloc_continue;
+ /* We can't optimize cross-mode jumps either. */
+ if (*cross_mode_jump_p)
+ return bfd_reloc_continue;
value = symbol + addend;
+ /* Neither we can non-instruction-aligned targets. */
+ if (r_type == R_MIPS_JALR ? (value & 3) != 0 : (value & 1) == 0)
+ return bfd_reloc_continue;
break;
case R_MIPS_PJUMP:
const Elf_Internal_Rela *relocation,
bfd *input_bfd, bfd_byte *contents)
{
- bfd_vma x;
+ bfd_vma x = 0;
bfd_byte *location = contents + relocation->r_offset;
+ unsigned int size = bfd_get_reloc_size (howto);
/* Obtain the bytes. */
- x = bfd_get ((8 * bfd_get_reloc_size (howto)), input_bfd, location);
+ if (size != 0)
+ x = bfd_get (8 * size, input_bfd, location);
return x;
}
bfd_vma x;
bfd_byte *location;
int r_type = ELF_R_TYPE (input_bfd, relocation->r_info);
+ unsigned int size;
/* Figure out where the relocation is occurring. */
location = contents + relocation->r_offset;
/* Set the field. */
x |= (value & howto->dst_mask);
- /* If required, turn JAL into JALX. */
+ /* Detect incorrect JALX usage. If required, turn JAL or BAL into JALX. */
+ if (!cross_mode_jump_p && jal_reloc_p (r_type))
+ {
+ bfd_vma opcode = x >> 26;
+
+ if (r_type == R_MIPS16_26 ? opcode == 0x7
+ : r_type == R_MICROMIPS_26_S1 ? opcode == 0x3c
+ : opcode == 0x1d)
+ {
+ info->callbacks->einfo
+ (_("%X%H: Unsupported JALX to the same ISA mode\n"),
+ input_bfd, input_section, relocation->r_offset);
+ return TRUE;
+ }
+ }
if (cross_mode_jump_p && jal_reloc_p (r_type))
{
bfd_boolean ok;
convert J or JALS to JALX. */
if (!ok)
{
- (*_bfd_error_handler)
- (_("%B: %A+0x%lx: Unsupported jump between ISA modes; consider recompiling with interlinking enabled."),
- input_bfd,
- input_section,
- (unsigned long) relocation->r_offset);
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
+ info->callbacks->einfo
+ (_("%X%H: Unsupported jump between ISA modes; "
+ "consider recompiling with interlinking enabled\n"),
+ input_bfd, input_section, relocation->r_offset);
+ return TRUE;
}
/* Make this the JALX opcode. */
x = (x & ~(0x3f << 26)) | (jalx_opcode << 26);
}
+ else if (cross_mode_jump_p && b_reloc_p (r_type))
+ {
+ bfd_boolean ok = FALSE;
+ bfd_vma opcode = x >> 16;
+ bfd_vma jalx_opcode = 0;
+ bfd_vma addr;
+ bfd_vma dest;
+
+ if (r_type == R_MICROMIPS_PC16_S1)
+ {
+ ok = opcode == 0x4060;
+ jalx_opcode = 0x3c;
+ value <<= 1;
+ }
+ else if (r_type == R_MIPS_PC16 || r_type == R_MIPS_GNU_REL16_S2)
+ {
+ ok = opcode == 0x411;
+ jalx_opcode = 0x1d;
+ value <<= 2;
+ }
+
+ if (ok && !bfd_link_pic (info))
+ {
+ addr = (input_section->output_section->vma
+ + input_section->output_offset
+ + relocation->r_offset
+ + 4);
+ dest = addr + (((value & 0x3ffff) ^ 0x20000) - 0x20000);
+
+ if ((addr >> 28) << 28 != (dest >> 28) << 28)
+ {
+ info->callbacks->einfo
+ (_("%X%H: Cannot convert branch between ISA modes "
+ "to JALX: relocation out of range\n"),
+ input_bfd, input_section, relocation->r_offset);
+ return TRUE;
+ }
+
+ /* Make this the JALX opcode. */
+ x = ((dest >> 2) & 0x3ffffff) | jalx_opcode << 26;
+ }
+ else if (!mips_elf_hash_table (info)->ignore_branch_isa)
+ {
+ info->callbacks->einfo
+ (_("%X%H: Unsupported branch between ISA modes\n"),
+ input_bfd, input_section, relocation->r_offset);
+ return TRUE;
+ }
+ }
/* Try converting JAL to BAL and J(AL)R to B(AL), if the target is in
range. */
- if (!info->relocatable
+ if (!bfd_link_relocatable (info)
&& !cross_mode_jump_p
&& ((JAL_TO_BAL_P (input_bfd)
&& r_type == R_MIPS_26
- && (x >> 26) == 0x3) /* jal addr */
+ && (x >> 26) == 0x3) /* jal addr */
|| (JALR_TO_BAL_P (input_bfd)
&& r_type == R_MIPS_JALR
- && x == 0x0320f809) /* jalr t9 */
+ && x == 0x0320f809) /* jalr t9 */
|| (JR_TO_B_P (input_bfd)
&& r_type == R_MIPS_JALR
- && x == 0x03200008))) /* jr t9 */
+ && (x & ~1) == 0x03200008))) /* jr t9 / jalr zero, t9 */
{
bfd_vma addr;
bfd_vma dest;
off = dest - addr;
if (off <= 0x1ffff && off >= -0x20000)
{
- if (x == 0x03200008) /* jr t9 */
+ if ((x & ~1) == 0x03200008) /* jr t9 / jalr zero, t9 */
x = 0x10000000 | (((bfd_vma) off >> 2) & 0xffff); /* b addr */
else
x = 0x04110000 | (((bfd_vma) off >> 2) & 0xffff); /* bal addr */
}
/* Put the value into the output. */
- bfd_put (8 * bfd_get_reloc_size (howto), input_bfd, x, location);
+ size = bfd_get_reloc_size (howto);
+ if (size != 0)
+ bfd_put (8 * size, input_bfd, x, location);
- _bfd_mips_elf_reloc_shuffle (input_bfd, r_type, !info->relocatable,
+ _bfd_mips_elf_reloc_shuffle (input_bfd, r_type, !bfd_link_relocatable (info),
location);
return TRUE;
case E_MIPS_MACH_LS3A:
return bfd_mach_mips_loongson_3a;
+ case E_MIPS_MACH_OCTEON3:
+ return bfd_mach_mips_octeon3;
+
case E_MIPS_MACH_OCTEON2:
return bfd_mach_mips_octeon2;
case E_MIPS_ARCH_64R2:
return bfd_mach_mipsisa64r2;
+
+ case E_MIPS_ARCH_32R6:
+ return bfd_mach_mipsisa32r6;
+
+ case E_MIPS_ARCH_64R6:
+ return bfd_mach_mipsisa64r6;
}
}
&intopt);
if (intopt.size < sizeof (Elf_External_Options))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: Warning: bad `%s' option size %u smaller than its header"),
abfd, MIPS_ELF_OPTIONS_SECTION_NAME (abfd), intopt.size);
break;
if (strcmp (name, ".sdata") == 0
|| strcmp (name, ".lit8") == 0
|| strcmp (name, ".lit4") == 0)
- {
- hdr->sh_flags |= SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL;
- hdr->sh_type = SHT_PROGBITS;
- }
+ hdr->sh_flags |= SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL;
else if (strcmp (name, ".srdata") == 0)
- {
- hdr->sh_flags |= SHF_ALLOC | SHF_MIPS_GPREL;
- hdr->sh_type = SHT_PROGBITS;
- }
+ hdr->sh_flags |= SHF_ALLOC | SHF_MIPS_GPREL;
else if (strcmp (name, ".compact_rel") == 0)
- {
- hdr->sh_flags = 0;
- hdr->sh_type = SHT_PROGBITS;
- }
+ hdr->sh_flags = 0;
else if (strcmp (name, ".rtproc") == 0)
{
if (hdr->sh_addralign != 0 && hdr->sh_entsize == 0)
&intopt);
if (intopt.size < sizeof (Elf_External_Options))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: Warning: bad `%s' option size %u smaller than its header"),
abfd, MIPS_ELF_OPTIONS_SECTION_NAME (abfd), intopt.size);
break;
elf_text_symbol->section = elf_text_section;
}
/* This code used to do *secp = bfd_und_section_ptr if
- info->shared. I don't know why, and that doesn't make sense,
+ bfd_link_pic (info). I don't know why, and that doesn't make sense,
so I took it out. */
*secp = mips_elf_tdata (abfd)->elf_text_section;
break;
elf_data_symbol->section = elf_data_section;
}
/* This code used to do *secp = bfd_und_section_ptr if
- info->shared. I don't know why, and that doesn't make sense,
+ bfd_link_pic (info). I don't know why, and that doesn't make sense,
so I took it out. */
*secp = mips_elf_tdata (abfd)->elf_data_section;
break;
}
if (SGI_COMPAT (abfd)
- && ! info->shared
+ && ! bfd_link_pic (info)
&& info->output_bfd->xvec == abfd->xvec
&& strcmp (*namep, "__rld_obj_head") == 0)
{
htab->sstubs = s;
if (!mips_elf_hash_table (info)->use_rld_obj_head
- && !info->shared
+ && bfd_link_executable (info)
&& bfd_get_linker_section (abfd, ".rld_map") == NULL)
{
s = bfd_make_section_anyway_with_flags (abfd, ".rld_map",
(void) bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
}
- if (!info->shared)
+ if (bfd_link_executable (info))
{
const char *name;
if (!_bfd_elf_create_dynamic_sections (abfd, info))
return FALSE;
- /* Cache the sections created above. */
- htab->splt = bfd_get_linker_section (abfd, ".plt");
- htab->sdynbss = bfd_get_linker_section (abfd, ".dynbss");
- if (htab->is_vxworks)
- {
- htab->srelbss = bfd_get_linker_section (abfd, ".rela.bss");
- htab->srelplt = bfd_get_linker_section (abfd, ".rela.plt");
- }
- else
- htab->srelplt = bfd_get_linker_section (abfd, ".rel.plt");
- if (!htab->sdynbss
- || (htab->is_vxworks && !htab->srelbss && !info->shared)
- || !htab->srelplt
- || !htab->splt)
- abort ();
-
/* Do the usual VxWorks handling. */
if (htab->is_vxworks
&& !elf_vxworks_create_dynamic_sections (abfd, info, &htab->srelplt2))
bfd_byte *location;
unsigned int r_type;
bfd_vma addend;
+ bfd_vma bytes;
r_type = ELF_R_TYPE (abfd, rel->r_info);
location = contents + rel->r_offset;
/* Get the addend, which is stored in the input file. */
_bfd_mips_elf_reloc_unshuffle (abfd, r_type, FALSE, location);
- addend = mips_elf_obtain_contents (howto, rel, abfd, contents);
+ bytes = mips_elf_obtain_contents (howto, rel, abfd, contents);
_bfd_mips_elf_reloc_shuffle (abfd, r_type, FALSE, location);
- return addend & howto->src_mask;
+ addend = bytes & howto->src_mask;
+
+ /* Shift is 2, unusually, for microMIPS JALX. Adjust the addend
+ accordingly. */
+ if (r_type == R_MICROMIPS_26_S1 && (bytes >> 26) == 0x3c)
+ addend <<= 1;
+
+ return addend;
}
/* REL is a relocation in ABFD that needs a partnering LO16 relocation
lo16_type = R_MIPS16_LO16;
else if (micromips_reloc_p (r_type))
lo16_type = R_MICROMIPS_LO16;
+ else if (r_type == R_MIPS_PCHI16)
+ lo16_type = R_MIPS_PCLO16;
else
lo16_type = R_MIPS_LO16;
bfd_vma addend;
reloc_howto_type *howto;
- if (info->relocatable)
+ if (bfd_link_relocatable (info))
return TRUE;
htab = mips_elf_hash_table (info);
r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end);
if (r_symndx == 0)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: Warning: cannot determine the target function for"
" stub section `%s'"),
abfd, name);
r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end);
if (r_symndx == 0)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: Warning: cannot determine the target function for"
" stub section `%s'"),
abfd, name);
h = NULL;
else if (r_symndx >= extsymoff + NUM_SHDR_ENTRIES (symtab_hdr))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: Malformed reloc detected for section %s"),
abfd, name);
bfd_set_error (bfd_error_bad_value);
elf_hash_table (info)->dynobj = dynobj = abfd;
if (!mips_elf_create_got_section (dynobj, info))
return FALSE;
- if (htab->is_vxworks && !info->shared)
+ if (htab->is_vxworks && !bfd_link_pic (info))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: GOT reloc at 0x%lx not expected in executables"),
abfd, (unsigned long) rel->r_offset);
bfd_set_error (bfd_error_bad_value);
one or using copy relocations or PLT entries. It is
usually better to do the former, unless the relocation is
against a read-only section. */
- if ((info->shared
+ if ((bfd_link_pic (info)
|| (h != NULL
&& !htab->is_vxworks
&& strcmp (h->root.root.string, "__gnu_local_gp") != 0
case R_MIPS_26:
case R_MIPS_PC16:
+ case R_MIPS_PC21_S2:
+ case R_MIPS_PC26_S2:
case R_MIPS16_26:
+ case R_MIPS16_PC16_S1:
case R_MICROMIPS_26_S1:
case R_MICROMIPS_PC7_S1:
case R_MICROMIPS_PC10_S1:
case R_MICROMIPS_CALL16:
if (h == NULL)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: CALL16 reloc at 0x%lx not against global symbol"),
abfd, (unsigned long) rel->r_offset);
bfd_set_error (bfd_error_bad_value);
/* This symbol is definitely not overridable. */
if (hmips->root.def_regular
- && ! (info->shared && ! info->symbolic
+ && ! (bfd_link_pic (info) && ! info->symbolic
&& ! hmips->root.forced_local))
h = NULL;
}
case R_MIPS_TLS_GOTTPREL:
case R_MIPS16_TLS_GOTTPREL:
case R_MICROMIPS_TLS_GOTTPREL:
- if (info->shared)
+ if (bfd_link_pic (info))
info->flags |= DF_STATIC_TLS;
/* Fall through */
if (sreloc == NULL)
return FALSE;
}
- if (info->shared && h == NULL)
+ if (bfd_link_pic (info) && h == NULL)
{
/* When creating a shared object, we must copy these
reloc types into the output file as R_MIPS_REL32
a PLT entry is not created because the symbol is satisfied
locally. */
if (h != NULL
- && jal_reloc_p (r_type)
+ && (branch_reloc_p (r_type)
+ || mips16_branch_reloc_p (r_type)
+ || micromips_branch_reloc_p (r_type))
&& !SYMBOL_CALLS_LOCAL (info, h))
{
if (h->plt.plist == NULL)
if (h->plt.plist == NULL)
return FALSE;
- if (r_type == R_MIPS_26)
+ if (branch_reloc_p (r_type))
h->plt.plist->need_mips = TRUE;
else
h->plt.plist->need_comp = TRUE;
not PIC, but we can create dynamic relocations and the result
will be fine. Also do not refuse R_MIPS_LO16, which can be
combined with R_MIPS_GOT16. */
- if (info->shared)
+ if (bfd_link_pic (info))
{
switch (r_type)
{
case R_MIPS_26:
case R_MICROMIPS_26_S1:
howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, FALSE);
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
abfd, howto->name,
(h) ? h->root.root.string : "a local symbol");
return TRUE;
}
\f
-bfd_boolean
-_bfd_mips_relax_section (bfd *abfd, asection *sec,
- struct bfd_link_info *link_info,
- bfd_boolean *again)
+/* Allocate space for global sym dynamic relocs. */
+
+static bfd_boolean
+allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
{
- Elf_Internal_Rela *internal_relocs;
- Elf_Internal_Rela *irel, *irelend;
- Elf_Internal_Shdr *symtab_hdr;
- bfd_byte *contents = NULL;
- size_t extsymoff;
- bfd_boolean changed_contents = FALSE;
- bfd_vma sec_start = sec->output_section->vma + sec->output_offset;
- Elf_Internal_Sym *isymbuf = NULL;
+ struct bfd_link_info *info = inf;
+ bfd *dynobj;
+ struct mips_elf_link_hash_entry *hmips;
+ struct mips_elf_link_hash_table *htab;
- /* We are not currently changing any sizes, so only one pass. */
- *again = FALSE;
+ htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
- if (link_info->relocatable)
- return TRUE;
+ dynobj = elf_hash_table (info)->dynobj;
+ hmips = (struct mips_elf_link_hash_entry *) h;
- internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
- link_info->keep_memory);
- if (internal_relocs == NULL)
+ /* VxWorks executables are handled elsewhere; we only need to
+ allocate relocations in shared objects. */
+ if (htab->is_vxworks && !bfd_link_pic (info))
return TRUE;
- irelend = internal_relocs + sec->reloc_count
- * get_elf_backend_data (abfd)->s->int_rels_per_ext_rel;
- symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
- extsymoff = (elf_bad_symtab (abfd)) ? 0 : symtab_hdr->sh_info;
+ /* Ignore indirect symbols. All relocations against such symbols
+ will be redirected to the target symbol. */
+ if (h->root.type == bfd_link_hash_indirect)
+ return TRUE;
- for (irel = internal_relocs; irel < irelend; irel++)
+ /* If this symbol is defined in a dynamic object, or we are creating
+ a shared library, we will need to copy any R_MIPS_32 or
+ R_MIPS_REL32 relocs against it into the output file. */
+ if (! bfd_link_relocatable (info)
+ && hmips->possibly_dynamic_relocs != 0
+ && (h->root.type == bfd_link_hash_defweak
+ || (!h->def_regular && !ELF_COMMON_DEF_P (h))
+ || bfd_link_pic (info)))
{
- bfd_vma symval;
- bfd_signed_vma sym_offset;
- unsigned int r_type;
- unsigned long r_symndx;
- asection *sym_sec;
- unsigned long instruction;
-
- /* Turn jalr into bgezal, and jr into beq, if they're marked
- with a JALR relocation, that indicate where they jump to.
- This saves some pipeline bubbles. */
- r_type = ELF_R_TYPE (abfd, irel->r_info);
- if (r_type != R_MIPS_JALR)
- continue;
+ bfd_boolean do_copy = TRUE;
- r_symndx = ELF_R_SYM (abfd, irel->r_info);
- /* Compute the address of the jump target. */
- if (r_symndx >= extsymoff)
+ if (h->root.type == bfd_link_hash_undefweak)
{
- struct mips_elf_link_hash_entry *h
- = ((struct mips_elf_link_hash_entry *)
- elf_sym_hashes (abfd) [r_symndx - extsymoff]);
-
- while (h->root.root.type == bfd_link_hash_indirect
- || h->root.root.type == bfd_link_hash_warning)
- h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link;
-
- /* If a symbol is undefined, or if it may be overridden,
- skip it. */
- if (! ((h->root.root.type == bfd_link_hash_defined
- || h->root.root.type == bfd_link_hash_defweak)
- && h->root.root.u.def.section)
- || (link_info->shared && ! link_info->symbolic
- && !h->root.forced_local))
- continue;
-
- sym_sec = h->root.root.u.def.section;
- if (sym_sec->output_section)
- symval = (h->root.root.u.def.value
- + sym_sec->output_section->vma
- + sym_sec->output_offset);
- else
- symval = h->root.root.u.def.value;
- }
- else
- {
- Elf_Internal_Sym *isym;
-
- /* Read this BFD's symbols if we haven't done so already. */
- if (isymbuf == NULL && symtab_hdr->sh_info != 0)
- {
- isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
- if (isymbuf == NULL)
- isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
- symtab_hdr->sh_info, 0,
- NULL, NULL, NULL);
- if (isymbuf == NULL)
- goto relax_return;
- }
-
- isym = isymbuf + r_symndx;
- if (isym->st_shndx == SHN_UNDEF)
- continue;
- else if (isym->st_shndx == SHN_ABS)
- sym_sec = bfd_abs_section_ptr;
- else if (isym->st_shndx == SHN_COMMON)
- sym_sec = bfd_com_section_ptr;
- else
- sym_sec
- = bfd_section_from_elf_index (abfd, isym->st_shndx);
- symval = isym->st_value
- + sym_sec->output_section->vma
- + sym_sec->output_offset;
- }
-
- /* Compute branch offset, from delay slot of the jump to the
- branch target. */
- sym_offset = (symval + irel->r_addend)
- - (sec_start + irel->r_offset + 4);
-
- /* Branch offset must be properly aligned. */
- if ((sym_offset & 3) != 0)
- continue;
-
- sym_offset >>= 2;
-
- /* Check that it's in range. */
- if (sym_offset < -0x8000 || sym_offset >= 0x8000)
- continue;
-
- /* Get the section contents if we haven't done so already. */
- if (!mips_elf_get_section_contents (abfd, sec, &contents))
- goto relax_return;
-
- instruction = bfd_get_32 (abfd, contents + irel->r_offset);
-
- /* If it was jalr <reg>, turn it into bgezal $zero, <target>. */
- if ((instruction & 0xfc1fffff) == 0x0000f809)
- instruction = 0x04110000;
- /* If it was jr <reg>, turn it into b <target>. */
- else if ((instruction & 0xfc1fffff) == 0x00000008)
- instruction = 0x10000000;
- else
- continue;
-
- instruction |= (sym_offset & 0xffff);
- bfd_put_32 (abfd, instruction, contents + irel->r_offset);
- changed_contents = TRUE;
- }
-
- if (contents != NULL
- && elf_section_data (sec)->this_hdr.contents != contents)
- {
- if (!changed_contents && !link_info->keep_memory)
- free (contents);
- else
- {
- /* Cache the section contents for elf_link_input_bfd. */
- elf_section_data (sec)->this_hdr.contents = contents;
- }
- }
- return TRUE;
-
- relax_return:
- if (contents != NULL
- && elf_section_data (sec)->this_hdr.contents != contents)
- free (contents);
- return FALSE;
-}
-\f
-/* Allocate space for global sym dynamic relocs. */
-
-static bfd_boolean
-allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
-{
- struct bfd_link_info *info = inf;
- bfd *dynobj;
- struct mips_elf_link_hash_entry *hmips;
- struct mips_elf_link_hash_table *htab;
-
- htab = mips_elf_hash_table (info);
- BFD_ASSERT (htab != NULL);
-
- dynobj = elf_hash_table (info)->dynobj;
- hmips = (struct mips_elf_link_hash_entry *) h;
-
- /* VxWorks executables are handled elsewhere; we only need to
- allocate relocations in shared objects. */
- if (htab->is_vxworks && !info->shared)
- return TRUE;
-
- /* Ignore indirect symbols. All relocations against such symbols
- will be redirected to the target symbol. */
- if (h->root.type == bfd_link_hash_indirect)
- return TRUE;
-
- /* If this symbol is defined in a dynamic object, or we are creating
- a shared library, we will need to copy any R_MIPS_32 or
- R_MIPS_REL32 relocs against it into the output file. */
- if (! info->relocatable
- && hmips->possibly_dynamic_relocs != 0
- && (h->root.type == bfd_link_hash_defweak
- || (!h->def_regular && !ELF_COMMON_DEF_P (h))
- || info->shared))
- {
- bfd_boolean do_copy = TRUE;
-
- if (h->root.type == bfd_link_hash_undefweak)
- {
- /* Do not copy relocations for undefined weak symbols with
- non-default visibility. */
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
- do_copy = FALSE;
+ /* Do not copy relocations for undefined weak symbols with
+ non-default visibility. */
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ do_copy = FALSE;
/* Make sure undefined weak symbols are output as a dynamic
symbol in PIEs. */
bfd *dynobj;
struct mips_elf_link_hash_entry *hmips;
struct mips_elf_link_hash_table *htab;
+ asection *s, *srel;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
for PLT offset calculations. */
if (htab->plt_mips_offset + htab->plt_comp_offset == 0)
{
- BFD_ASSERT (htab->sgotplt->size == 0);
+ BFD_ASSERT (htab->root.sgotplt->size == 0);
BFD_ASSERT (htab->plt_got_index == 0);
/* If we're using the PLT additions to the psABI, each PLT
Encourage better cache usage by aligning. We do this
lazily to avoid pessimizing traditional objects. */
if (!htab->is_vxworks
- && !bfd_set_section_alignment (dynobj, htab->splt, 5))
+ && !bfd_set_section_alignment (dynobj, htab->root.splt, 5))
return FALSE;
/* Make sure that .got.plt is word-aligned. We do this lazily
for the same reason as above. */
- if (!bfd_set_section_alignment (dynobj, htab->sgotplt,
+ if (!bfd_set_section_alignment (dynobj, htab->root.sgotplt,
MIPS_ELF_LOG_FILE_ALIGN (dynobj)))
return FALSE;
/* On VxWorks, also allocate room for the header's
.rela.plt.unloaded entries. */
- if (htab->is_vxworks && !info->shared)
+ if (htab->is_vxworks && !bfd_link_pic (info))
htab->srelplt2->size += 2 * sizeof (Elf32_External_Rela);
/* Now work out the sizes of individual PLT entries. */
- if (htab->is_vxworks && info->shared)
+ if (htab->is_vxworks && bfd_link_pic (info))
htab->plt_mips_entry_size
= 4 * ARRAY_SIZE (mips_vxworks_shared_plt_entry);
else if (htab->is_vxworks)
/* If the output file has no definition of the symbol, set the
symbol's value to the address of the stub. */
- if (!info->shared && !h->def_regular)
+ if (!bfd_link_pic (info) && !h->def_regular)
hmips->use_plt_entry = TRUE;
/* Make room for the R_MIPS_JUMP_SLOT relocation. */
- htab->srelplt->size += (htab->is_vxworks
- ? MIPS_ELF_RELA_SIZE (dynobj)
- : MIPS_ELF_REL_SIZE (dynobj));
+ htab->root.srelplt->size += (htab->is_vxworks
+ ? MIPS_ELF_RELA_SIZE (dynobj)
+ : MIPS_ELF_REL_SIZE (dynobj));
/* Make room for the .rela.plt.unloaded relocations. */
- if (htab->is_vxworks && !info->shared)
+ if (htab->is_vxworks && !bfd_link_pic (info))
htab->srelplt2->size += 3 * sizeof (Elf32_External_Rela);
/* All relocations against this symbol that could have been made
/* We're now relying on copy relocations. Complain if we have
some that we can't convert. */
- if (!htab->use_plts_and_copy_relocs || info->shared)
+ if (!htab->use_plts_and_copy_relocs || bfd_link_pic (info))
{
- (*_bfd_error_handler) (_("non-dynamic relocations refer to "
- "dynamic symbol %s"),
- h->root.root.string);
+ _bfd_error_handler (_("non-dynamic relocations refer to "
+ "dynamic symbol %s"),
+ h->root.root.string);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
both the dynamic object and the regular object will refer to the
same memory location for the variable. */
+ if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
+ {
+ s = htab->root.sdynrelro;
+ srel = htab->root.sreldynrelro;
+ }
+ else
+ {
+ s = htab->root.sdynbss;
+ srel = htab->root.srelbss;
+ }
if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
{
if (htab->is_vxworks)
- htab->srelbss->size += sizeof (Elf32_External_Rela);
+ srel->size += sizeof (Elf32_External_Rela);
else
mips_elf_allocate_dynamic_relocations (dynobj, info, 1);
h->needs_copy = 1;
dynamic will now refer to the local copy instead. */
hmips->possibly_dynamic_relocs = 0;
- return _bfd_elf_adjust_dynamic_copy (h, htab->sdynbss);
+ return _bfd_elf_adjust_dynamic_copy (info, h, s);
}
\f
/* This function is called after all the input files have been read,
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
- s = htab->sgot;
+ s = htab->root.sgot;
if (s == NULL)
return TRUE;
== g->global_gotno + g->local_gotno + g->tls_gotno);
/* Each VxWorks GOT entry needs an explicit relocation. */
- if (htab->is_vxworks && info->shared)
+ if (htab->is_vxworks && bfd_link_pic (info))
g->relocs += g->global_gotno + g->local_gotno - htab->reserved_gotno;
/* Allocate room for the TLS relocations. */
if (htab->is_vxworks)
val += 8;
- h->root.root.u.def.section = htab->splt;
+ h->root.root.u.def.section = htab->root.splt;
h->root.root.u.def.value = val;
h->root.other = other;
}
if (elf_hash_table (info)->dynamic_sections_created)
{
/* Set the contents of the .interp section to the interpreter. */
- if (info->executable)
+ if (bfd_link_executable (info) && !info->nointerp)
{
s = bfd_get_linker_section (dynobj, ".interp");
BFD_ASSERT (s != NULL);
Also create the _PROCEDURE_LINKAGE_TABLE_ symbol if we
haven't already in _bfd_elf_create_dynamic_sections. */
- if (htab->splt && htab->plt_mips_offset + htab->plt_comp_offset != 0)
+ if (htab->root.splt && htab->plt_mips_offset + htab->plt_comp_offset != 0)
{
bfd_boolean micromips_p = (MICROMIPS_P (output_bfd)
&& !htab->plt_mips_offset);
bfd_vma size;
BFD_ASSERT (htab->use_plts_and_copy_relocs);
- BFD_ASSERT (htab->sgotplt->size == 0);
- BFD_ASSERT (htab->splt->size == 0);
+ BFD_ASSERT (htab->root.sgotplt->size == 0);
+ BFD_ASSERT (htab->root.splt->size == 0);
- if (htab->is_vxworks && info->shared)
+ if (htab->is_vxworks && bfd_link_pic (info))
size = 4 * ARRAY_SIZE (mips_vxworks_shared_plt0_entry);
else if (htab->is_vxworks)
size = 4 * ARRAY_SIZE (mips_vxworks_exec_plt0_entry);
htab->plt_header_is_comp = micromips_p;
htab->plt_header_size = size;
- htab->splt->size = (size
- + htab->plt_mips_offset
- + htab->plt_comp_offset);
- htab->sgotplt->size = (htab->plt_got_index
- * MIPS_ELF_GOT_SIZE (dynobj));
+ htab->root.splt->size = (size
+ + htab->plt_mips_offset
+ + htab->plt_comp_offset);
+ htab->root.sgotplt->size = (htab->plt_got_index
+ * MIPS_ELF_GOT_SIZE (dynobj));
mips_elf_link_hash_traverse (htab, mips_elf_set_plt_sym_value, info);
if (htab->root.hplt == NULL)
{
- h = _bfd_elf_define_linkage_sym (dynobj, info, htab->splt,
+ h = _bfd_elf_define_linkage_sym (dynobj, info, htab->root.splt,
"_PROCEDURE_LINKAGE_TABLE_");
htab->root.hplt = h;
if (h == NULL)
info->combreloc = 0;
}
}
- else if (! info->shared
+ else if (bfd_link_executable (info)
&& ! mips_elf_hash_table (info)->use_rld_obj_head
&& CONST_STRNEQ (name, ".rld_map"))
{
else if (SGI_COMPAT (output_bfd)
&& CONST_STRNEQ (name, ".compact_rel"))
s->size += mips_elf_hash_table (info)->compact_rel_size;
- else if (s == htab->splt)
+ else if (s == htab->root.splt)
{
/* If the last PLT entry has a branch delay slot, allocate
room for an extra nop to fill the delay slot. This is
s->size += 4;
}
else if (! CONST_STRNEQ (name, ".init")
- && s != htab->sgot
- && s != htab->sgotplt
+ && s != htab->root.sgot
+ && s != htab->root.sgotplt
&& s != htab->sstubs
- && s != htab->sdynbss)
+ && s != htab->root.sdynbss
+ && s != htab->root.sdynrelro)
{
/* It's not one of our sections, so don't allocate space. */
continue;
DT_MIPS_RLD_MAP entry. This must come first because glibc
only fills in DT_MIPS_RLD_MAP (not DT_DEBUG) and some tools
may only look at the first one they see. */
- if (!info->shared
+ if (!bfd_link_pic (info)
&& !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_MAP, 0))
return FALSE;
+ if (bfd_link_executable (info)
+ && !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_MAP_REL, 0))
+ return FALSE;
+
/* The DT_DEBUG entry may be filled in by the dynamic linker and
used by the debugger. */
- if (info->executable
+ if (bfd_link_executable (info)
&& !SGI_COMPAT (output_bfd)
&& !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_DEBUG, 0))
return FALSE;
&& !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_OPTIONS, 0))
return FALSE;
}
- if (htab->splt->size > 0)
+ if (htab->root.splt->size > 0)
{
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTREL, 0))
return FALSE;
sym = local_syms + r_symndx;
/* Adjust REL's addend to account for section merging. */
- if (!info->relocatable)
+ if (!bfd_link_relocatable (info))
{
sec = local_sections[r_symndx];
_bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
name = bfd_elf_sym_name (input_bfd, symtab_hdr,
local_syms + r_symndx,
sec);
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: Can't find matching LO16 reloc against `%s' for %s at 0x%lx in section `%A'"),
input_bfd, input_section, name, howto->name,
rel->r_offset);
local_syms, local_sections, rel);
}
- if (info->relocatable)
+ if (bfd_link_relocatable (info))
{
if (r_type == R_MIPS_64 && ! NEWABI_P (output_bfd)
&& bfd_big_endian (input_bfd))
htab->small_data_overflow_reported = TRUE;
(*info->callbacks->einfo) ("%P: %s\n", msg);
}
- if (! ((*info->callbacks->reloc_overflow)
- (info, NULL, name, howto->name, (bfd_vma) 0,
- input_bfd, input_section, rel->r_offset)))
- return FALSE;
+ (*info->callbacks->reloc_overflow)
+ (info, NULL, name, howto->name, (bfd_vma) 0,
+ input_bfd, input_section, rel->r_offset);
}
break;
break;
case bfd_reloc_outofrange:
+ msg = NULL;
if (jal_reloc_p (howto->type))
+ msg = (cross_mode_jump_p
+ ? _("Cannot convert a jump to JALX "
+ "for a non-word-aligned address")
+ : (howto->type == R_MIPS16_26
+ ? _("Jump to a non-word-aligned address")
+ : _("Jump to a non-instruction-aligned address")));
+ else if (b_reloc_p (howto->type))
+ msg = (cross_mode_jump_p
+ ? _("Cannot convert a branch to JALX "
+ "for a non-word-aligned address")
+ : _("Branch to a non-instruction-aligned address"));
+ else if (aligned_pcrel_reloc_p (howto->type))
+ msg = _("PC-relative load from unaligned address");
+ if (msg)
{
- msg = _("JALX to a non-word-aligned address");
- info->callbacks->warning
- (info, msg, name, input_bfd, input_section, rel->r_offset);
- return FALSE;
+ info->callbacks->einfo
+ ("%X%H: %s\n", input_bfd, input_section, rel->r_offset, msg);
+ break;
}
/* Fall through. */
BFD_ASSERT (htab->use_plts_and_copy_relocs);
BFD_ASSERT (h->dynindx != -1);
- BFD_ASSERT (htab->splt != NULL);
+ BFD_ASSERT (htab->root.splt != NULL);
BFD_ASSERT (got_index != MINUS_ONE);
BFD_ASSERT (!h->def_regular);
/* Calculate the address of the PLT header. */
isa_bit = htab->plt_header_is_comp;
- header_address = (htab->splt->output_section->vma
- + htab->splt->output_offset + isa_bit);
+ header_address = (htab->root.splt->output_section->vma
+ + htab->root.splt->output_offset + isa_bit);
/* Calculate the address of the .got.plt entry. */
- got_address = (htab->sgotplt->output_section->vma
- + htab->sgotplt->output_offset
+ got_address = (htab->root.sgotplt->output_section->vma
+ + htab->root.sgotplt->output_offset
+ got_index * MIPS_ELF_GOT_SIZE (dynobj));
got_address_high = ((got_address + 0x8000) >> 16) & 0xffff;
got_address_low = got_address & 0xffff;
/* Initially point the .got.plt entry at the PLT header. */
- loc = (htab->sgotplt->contents + got_index * MIPS_ELF_GOT_SIZE (dynobj));
+ loc = (htab->root.sgotplt->contents + got_index * MIPS_ELF_GOT_SIZE (dynobj));
if (ABI_64_P (output_bfd))
bfd_put_64 (output_bfd, header_address, loc);
else
plt_offset = htab->plt_header_size + h->plt.plist->mips_offset;
- BFD_ASSERT (plt_offset <= htab->splt->size);
+ BFD_ASSERT (plt_offset <= htab->root.splt->size);
/* Find out where the .plt entry should go. */
- loc = htab->splt->contents + plt_offset;
+ loc = htab->root.splt->contents + plt_offset;
/* Pick the load opcode. */
load = MIPS_ELF_LOAD_WORD (output_bfd);
/* Fill in the PLT entry itself. */
- plt_entry = mips_exec_plt_entry;
+
+ if (MIPSR6_P (output_bfd))
+ plt_entry = mipsr6_exec_plt_entry;
+ else
+ plt_entry = mips_exec_plt_entry;
bfd_put_32 (output_bfd, plt_entry[0] | got_address_high, loc);
bfd_put_32 (output_bfd, plt_entry[1] | got_address_low | load,
loc + 4);
plt_offset = (htab->plt_header_size + htab->plt_mips_offset
+ h->plt.plist->comp_offset);
- BFD_ASSERT (plt_offset <= htab->splt->size);
+ BFD_ASSERT (plt_offset <= htab->root.splt->size);
/* Find out where the .plt entry should go. */
- loc = htab->splt->contents + plt_offset;
+ loc = htab->root.splt->contents + plt_offset;
/* Fill in the PLT entry itself. */
if (!MICROMIPS_P (output_bfd))
BFD_ASSERT (got_address % 4 == 0);
- loc_address = (htab->splt->output_section->vma
- + htab->splt->output_offset + plt_offset);
+ loc_address = (htab->root.splt->output_section->vma
+ + htab->root.splt->output_offset + plt_offset);
gotpc_offset = got_address - ((loc_address | 3) ^ 3);
/* ADDIUPC has a span of +/-16MB, check we're in range. */
if (gotpc_offset + 0x1000000 >= 0x2000000)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: `%A' offset of %ld from `%A' "
"beyond the range of ADDIUPC"),
output_bfd,
- htab->sgotplt->output_section,
- htab->splt->output_section,
+ htab->root.sgotplt->output_section,
+ htab->root.splt->output_section,
(long) gotpc_offset);
bfd_set_error (bfd_error_no_error);
return FALSE;
}
/* Emit an R_MIPS_JUMP_SLOT relocation against the .got.plt entry. */
- mips_elf_output_dynamic_relocation (output_bfd, htab->srelplt,
+ mips_elf_output_dynamic_relocation (output_bfd, htab->root.srelplt,
got_index - 2, h->dynindx,
R_MIPS_JUMP_SLOT, got_address);
if (htab->insn32)
{
bfd_put_micromips_32 (output_bfd,
- STUB_MOVE32_MICROMIPS (output_bfd),
- stub + idx);
+ STUB_MOVE32_MICROMIPS, stub + idx);
idx += 4;
}
else
idx = 0;
bfd_put_32 (output_bfd, STUB_LW (output_bfd), stub + idx);
idx += 4;
- bfd_put_32 (output_bfd, STUB_MOVE (output_bfd), stub + idx);
+ bfd_put_32 (output_bfd, STUB_MOVE, stub + idx);
idx += 4;
if (stub_size == stub_big_size)
{
BFD_ASSERT (h->dynindx != -1
|| h->forced_local);
- sgot = htab->sgot;
+ sgot = htab->root.sgot;
g = htab->got_info;
BFD_ASSERT (g != NULL);
&e)))
{
offset = p->gotidx;
- BFD_ASSERT (offset > 0 && offset < htab->sgot->size);
- if (info->shared
+ BFD_ASSERT (offset > 0 && offset < htab->root.sgot->size);
+ if (bfd_link_pic (info)
|| (elf_hash_table (info)->dynamic_sections_created
&& p->d.h != NULL
&& p->d.h->root.def_dynamic
gotplt_index = h->plt.plist->gotplt_index;
BFD_ASSERT (h->dynindx != -1);
- BFD_ASSERT (htab->splt != NULL);
+ BFD_ASSERT (htab->root.splt != NULL);
BFD_ASSERT (gotplt_index != MINUS_ONE);
- BFD_ASSERT (plt_offset <= htab->splt->size);
+ BFD_ASSERT (plt_offset <= htab->root.splt->size);
/* Calculate the address of the .plt entry. */
- plt_address = (htab->splt->output_section->vma
- + htab->splt->output_offset
+ plt_address = (htab->root.splt->output_section->vma
+ + htab->root.splt->output_offset
+ plt_offset);
/* Calculate the address of the .got.plt entry. */
- got_address = (htab->sgotplt->output_section->vma
- + htab->sgotplt->output_offset
+ got_address = (htab->root.sgotplt->output_section->vma
+ + htab->root.sgotplt->output_offset
+ gotplt_index * MIPS_ELF_GOT_SIZE (output_bfd));
/* Calculate the offset of the .got.plt entry from
/* Fill in the initial value of the .got.plt entry. */
bfd_put_32 (output_bfd, plt_address,
- (htab->sgotplt->contents
+ (htab->root.sgotplt->contents
+ gotplt_index * MIPS_ELF_GOT_SIZE (output_bfd)));
/* Find out where the .plt entry should go. */
- loc = htab->splt->contents + plt_offset;
+ loc = htab->root.splt->contents + plt_offset;
- if (info->shared)
+ if (bfd_link_pic (info))
{
plt_entry = mips_vxworks_shared_plt_entry;
bfd_put_32 (output_bfd, plt_entry[0] | branch_offset, loc);
}
/* Emit an R_MIPS_JUMP_SLOT relocation against the .got.plt entry. */
- loc = (htab->srelplt->contents
+ loc = (htab->root.srelplt->contents
+ gotplt_index * sizeof (Elf32_External_Rela));
rel.r_offset = got_address;
rel.r_info = ELF32_R_INFO (h->dynindx, R_MIPS_JUMP_SLOT);
BFD_ASSERT (h->dynindx != -1 || h->forced_local);
- sgot = htab->sgot;
+ sgot = htab->root.sgot;
g = htab->got_info;
BFD_ASSERT (g != NULL);
if (h->needs_copy)
{
Elf_Internal_Rela rel;
+ asection *srel;
+ bfd_byte *loc;
BFD_ASSERT (h->dynindx != -1);
+ h->root.u.def.value);
rel.r_info = ELF32_R_INFO (h->dynindx, R_MIPS_COPY);
rel.r_addend = 0;
- bfd_elf32_swap_reloca_out (output_bfd, &rel,
- htab->srelbss->contents
- + (htab->srelbss->reloc_count
- * sizeof (Elf32_External_Rela)));
- ++htab->srelbss->reloc_count;
+ if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
+ srel = htab->root.sreldynrelro;
+ else
+ srel = htab->root.srelbss;
+ loc = srel->contents + srel->reloc_count * sizeof (Elf32_External_Rela);
+ bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
+ ++srel->reloc_count;
}
/* If this is a mips16/microMIPS symbol, force the value to be even. */
plt_entry = micromips_o32_exec_plt0_entry;
/* Calculate the value of .got.plt. */
- gotplt_value = (htab->sgotplt->output_section->vma
- + htab->sgotplt->output_offset);
+ gotplt_value = (htab->root.sgotplt->output_section->vma
+ + htab->root.sgotplt->output_offset);
gotplt_value_high = ((gotplt_value + 0x8000) >> 16) & 0xffff;
gotplt_value_low = gotplt_value & 0xffff;
|| ~(gotplt_value | 0x7fffffff) == 0);
/* Install the PLT header. */
- loc = htab->splt->contents;
+ loc = htab->root.splt->contents;
if (plt_entry == micromips_o32_exec_plt0_entry)
{
bfd_vma gotpc_offset;
BFD_ASSERT (gotplt_value % 4 == 0);
- loc_address = (htab->splt->output_section->vma
- + htab->splt->output_offset);
+ loc_address = (htab->root.splt->output_section->vma
+ + htab->root.splt->output_offset);
gotpc_offset = gotplt_value - ((loc_address | 3) ^ 3);
/* ADDIUPC has a span of +/-16MB, check we're in range. */
if (gotpc_offset + 0x1000000 >= 0x2000000)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: `%A' offset of %ld from `%A' beyond the range of ADDIUPC"),
output_bfd,
- htab->sgotplt->output_section,
- htab->splt->output_section,
+ htab->root.sgotplt->output_section,
+ htab->root.splt->output_section,
(long) gotpc_offset);
bfd_set_error (bfd_error_no_error);
return FALSE;
got_value_low = got_value & 0xffff;
/* Calculate the address of the PLT header. */
- plt_address = htab->splt->output_section->vma + htab->splt->output_offset;
+ plt_address = (htab->root.splt->output_section->vma
+ + htab->root.splt->output_offset);
/* Install the PLT header. */
- loc = htab->splt->contents;
+ loc = htab->root.splt->contents;
bfd_put_32 (output_bfd, plt_entry[0] | got_value_high, loc);
bfd_put_32 (output_bfd, plt_entry[1] | got_value_low, loc + 4);
bfd_put_32 (output_bfd, plt_entry[2], loc + 8);
/* We just need to copy the entry byte-by-byte. */
for (i = 0; i < ARRAY_SIZE (mips_vxworks_shared_plt0_entry); i++)
bfd_put_32 (output_bfd, mips_vxworks_shared_plt0_entry[i],
- htab->splt->contents + i * 4);
+ htab->root.splt->contents + i * 4);
}
/* Finish up the dynamic sections. */
sdyn = bfd_get_linker_section (dynobj, ".dynamic");
- sgot = htab->sgot;
+ sgot = htab->root.sgot;
gg = htab->got_info;
if (elf_hash_table (info)->dynamic_sections_created)
break;
case DT_PLTGOT:
- s = htab->sgot;
+ s = htab->root.sgot;
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
break;
case DT_MIPS_PLTGOT:
- s = htab->sgotplt;
+ s = htab->root.sgotplt;
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
break;
}
/* In case if we don't have global got symbols we default
to setting DT_MIPS_GOTSYM to the same value as
- DT_MIPS_SYMTABNO, so we just fall through. */
+ DT_MIPS_SYMTABNO. */
+ /* Fall through. */
case DT_MIPS_SYMTABNO:
name = ".dynsym";
elemsize = MIPS_ELF_SYM_SIZE (output_bfd);
- s = bfd_get_section_by_name (output_bfd, name);
- BFD_ASSERT (s != NULL);
+ s = bfd_get_linker_section (dynobj, name);
- dyn.d_un.d_val = s->size / elemsize;
+ if (s != NULL)
+ dyn.d_un.d_val = s->size / elemsize;
+ else
+ dyn.d_un.d_val = 0;
break;
case DT_MIPS_HIPAGENO:
break;
}
s = h->root.u.def.section;
+
+ /* The MIPS_RLD_MAP tag stores the absolute address of the
+ debug pointer. */
dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
+ h->root.u.def.value);
}
break;
+ case DT_MIPS_RLD_MAP_REL:
+ {
+ struct elf_link_hash_entry *h;
+ bfd_vma dt_addr, rld_addr;
+ h = mips_elf_hash_table (info)->rld_symbol;
+ if (!h)
+ {
+ dyn_to_skip = MIPS_ELF_DYN_SIZE (dynobj);
+ swap_out_p = FALSE;
+ break;
+ }
+ s = h->root.u.def.section;
+
+ /* The MIPS_RLD_MAP_REL tag stores the offset to the debug
+ pointer, relative to the address of the tag. */
+ dt_addr = (sdyn->output_section->vma + sdyn->output_offset
+ + (b - sdyn->contents));
+ rld_addr = (s->output_section->vma + s->output_offset
+ + h->root.u.def.value);
+ dyn.d_un.d_ptr = rld_addr - dt_addr;
+ }
+ break;
+
case DT_MIPS_OPTIONS:
s = (bfd_get_section_by_name
(output_bfd, MIPS_ELF_OPTIONS_SECTION_NAME (output_bfd)));
dyn.d_un.d_ptr = s->vma;
break;
- case DT_RELASZ:
- BFD_ASSERT (htab->is_vxworks);
- /* The count does not include the JUMP_SLOT relocations. */
- if (htab->srelplt)
- dyn.d_un.d_val -= htab->srelplt->size;
- break;
-
case DT_PLTREL:
BFD_ASSERT (htab->use_plts_and_copy_relocs);
if (htab->is_vxworks)
case DT_PLTRELSZ:
BFD_ASSERT (htab->use_plts_and_copy_relocs);
- dyn.d_un.d_val = htab->srelplt->size;
+ dyn.d_un.d_val = htab->root.srelplt->size;
break;
case DT_JMPREL:
BFD_ASSERT (htab->use_plts_and_copy_relocs);
- dyn.d_un.d_ptr = (htab->srelplt->output_section->vma
- + htab->srelplt->output_offset);
+ dyn.d_un.d_ptr = (htab->root.srelplt->output_section->vma
+ + htab->root.srelplt->output_offset);
break;
case DT_TEXTREL:
sgot->contents
+ got_index++ * MIPS_ELF_GOT_SIZE (output_bfd));
- if (! info->shared)
+ if (! bfd_link_pic (info))
continue;
for (; got_index < g->local_gotno; got_index++)
}
}
- if (htab->splt && htab->splt->size > 0)
+ if (htab->root.splt && htab->root.splt->size > 0)
{
if (htab->is_vxworks)
{
- if (info->shared)
+ if (bfd_link_pic (info))
mips_vxworks_finish_shared_plt (output_bfd, info);
else
mips_vxworks_finish_exec_plt (output_bfd, info);
}
else
{
- BFD_ASSERT (!info->shared);
+ BFD_ASSERT (!bfd_link_pic (info));
if (!mips_finish_exec_plt (output_bfd, info))
return FALSE;
}
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON;
break;
+ case bfd_mach_mips_octeon3:
+ val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON3;
+ break;
+
case bfd_mach_mips_xlr:
val = E_MIPS_ARCH_64 | E_MIPS_MACH_XLR;
break;
case bfd_mach_mipsisa64r5:
val = E_MIPS_ARCH_64R2;
break;
+
+ case bfd_mach_mipsisa32r6:
+ val = E_MIPS_ARCH_32R6;
+ break;
+
+ case bfd_mach_mipsisa64r6:
+ val = E_MIPS_ARCH_64R6;
+ break;
}
elf_elfheader (abfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH);
elf_elfheader (abfd)->e_flags |= val;
}
+/* Whether to sort relocs output by ld -r or ld --emit-relocs, by r_offset.
+ Don't do so for code sections. We want to keep ordering of HI16/LO16
+ as is. On the other hand, elf-eh-frame.c processing requires .eh_frame
+ relocs to be sorted. */
+
+bfd_boolean
+_bfd_mips_elf_sort_relocs_p (asection *sec)
+{
+ return (sec->flags & SEC_CODE) == 0;
+}
+
+
/* The final processing done just before writing out a MIPS ELF object
file. This gets the MIPS architecture right based on the machine
number. This is used by both the 32-bit and the 64-bit ABI. */
unsigned long r_symndx;
struct elf_link_hash_entry *h;
- if (info->relocatable)
+ if (bfd_link_relocatable (info))
return TRUE;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
if (skip != 0)
{
mips_elf_section_data (o)->u.tdata = tdata;
+ if (o->rawsize == 0)
+ o->rawsize = o->size;
o->size -= skip * PDR_SIZE;
ret = TRUE;
}
};
bfd_boolean
-_bfd_mips_elf_find_nearest_line (bfd *abfd, asection *section,
- asymbol **symbols, bfd_vma offset,
+_bfd_mips_elf_find_nearest_line (bfd *abfd, asymbol **symbols,
+ asection *section, bfd_vma offset,
const char **filename_ptr,
const char **functionname_ptr,
- unsigned int *line_ptr)
+ unsigned int *line_ptr,
+ unsigned int *discriminator_ptr)
{
asection *msec;
- if (_bfd_dwarf1_find_nearest_line (abfd, section, symbols, offset,
+ if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
filename_ptr, functionname_ptr,
- line_ptr))
+ line_ptr, discriminator_ptr,
+ dwarf_debug_sections,
+ ABI_64_P (abfd) ? 8 : 0,
+ &elf_tdata (abfd)->dwarf2_find_line_info))
return TRUE;
- if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
- section, symbols, offset,
+ if (_bfd_dwarf1_find_nearest_line (abfd, symbols, section, offset,
filename_ptr, functionname_ptr,
- line_ptr, NULL, ABI_64_P (abfd) ? 8 : 0,
- &elf_tdata (abfd)->dwarf2_find_line_info))
+ line_ptr))
return TRUE;
msec = bfd_get_section_by_name (abfd, ".mdebug");
/* Fall back on the generic ELF find_nearest_line routine. */
- return _bfd_elf_find_nearest_line (abfd, section, symbols, offset,
+ return _bfd_elf_find_nearest_line (abfd, symbols, section, offset,
filename_ptr, functionname_ptr,
- line_ptr);
+ line_ptr, discriminator_ptr);
}
bfd_boolean
switch (r)
{
case bfd_reloc_undefined:
- if (!((*link_info->callbacks->undefined_symbol)
- (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
- input_bfd, input_section, (*parent)->address, TRUE)))
- goto error_return;
+ (*link_info->callbacks->undefined_symbol)
+ (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
+ input_bfd, input_section, (*parent)->address, TRUE);
break;
case bfd_reloc_dangerous:
BFD_ASSERT (error_message != NULL);
- if (!((*link_info->callbacks->reloc_dangerous)
- (link_info, error_message, input_bfd, input_section,
- (*parent)->address)))
- goto error_return;
+ (*link_info->callbacks->reloc_dangerous)
+ (link_info, error_message,
+ input_bfd, input_section, (*parent)->address);
break;
case bfd_reloc_overflow:
- if (!((*link_info->callbacks->reloc_overflow)
- (link_info, NULL,
- bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
- (*parent)->howto->name, (*parent)->addend,
- input_bfd, input_section, (*parent)->address)))
- goto error_return;
+ (*link_info->callbacks->reloc_overflow)
+ (link_info, NULL,
+ bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
+ (*parent)->howto->name, (*parent)->addend,
+ input_bfd, input_section, (*parent)->address);
break;
case bfd_reloc_outofrange:
default:
/* Switch between a 5-bit register index and its 3-bit shorthand. */
-#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0x17) + 2)
-#define BZ16_REG_FIELD(r) \
- (((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 7)
+#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0xf) + 2)
+#define BZ16_REG_FIELD(r) (((r) & 7) << 7)
/* 32-bit instructions with a delay slot. */
#define MOVE16_RS_FIELD(r) (((r) & 0x1f) )
static const struct opcode_descriptor move_insns_32[] = {
- { /* "move", "d,s", */ 0x00000150, 0xffe007ff }, /* addu d,s,$0 */
{ /* "move", "d,s", */ 0x00000290, 0xffe007ff }, /* or d,s,$0 */
+ { /* "move", "d,s", */ 0x00000150, 0xffe007ff }, /* addu d,s,$0 */
{ 0, 0 } /* End marker for find_match(). */
};
this section does not have relocs, or if this is not a
code section. */
- if (link_info->relocatable
+ if (bfd_link_relocatable (link_info)
|| (sec->flags & SEC_RELOC) == 0
|| sec->reloc_count == 0
|| (sec->flags & SEC_CODE) == 0)
}
/* A function that the linker calls to select between all or only
- 32-bit microMIPS instructions. */
+ 32-bit microMIPS instructions, and between making or ignoring
+ branch relocation checks for invalid transitions between ISA modes. */
void
-_bfd_mips_elf_insn32 (struct bfd_link_info *info, bfd_boolean on)
+_bfd_mips_elf_linker_flags (struct bfd_link_info *info, bfd_boolean insn32,
+ bfd_boolean ignore_branch_isa)
{
- mips_elf_hash_table (info)->insn32 = on;
+ mips_elf_hash_table (info)->insn32 = insn32;
+ mips_elf_hash_table (info)->ignore_branch_isa = ignore_branch_isa;
}
\f
-/* Return the .MIPS.abiflags value representing each ISA Extension. */
-
-unsigned int
-bfd_mips_isa_ext (bfd *abfd)
-{
- switch (bfd_get_mach (abfd))
- {
- case bfd_mach_mips3900:
- return AFL_EXT_3900;
- case bfd_mach_mips4010:
- return AFL_EXT_4010;
- case bfd_mach_mips4100:
- return AFL_EXT_4100;
- case bfd_mach_mips4111:
- return AFL_EXT_4111;
- case bfd_mach_mips4120:
- return AFL_EXT_4120;
- case bfd_mach_mips4650:
- return AFL_EXT_4650;
- case bfd_mach_mips5400:
- return AFL_EXT_5400;
- case bfd_mach_mips5500:
- return AFL_EXT_5500;
- case bfd_mach_mips5900:
- return AFL_EXT_5900;
- case bfd_mach_mips10000:
- return AFL_EXT_10000;
- case bfd_mach_mips_loongson_2e:
- return AFL_EXT_LOONGSON_2E;
- case bfd_mach_mips_loongson_2f:
- return AFL_EXT_LOONGSON_2F;
- case bfd_mach_mips_loongson_3a:
- return AFL_EXT_LOONGSON_3A;
- case bfd_mach_mips_sb1:
- return AFL_EXT_SB1;
- case bfd_mach_mips_octeon:
- return AFL_EXT_OCTEON;
- case bfd_mach_mips_octeonp:
- return AFL_EXT_OCTEONP;
- case bfd_mach_mips_octeon2:
- return AFL_EXT_OCTEON2;
- case bfd_mach_mips_xlr:
- return AFL_EXT_XLR;
- }
- return 0;
-}
-
-/* Update the isa_level, isa_rev, isa_ext fields of abiflags. */
+/* Structure for saying that BFD machine EXTENSION extends BASE. */
-static void
-update_mips_abiflags_isa (bfd *abfd, Elf_Internal_ABIFlags_v0 *abiflags)
+struct mips_mach_extension
{
- switch (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH)
- {
- case E_MIPS_ARCH_1:
- abiflags->isa_level = 1;
- abiflags->isa_rev = 0;
- break;
- case E_MIPS_ARCH_2:
- abiflags->isa_level = 2;
- abiflags->isa_rev = 0;
- break;
- case E_MIPS_ARCH_3:
- abiflags->isa_level = 3;
- abiflags->isa_rev = 0;
- break;
- case E_MIPS_ARCH_4:
- abiflags->isa_level = 4;
- abiflags->isa_rev = 0;
- break;
- case E_MIPS_ARCH_5:
- abiflags->isa_level = 5;
- abiflags->isa_rev = 0;
- break;
- case E_MIPS_ARCH_32:
- abiflags->isa_level = 32;
- abiflags->isa_rev = 1;
- break;
- case E_MIPS_ARCH_32R2:
- abiflags->isa_level = 32;
- /* Handle MIPS32r3 and MIPS32r5 which do not have a header flag. */
- if (abiflags->isa_rev < 2)
- abiflags->isa_rev = 2;
- break;
- case E_MIPS_ARCH_64:
- abiflags->isa_level = 64;
- abiflags->isa_rev = 1;
- break;
- case E_MIPS_ARCH_64R2:
- /* Handle MIPS64r3 and MIPS64r5 which do not have a header flag. */
- abiflags->isa_level = 64;
- if (abiflags->isa_rev < 2)
- abiflags->isa_rev = 2;
- break;
- default:
- (*_bfd_error_handler)
- (_("%B: Unknown architecture %s"),
- abfd, bfd_printable_name (abfd));
- }
+ unsigned long extension, base;
+};
- abiflags->isa_ext = bfd_mips_isa_ext (abfd);
-}
-/* Return true if the given ELF header flags describe a 32-bit binary. */
+/* An array describing how BFD machines relate to one another. The entries
+ are ordered topologically with MIPS I extensions listed last. */
-static bfd_boolean
-mips_32bit_flags_p (flagword flags)
+static const struct mips_mach_extension mips_mach_extensions[] =
{
- return ((flags & EF_MIPS_32BITMODE) != 0
- || (flags & EF_MIPS_ABI) == E_MIPS_ABI_O32
- || (flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI32
- || (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_1
- || (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_2
- || (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32
- || (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R2);
-}
-
-/* Infer the content of the ABI flags based on the elf header. */
+ /* MIPS64r2 extensions. */
+ { bfd_mach_mips_octeon3, bfd_mach_mips_octeon2 },
+ { bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
+ { bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
+ { bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
+ { bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64r2 },
-static void
-infer_mips_abiflags (bfd *abfd, Elf_Internal_ABIFlags_v0* abiflags)
-{
- obj_attribute *in_attr;
+ /* MIPS64 extensions. */
+ { bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
+ { bfd_mach_mips_sb1, bfd_mach_mipsisa64 },
+ { bfd_mach_mips_xlr, bfd_mach_mipsisa64 },
- memset (abiflags, 0, sizeof (Elf_Internal_ABIFlags_v0));
- update_mips_abiflags_isa (abfd, abiflags);
+ /* MIPS V extensions. */
+ { bfd_mach_mipsisa64, bfd_mach_mips5 },
- if (mips_32bit_flags_p (elf_elfheader (abfd)->e_flags))
- abiflags->gpr_size = AFL_REG_32;
- else
- abiflags->gpr_size = AFL_REG_64;
+ /* R10000 extensions. */
+ { bfd_mach_mips12000, bfd_mach_mips10000 },
+ { bfd_mach_mips14000, bfd_mach_mips10000 },
+ { bfd_mach_mips16000, bfd_mach_mips10000 },
- abiflags->cpr1_size = AFL_REG_NONE;
+ /* R5000 extensions. Note: the vr5500 ISA is an extension of the core
+ vr5400 ISA, but doesn't include the multimedia stuff. It seems
+ better to allow vr5400 and vr5500 code to be merged anyway, since
+ many libraries will just use the core ISA. Perhaps we could add
+ some sort of ASE flag if this ever proves a problem. */
+ { bfd_mach_mips5500, bfd_mach_mips5400 },
+ { bfd_mach_mips5400, bfd_mach_mips5000 },
- in_attr = elf_known_obj_attributes (abfd)[OBJ_ATTR_GNU];
- abiflags->fp_abi = in_attr[Tag_GNU_MIPS_ABI_FP].i;
+ /* MIPS IV extensions. */
+ { bfd_mach_mips5, bfd_mach_mips8000 },
+ { bfd_mach_mips10000, bfd_mach_mips8000 },
+ { bfd_mach_mips5000, bfd_mach_mips8000 },
+ { bfd_mach_mips7000, bfd_mach_mips8000 },
+ { bfd_mach_mips9000, bfd_mach_mips8000 },
- if (abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_SINGLE
+ /* VR4100 extensions. */
+ { bfd_mach_mips4120, bfd_mach_mips4100 },
+ { bfd_mach_mips4111, bfd_mach_mips4100 },
+
+ /* MIPS III extensions. */
+ { bfd_mach_mips_loongson_2e, bfd_mach_mips4000 },
+ { bfd_mach_mips_loongson_2f, bfd_mach_mips4000 },
+ { bfd_mach_mips8000, bfd_mach_mips4000 },
+ { bfd_mach_mips4650, bfd_mach_mips4000 },
+ { bfd_mach_mips4600, bfd_mach_mips4000 },
+ { bfd_mach_mips4400, bfd_mach_mips4000 },
+ { bfd_mach_mips4300, bfd_mach_mips4000 },
+ { bfd_mach_mips4100, bfd_mach_mips4000 },
+ { bfd_mach_mips4010, bfd_mach_mips4000 },
+ { bfd_mach_mips5900, bfd_mach_mips4000 },
+
+ /* MIPS32 extensions. */
+ { bfd_mach_mipsisa32r2, bfd_mach_mipsisa32 },
+
+ /* MIPS II extensions. */
+ { bfd_mach_mips4000, bfd_mach_mips6000 },
+ { bfd_mach_mipsisa32, bfd_mach_mips6000 },
+
+ /* MIPS I extensions. */
+ { bfd_mach_mips6000, bfd_mach_mips3000 },
+ { bfd_mach_mips3900, bfd_mach_mips3000 }
+};
+
+/* Return true if bfd machine EXTENSION is an extension of machine BASE. */
+
+static bfd_boolean
+mips_mach_extends_p (unsigned long base, unsigned long extension)
+{
+ size_t i;
+
+ if (extension == base)
+ return TRUE;
+
+ if (base == bfd_mach_mipsisa32
+ && mips_mach_extends_p (bfd_mach_mipsisa64, extension))
+ return TRUE;
+
+ if (base == bfd_mach_mipsisa32r2
+ && mips_mach_extends_p (bfd_mach_mipsisa64r2, extension))
+ return TRUE;
+
+ for (i = 0; i < ARRAY_SIZE (mips_mach_extensions); i++)
+ if (extension == mips_mach_extensions[i].extension)
+ {
+ extension = mips_mach_extensions[i].base;
+ if (extension == base)
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+/* Return the BFD mach for each .MIPS.abiflags ISA Extension. */
+
+static unsigned long
+bfd_mips_isa_ext_mach (unsigned int isa_ext)
+{
+ switch (isa_ext)
+ {
+ case AFL_EXT_3900: return bfd_mach_mips3900;
+ case AFL_EXT_4010: return bfd_mach_mips4010;
+ case AFL_EXT_4100: return bfd_mach_mips4100;
+ case AFL_EXT_4111: return bfd_mach_mips4111;
+ case AFL_EXT_4120: return bfd_mach_mips4120;
+ case AFL_EXT_4650: return bfd_mach_mips4650;
+ case AFL_EXT_5400: return bfd_mach_mips5400;
+ case AFL_EXT_5500: return bfd_mach_mips5500;
+ case AFL_EXT_5900: return bfd_mach_mips5900;
+ case AFL_EXT_10000: return bfd_mach_mips10000;
+ case AFL_EXT_LOONGSON_2E: return bfd_mach_mips_loongson_2e;
+ case AFL_EXT_LOONGSON_2F: return bfd_mach_mips_loongson_2f;
+ case AFL_EXT_LOONGSON_3A: return bfd_mach_mips_loongson_3a;
+ case AFL_EXT_SB1: return bfd_mach_mips_sb1;
+ case AFL_EXT_OCTEON: return bfd_mach_mips_octeon;
+ case AFL_EXT_OCTEONP: return bfd_mach_mips_octeonp;
+ case AFL_EXT_OCTEON2: return bfd_mach_mips_octeon2;
+ case AFL_EXT_XLR: return bfd_mach_mips_xlr;
+ default: return bfd_mach_mips3000;
+ }
+}
+
+/* Return the .MIPS.abiflags value representing each ISA Extension. */
+
+unsigned int
+bfd_mips_isa_ext (bfd *abfd)
+{
+ switch (bfd_get_mach (abfd))
+ {
+ case bfd_mach_mips3900: return AFL_EXT_3900;
+ case bfd_mach_mips4010: return AFL_EXT_4010;
+ case bfd_mach_mips4100: return AFL_EXT_4100;
+ case bfd_mach_mips4111: return AFL_EXT_4111;
+ case bfd_mach_mips4120: return AFL_EXT_4120;
+ case bfd_mach_mips4650: return AFL_EXT_4650;
+ case bfd_mach_mips5400: return AFL_EXT_5400;
+ case bfd_mach_mips5500: return AFL_EXT_5500;
+ case bfd_mach_mips5900: return AFL_EXT_5900;
+ case bfd_mach_mips10000: return AFL_EXT_10000;
+ case bfd_mach_mips_loongson_2e: return AFL_EXT_LOONGSON_2E;
+ case bfd_mach_mips_loongson_2f: return AFL_EXT_LOONGSON_2F;
+ case bfd_mach_mips_loongson_3a: return AFL_EXT_LOONGSON_3A;
+ case bfd_mach_mips_sb1: return AFL_EXT_SB1;
+ case bfd_mach_mips_octeon: return AFL_EXT_OCTEON;
+ case bfd_mach_mips_octeonp: return AFL_EXT_OCTEONP;
+ case bfd_mach_mips_octeon3: return AFL_EXT_OCTEON3;
+ case bfd_mach_mips_octeon2: return AFL_EXT_OCTEON2;
+ case bfd_mach_mips_xlr: return AFL_EXT_XLR;
+ default: return 0;
+ }
+}
+
+/* Encode ISA level and revision as a single value. */
+#define LEVEL_REV(LEV,REV) ((LEV) << 3 | (REV))
+
+/* Decode a single value into level and revision. */
+#define ISA_LEVEL(LEVREV) ((LEVREV) >> 3)
+#define ISA_REV(LEVREV) ((LEVREV) & 0x7)
+
+/* Update the isa_level, isa_rev, isa_ext fields of abiflags. */
+
+static void
+update_mips_abiflags_isa (bfd *abfd, Elf_Internal_ABIFlags_v0 *abiflags)
+{
+ int new_isa = 0;
+ switch (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH)
+ {
+ case E_MIPS_ARCH_1: new_isa = LEVEL_REV (1, 0); break;
+ case E_MIPS_ARCH_2: new_isa = LEVEL_REV (2, 0); break;
+ case E_MIPS_ARCH_3: new_isa = LEVEL_REV (3, 0); break;
+ case E_MIPS_ARCH_4: new_isa = LEVEL_REV (4, 0); break;
+ case E_MIPS_ARCH_5: new_isa = LEVEL_REV (5, 0); break;
+ case E_MIPS_ARCH_32: new_isa = LEVEL_REV (32, 1); break;
+ case E_MIPS_ARCH_32R2: new_isa = LEVEL_REV (32, 2); break;
+ case E_MIPS_ARCH_32R6: new_isa = LEVEL_REV (32, 6); break;
+ case E_MIPS_ARCH_64: new_isa = LEVEL_REV (64, 1); break;
+ case E_MIPS_ARCH_64R2: new_isa = LEVEL_REV (64, 2); break;
+ case E_MIPS_ARCH_64R6: new_isa = LEVEL_REV (64, 6); break;
+ default:
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B: Unknown architecture %s"),
+ abfd, bfd_printable_name (abfd));
+ }
+
+ if (new_isa > LEVEL_REV (abiflags->isa_level, abiflags->isa_rev))
+ {
+ abiflags->isa_level = ISA_LEVEL (new_isa);
+ abiflags->isa_rev = ISA_REV (new_isa);
+ }
+
+ /* Update the isa_ext if ABFD describes a further extension. */
+ if (mips_mach_extends_p (bfd_mips_isa_ext_mach (abiflags->isa_ext),
+ bfd_get_mach (abfd)))
+ abiflags->isa_ext = bfd_mips_isa_ext (abfd);
+}
+
+/* Return true if the given ELF header flags describe a 32-bit binary. */
+
+static bfd_boolean
+mips_32bit_flags_p (flagword flags)
+{
+ return ((flags & EF_MIPS_32BITMODE) != 0
+ || (flags & EF_MIPS_ABI) == E_MIPS_ABI_O32
+ || (flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI32
+ || (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_1
+ || (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_2
+ || (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32
+ || (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R2
+ || (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R6);
+}
+
+/* Infer the content of the ABI flags based on the elf header. */
+
+static void
+infer_mips_abiflags (bfd *abfd, Elf_Internal_ABIFlags_v0* abiflags)
+{
+ obj_attribute *in_attr;
+
+ memset (abiflags, 0, sizeof (Elf_Internal_ABIFlags_v0));
+ update_mips_abiflags_isa (abfd, abiflags);
+
+ if (mips_32bit_flags_p (elf_elfheader (abfd)->e_flags))
+ abiflags->gpr_size = AFL_REG_32;
+ else
+ abiflags->gpr_size = AFL_REG_64;
+
+ abiflags->cpr1_size = AFL_REG_NONE;
+
+ in_attr = elf_known_obj_attributes (abfd)[OBJ_ATTR_GNU];
+ abiflags->fp_abi = in_attr[Tag_GNU_MIPS_ABI_FP].i;
+
+ if (abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_SINGLE
|| abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_XX
|| (abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_DOUBLE
&& abiflags->gpr_size == AFL_REG_32))
elf_gp (abfd) = (h->u.def.section->output_section->vma
+ h->u.def.section->output_offset
+ h->u.def.value);
- else if (info->relocatable)
+ else if (bfd_link_relocatable (info))
{
bfd_vma lo = MINUS_ONE;
input_section->flags &= ~SEC_HAS_CONTENTS;
}
- if (SGI_COMPAT (abfd) && info->shared)
+ if (SGI_COMPAT (abfd) && bfd_link_pic (info))
{
/* Create .rtproc section. */
rtproc_sec = bfd_get_linker_section (abfd, ".rtproc");
information describing how the small data area would
change depending upon the -G switch. These sections
not used in executables files. */
- if (! info->relocatable)
+ if (! bfd_link_relocatable (info))
{
for (p = o->map_head.link_order; p != NULL; p = p->next)
{
gptab_bss_sec = o;
else
{
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%s: illegal section name `%s'"),
bfd_get_filename (abfd), o->name);
bfd_set_error (bfd_error_nonrepresentable_section);
return TRUE;
}
\f
-/* Structure for saying that BFD machine EXTENSION extends BASE. */
+/* Merge object file header flags from IBFD into OBFD. Raise an error
+ if there are conflicting settings. */
-struct mips_mach_extension
+static bfd_boolean
+mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info)
{
- unsigned long extension, base;
-};
+ bfd *obfd = info->output_bfd;
+ struct mips_elf_obj_tdata *out_tdata = mips_elf_tdata (obfd);
+ flagword old_flags;
+ flagword new_flags;
+ bfd_boolean ok;
+ new_flags = elf_elfheader (ibfd)->e_flags;
+ elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_NOREORDER;
+ old_flags = elf_elfheader (obfd)->e_flags;
-/* An array describing how BFD machines relate to one another. The entries
- are ordered topologically with MIPS I extensions listed last. */
+ /* Check flag compatibility. */
-static const struct mips_mach_extension mips_mach_extensions[] =
-{
- /* MIPS64r2 extensions. */
- { bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
- { bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
- { bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
- { bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64r2 },
+ new_flags &= ~EF_MIPS_NOREORDER;
+ old_flags &= ~EF_MIPS_NOREORDER;
- /* MIPS64 extensions. */
- { bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
- { bfd_mach_mips_sb1, bfd_mach_mipsisa64 },
- { bfd_mach_mips_xlr, bfd_mach_mipsisa64 },
+ /* Some IRIX 6 BSD-compatibility objects have this bit set. It
+ doesn't seem to matter. */
+ new_flags &= ~EF_MIPS_XGOT;
+ old_flags &= ~EF_MIPS_XGOT;
- /* MIPS V extensions. */
- { bfd_mach_mipsisa64, bfd_mach_mips5 },
+ /* MIPSpro generates ucode info in n64 objects. Again, we should
+ just be able to ignore this. */
+ new_flags &= ~EF_MIPS_UCODE;
+ old_flags &= ~EF_MIPS_UCODE;
- /* R10000 extensions. */
- { bfd_mach_mips12000, bfd_mach_mips10000 },
- { bfd_mach_mips14000, bfd_mach_mips10000 },
- { bfd_mach_mips16000, bfd_mach_mips10000 },
+ /* DSOs should only be linked with CPIC code. */
+ if ((ibfd->flags & DYNAMIC) != 0)
+ new_flags |= EF_MIPS_PIC | EF_MIPS_CPIC;
- /* R5000 extensions. Note: the vr5500 ISA is an extension of the core
- vr5400 ISA, but doesn't include the multimedia stuff. It seems
- better to allow vr5400 and vr5500 code to be merged anyway, since
- many libraries will just use the core ISA. Perhaps we could add
- some sort of ASE flag if this ever proves a problem. */
- { bfd_mach_mips5500, bfd_mach_mips5400 },
- { bfd_mach_mips5400, bfd_mach_mips5000 },
+ if (new_flags == old_flags)
+ return TRUE;
- /* MIPS IV extensions. */
- { bfd_mach_mips5, bfd_mach_mips8000 },
- { bfd_mach_mips10000, bfd_mach_mips8000 },
- { bfd_mach_mips5000, bfd_mach_mips8000 },
- { bfd_mach_mips7000, bfd_mach_mips8000 },
- { bfd_mach_mips9000, bfd_mach_mips8000 },
+ ok = TRUE;
- /* VR4100 extensions. */
- { bfd_mach_mips4120, bfd_mach_mips4100 },
- { bfd_mach_mips4111, bfd_mach_mips4100 },
+ if (((new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0)
+ != ((old_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0))
+ {
+ _bfd_error_handler
+ (_("%B: warning: linking abicalls files with non-abicalls files"),
+ ibfd);
+ ok = TRUE;
+ }
- /* MIPS III extensions. */
- { bfd_mach_mips_loongson_2e, bfd_mach_mips4000 },
- { bfd_mach_mips_loongson_2f, bfd_mach_mips4000 },
- { bfd_mach_mips8000, bfd_mach_mips4000 },
- { bfd_mach_mips4650, bfd_mach_mips4000 },
- { bfd_mach_mips4600, bfd_mach_mips4000 },
- { bfd_mach_mips4400, bfd_mach_mips4000 },
- { bfd_mach_mips4300, bfd_mach_mips4000 },
- { bfd_mach_mips4100, bfd_mach_mips4000 },
- { bfd_mach_mips4010, bfd_mach_mips4000 },
- { bfd_mach_mips5900, bfd_mach_mips4000 },
+ if (new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC))
+ elf_elfheader (obfd)->e_flags |= EF_MIPS_CPIC;
+ if (! (new_flags & EF_MIPS_PIC))
+ elf_elfheader (obfd)->e_flags &= ~EF_MIPS_PIC;
- /* MIPS32 extensions. */
- { bfd_mach_mipsisa32r2, bfd_mach_mipsisa32 },
+ new_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC);
+ old_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC);
- /* MIPS II extensions. */
- { bfd_mach_mips4000, bfd_mach_mips6000 },
- { bfd_mach_mipsisa32, bfd_mach_mips6000 },
+ /* Compare the ISAs. */
+ if (mips_32bit_flags_p (old_flags) != mips_32bit_flags_p (new_flags))
+ {
+ _bfd_error_handler
+ (_("%B: linking 32-bit code with 64-bit code"),
+ ibfd);
+ ok = FALSE;
+ }
+ else if (!mips_mach_extends_p (bfd_get_mach (ibfd), bfd_get_mach (obfd)))
+ {
+ /* OBFD's ISA isn't the same as, or an extension of, IBFD's. */
+ if (mips_mach_extends_p (bfd_get_mach (obfd), bfd_get_mach (ibfd)))
+ {
+ /* Copy the architecture info from IBFD to OBFD. Also copy
+ the 32-bit flag (if set) so that we continue to recognise
+ OBFD as a 32-bit binary. */
+ bfd_set_arch_info (obfd, bfd_get_arch_info (ibfd));
+ elf_elfheader (obfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH);
+ elf_elfheader (obfd)->e_flags
+ |= new_flags & (EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE);
- /* MIPS I extensions. */
- { bfd_mach_mips6000, bfd_mach_mips3000 },
- { bfd_mach_mips3900, bfd_mach_mips3000 }
-};
+ /* Update the ABI flags isa_level, isa_rev, isa_ext fields. */
+ update_mips_abiflags_isa (obfd, &out_tdata->abiflags);
+
+ /* Copy across the ABI flags if OBFD doesn't use them
+ and if that was what caused us to treat IBFD as 32-bit. */
+ if ((old_flags & EF_MIPS_ABI) == 0
+ && mips_32bit_flags_p (new_flags)
+ && !mips_32bit_flags_p (new_flags & ~EF_MIPS_ABI))
+ elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ABI;
+ }
+ else
+ {
+ /* The ISAs aren't compatible. */
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B: linking %s module with previous %s modules"),
+ ibfd,
+ bfd_printable_name (ibfd),
+ bfd_printable_name (obfd));
+ ok = FALSE;
+ }
+ }
+ new_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE);
+ old_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE);
-/* Return true if bfd machine EXTENSION is an extension of machine BASE. */
+ /* Compare ABIs. The 64-bit ABI does not use EF_MIPS_ABI. But, it
+ does set EI_CLASS differently from any 32-bit ABI. */
+ if ((new_flags & EF_MIPS_ABI) != (old_flags & EF_MIPS_ABI)
+ || (elf_elfheader (ibfd)->e_ident[EI_CLASS]
+ != elf_elfheader (obfd)->e_ident[EI_CLASS]))
+ {
+ /* Only error if both are set (to different values). */
+ if (((new_flags & EF_MIPS_ABI) && (old_flags & EF_MIPS_ABI))
+ || (elf_elfheader (ibfd)->e_ident[EI_CLASS]
+ != elf_elfheader (obfd)->e_ident[EI_CLASS]))
+ {
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B: ABI mismatch: linking %s module with previous %s modules"),
+ ibfd,
+ elf_mips_abi_name (ibfd),
+ elf_mips_abi_name (obfd));
+ ok = FALSE;
+ }
+ new_flags &= ~EF_MIPS_ABI;
+ old_flags &= ~EF_MIPS_ABI;
+ }
-static bfd_boolean
-mips_mach_extends_p (unsigned long base, unsigned long extension)
-{
- size_t i;
+ /* Compare ASEs. Forbid linking MIPS16 and microMIPS ASE modules together
+ and allow arbitrary mixing of the remaining ASEs (retain the union). */
+ if ((new_flags & EF_MIPS_ARCH_ASE) != (old_flags & EF_MIPS_ARCH_ASE))
+ {
+ int old_micro = old_flags & EF_MIPS_ARCH_ASE_MICROMIPS;
+ int new_micro = new_flags & EF_MIPS_ARCH_ASE_MICROMIPS;
+ int old_m16 = old_flags & EF_MIPS_ARCH_ASE_M16;
+ int new_m16 = new_flags & EF_MIPS_ARCH_ASE_M16;
+ int micro_mis = old_m16 && new_micro;
+ int m16_mis = old_micro && new_m16;
- if (extension == base)
- return TRUE;
+ if (m16_mis || micro_mis)
+ {
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B: ASE mismatch: linking %s module with previous %s modules"),
+ ibfd,
+ m16_mis ? "MIPS16" : "microMIPS",
+ m16_mis ? "microMIPS" : "MIPS16");
+ ok = FALSE;
+ }
- if (base == bfd_mach_mipsisa32
- && mips_mach_extends_p (bfd_mach_mipsisa64, extension))
- return TRUE;
+ elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ARCH_ASE;
- if (base == bfd_mach_mipsisa32r2
- && mips_mach_extends_p (bfd_mach_mipsisa64r2, extension))
- return TRUE;
+ new_flags &= ~ EF_MIPS_ARCH_ASE;
+ old_flags &= ~ EF_MIPS_ARCH_ASE;
+ }
+
+ /* Compare NaN encodings. */
+ if ((new_flags & EF_MIPS_NAN2008) != (old_flags & EF_MIPS_NAN2008))
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler (_("%B: linking %s module with previous %s modules"),
+ ibfd,
+ (new_flags & EF_MIPS_NAN2008
+ ? "-mnan=2008" : "-mnan=legacy"),
+ (old_flags & EF_MIPS_NAN2008
+ ? "-mnan=2008" : "-mnan=legacy"));
+ ok = FALSE;
+ new_flags &= ~EF_MIPS_NAN2008;
+ old_flags &= ~EF_MIPS_NAN2008;
+ }
- for (i = 0; i < ARRAY_SIZE (mips_mach_extensions); i++)
- if (extension == mips_mach_extensions[i].extension)
- {
- extension = mips_mach_extensions[i].base;
- if (extension == base)
- return TRUE;
- }
+ /* Compare FP64 state. */
+ if ((new_flags & EF_MIPS_FP64) != (old_flags & EF_MIPS_FP64))
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler (_("%B: linking %s module with previous %s modules"),
+ ibfd,
+ (new_flags & EF_MIPS_FP64
+ ? "-mfp64" : "-mfp32"),
+ (old_flags & EF_MIPS_FP64
+ ? "-mfp64" : "-mfp32"));
+ ok = FALSE;
+ new_flags &= ~EF_MIPS_FP64;
+ old_flags &= ~EF_MIPS_FP64;
+ }
- return FALSE;
-}
+ /* Warn about any other mismatches */
+ if (new_flags != old_flags)
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler
+ (_("%B: uses different e_flags (0x%lx) fields than previous modules "
+ "(0x%lx)"),
+ ibfd, (unsigned long) new_flags,
+ (unsigned long) old_flags);
+ ok = FALSE;
+ }
+ return ok;
+}
/* Merge object attributes from IBFD into OBFD. Raise an error if
there are conflicting attributes. */
static bfd_boolean
-mips_elf_merge_obj_attributes (bfd *ibfd, bfd *obfd)
+mips_elf_merge_obj_attributes (bfd *ibfd, struct bfd_link_info *info)
{
+ bfd *obfd = info->output_bfd;
obj_attribute *in_attr;
obj_attribute *out_attr;
bfd *abi_fp_bfd;
in_string = _bfd_mips_fp_abi_string (in_fp);
/* First warn about cases involving unrecognised ABIs. */
if (!out_string && !in_string)
+ /* xgettext:c-format */
_bfd_error_handler
(_("Warning: %B uses unknown floating point ABI %d "
"(set by %B), %B uses unknown floating point ABI %d"),
obfd, abi_fp_bfd, ibfd, out_fp, in_fp);
else if (!out_string)
_bfd_error_handler
+ /* xgettext:c-format */
(_("Warning: %B uses unknown floating point ABI %d "
"(set by %B), %B uses %s"),
obfd, abi_fp_bfd, ibfd, out_fp, in_string);
else if (!in_string)
_bfd_error_handler
+ /* xgettext:c-format */
(_("Warning: %B uses %s (set by %B), "
"%B uses unknown floating point ABI %d"),
obfd, abi_fp_bfd, ibfd, out_string, in_fp);
else if (out_fp == Val_GNU_MIPS_ABI_FP_SOFT)
in_string = "-mhard-float";
_bfd_error_handler
+ /* xgettext:c-format */
(_("Warning: %B uses %s (set by %B), %B uses %s"),
obfd, abi_fp_bfd, ibfd, out_string, in_string);
}
{
case Val_GNU_MIPS_ABI_MSA_128:
_bfd_error_handler
+ /* xgettext:c-format */
(_("Warning: %B uses %s (set by %B), "
"%B uses unknown MSA ABI %d"),
obfd, abi_msa_bfd, ibfd,
{
case Val_GNU_MIPS_ABI_MSA_128:
_bfd_error_handler
+ /* xgettext:c-format */
(_("Warning: %B uses unknown MSA ABI %d "
"(set by %B), %B uses %s"),
obfd, abi_msa_bfd, ibfd,
default:
_bfd_error_handler
+ /* xgettext:c-format */
(_("Warning: %B uses unknown MSA ABI %d "
"(set by %B), %B uses unknown MSA ABI %d"),
obfd, abi_msa_bfd, ibfd,
}
/* Merge Tag_compatibility attributes and any common GNU ones. */
- _bfd_elf_merge_object_attributes (ibfd, obfd);
+ return _bfd_elf_merge_object_attributes (ibfd, info);
+}
+
+/* Merge object ABI flags from IBFD into OBFD. Raise an error if
+ there are conflicting settings. */
+
+static bfd_boolean
+mips_elf_merge_obj_abiflags (bfd *ibfd, bfd *obfd)
+{
+ obj_attribute *out_attr = elf_known_obj_attributes (obfd)[OBJ_ATTR_GNU];
+ struct mips_elf_obj_tdata *out_tdata = mips_elf_tdata (obfd);
+ struct mips_elf_obj_tdata *in_tdata = mips_elf_tdata (ibfd);
+
+ /* Update the output abiflags fp_abi using the computed fp_abi. */
+ out_tdata->abiflags.fp_abi = out_attr[Tag_GNU_MIPS_ABI_FP].i;
+
+#define max(a, b) ((a) > (b) ? (a) : (b))
+ /* Merge abiflags. */
+ out_tdata->abiflags.isa_level = max (out_tdata->abiflags.isa_level,
+ in_tdata->abiflags.isa_level);
+ out_tdata->abiflags.isa_rev = max (out_tdata->abiflags.isa_rev,
+ in_tdata->abiflags.isa_rev);
+ out_tdata->abiflags.gpr_size = max (out_tdata->abiflags.gpr_size,
+ in_tdata->abiflags.gpr_size);
+ out_tdata->abiflags.cpr1_size = max (out_tdata->abiflags.cpr1_size,
+ in_tdata->abiflags.cpr1_size);
+ out_tdata->abiflags.cpr2_size = max (out_tdata->abiflags.cpr2_size,
+ in_tdata->abiflags.cpr2_size);
+#undef max
+ out_tdata->abiflags.ases |= in_tdata->abiflags.ases;
+ out_tdata->abiflags.flags1 |= in_tdata->abiflags.flags1;
return TRUE;
}
object file when linking. */
bfd_boolean
-_bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
+_bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
{
- flagword old_flags;
- flagword new_flags;
- bfd_boolean ok;
+ bfd *obfd = info->output_bfd;
+ struct mips_elf_obj_tdata *out_tdata;
+ struct mips_elf_obj_tdata *in_tdata;
bfd_boolean null_input_bfd = TRUE;
asection *sec;
- obj_attribute *out_attr;
+ bfd_boolean ok;
/* Check if we have the same endianness. */
- if (! _bfd_generic_verify_endian_match (ibfd, obfd))
+ if (! _bfd_generic_verify_endian_match (ibfd, info))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: endianness incompatible with that of the selected emulation"),
ibfd);
return FALSE;
if (!is_mips_elf (ibfd) || !is_mips_elf (obfd))
return TRUE;
+ in_tdata = mips_elf_tdata (ibfd);
+ out_tdata = mips_elf_tdata (obfd);
+
if (strcmp (bfd_get_target (ibfd), bfd_get_target (obfd)) != 0)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: ABI is incompatible with that of the selected emulation"),
ibfd);
return FALSE;
}
- /* Set up the FP ABI attribute from the abiflags if it is not already
- set. */
- if (mips_elf_tdata (ibfd)->abiflags_valid)
- {
- obj_attribute *in_attr = elf_known_obj_attributes (ibfd)[OBJ_ATTR_GNU];
- if (in_attr[Tag_GNU_MIPS_ABI_FP].i == Val_GNU_MIPS_ABI_FP_ANY)
- in_attr[Tag_GNU_MIPS_ABI_FP].i =
- mips_elf_tdata (ibfd)->abiflags.fp_abi;
- }
-
- if (!mips_elf_merge_obj_attributes (ibfd, obfd))
- return FALSE;
-
- /* Check to see if the input BFD actually contains any sections.
- If not, its flags may not have been initialised either, but it cannot
- actually cause any incompatibility. */
+ /* Check to see if the input BFD actually contains any sections. If not,
+ then it has no attributes, and its flags may not have been initialized
+ either, but it cannot actually cause any incompatibility. */
for (sec = ibfd->sections; sec != NULL; sec = sec->next)
{
/* Ignore synthetic sections and empty .text, .data and .bss sections
return TRUE;
/* Populate abiflags using existing information. */
- if (!mips_elf_tdata (ibfd)->abiflags_valid)
- {
- infer_mips_abiflags (ibfd, &mips_elf_tdata (ibfd)->abiflags);
- mips_elf_tdata (ibfd)->abiflags_valid = TRUE;
- }
- else
+ if (in_tdata->abiflags_valid)
{
- Elf_Internal_ABIFlags_v0 abiflags;
+ obj_attribute *in_attr = elf_known_obj_attributes (ibfd)[OBJ_ATTR_GNU];
Elf_Internal_ABIFlags_v0 in_abiflags;
+ Elf_Internal_ABIFlags_v0 abiflags;
+
+ /* Set up the FP ABI attribute from the abiflags if it is not already
+ set. */
+ if (in_attr[Tag_GNU_MIPS_ABI_FP].i == Val_GNU_MIPS_ABI_FP_ANY)
+ in_attr[Tag_GNU_MIPS_ABI_FP].i = in_tdata->abiflags.fp_abi;
+
infer_mips_abiflags (ibfd, &abiflags);
- in_abiflags = mips_elf_tdata (ibfd)->abiflags;
+ in_abiflags = in_tdata->abiflags;
/* It is not possible to infer the correct ISA revision
for R3 or R5 so drop down to R2 for the checks. */
if (in_abiflags.isa_rev == 3 || in_abiflags.isa_rev == 5)
in_abiflags.isa_rev = 2;
- if (in_abiflags.isa_level != abiflags.isa_level
- || in_abiflags.isa_rev != abiflags.isa_rev
- || in_abiflags.isa_ext != abiflags.isa_ext)
- (*_bfd_error_handler)
+ if (LEVEL_REV (in_abiflags.isa_level, in_abiflags.isa_rev)
+ < LEVEL_REV (abiflags.isa_level, abiflags.isa_rev))
+ _bfd_error_handler
(_("%B: warning: Inconsistent ISA between e_flags and "
".MIPS.abiflags"), ibfd);
if (abiflags.fp_abi != Val_GNU_MIPS_ABI_FP_ANY
&& in_abiflags.fp_abi != abiflags.fp_abi)
- (*_bfd_error_handler)
- (_("%B: warning: Inconsistent FP ABI between e_flags and "
+ _bfd_error_handler
+ (_("%B: warning: Inconsistent FP ABI between .gnu.attributes and "
".MIPS.abiflags"), ibfd);
if ((in_abiflags.ases & abiflags.ases) != abiflags.ases)
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: warning: Inconsistent ASEs between e_flags and "
".MIPS.abiflags"), ibfd);
- if (in_abiflags.isa_ext != abiflags.isa_ext)
- (*_bfd_error_handler)
+ /* The isa_ext is allowed to be an extension of what can be inferred
+ from e_flags. */
+ if (!mips_mach_extends_p (bfd_mips_isa_ext_mach (abiflags.isa_ext),
+ bfd_mips_isa_ext_mach (in_abiflags.isa_ext)))
+ _bfd_error_handler
(_("%B: warning: Inconsistent ISA extensions between e_flags and "
".MIPS.abiflags"), ibfd);
if (in_abiflags.flags2 != 0)
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: warning: Unexpected flag in the flags2 field of "
".MIPS.abiflags (0x%lx)"), ibfd,
(unsigned long) in_abiflags.flags2);
}
+ else
+ {
+ infer_mips_abiflags (ibfd, &in_tdata->abiflags);
+ in_tdata->abiflags_valid = TRUE;
+ }
- if (!mips_elf_tdata (obfd)->abiflags_valid)
+ if (!out_tdata->abiflags_valid)
{
/* Copy input abiflags if output abiflags are not already valid. */
- mips_elf_tdata (obfd)->abiflags = mips_elf_tdata (ibfd)->abiflags;
- mips_elf_tdata (obfd)->abiflags_valid = TRUE;
+ out_tdata->abiflags = in_tdata->abiflags;
+ out_tdata->abiflags_valid = TRUE;
}
if (! elf_flags_init (obfd))
return FALSE;
/* Update the ABI flags isa_level, isa_rev and isa_ext fields. */
- update_mips_abiflags_isa (obfd, &mips_elf_tdata (obfd)->abiflags);
+ update_mips_abiflags_isa (obfd, &out_tdata->abiflags);
}
- return TRUE;
- }
-
- /* Update the output abiflags fp_abi using the computed fp_abi. */
- out_attr = elf_known_obj_attributes (obfd)[OBJ_ATTR_GNU];
- mips_elf_tdata (obfd)->abiflags.fp_abi = out_attr[Tag_GNU_MIPS_ABI_FP].i;
-
-#define max(a,b) ((a) > (b) ? (a) : (b))
- /* Merge abiflags. */
- mips_elf_tdata (obfd)->abiflags.isa_rev
- = max (mips_elf_tdata (obfd)->abiflags.isa_rev,
- mips_elf_tdata (ibfd)->abiflags.isa_rev);
- mips_elf_tdata (obfd)->abiflags.gpr_size
- = max (mips_elf_tdata (obfd)->abiflags.gpr_size,
- mips_elf_tdata (ibfd)->abiflags.gpr_size);
- mips_elf_tdata (obfd)->abiflags.cpr1_size
- = max (mips_elf_tdata (obfd)->abiflags.cpr1_size,
- mips_elf_tdata (ibfd)->abiflags.cpr1_size);
- mips_elf_tdata (obfd)->abiflags.cpr2_size
- = max (mips_elf_tdata (obfd)->abiflags.cpr2_size,
- mips_elf_tdata (ibfd)->abiflags.cpr2_size);
-#undef max
- mips_elf_tdata (obfd)->abiflags.ases
- |= mips_elf_tdata (ibfd)->abiflags.ases;
- mips_elf_tdata (obfd)->abiflags.flags1
- |= mips_elf_tdata (ibfd)->abiflags.flags1;
-
- new_flags = elf_elfheader (ibfd)->e_flags;
- elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_NOREORDER;
- old_flags = elf_elfheader (obfd)->e_flags;
-
- /* Check flag compatibility. */
-
- new_flags &= ~EF_MIPS_NOREORDER;
- old_flags &= ~EF_MIPS_NOREORDER;
-
- /* Some IRIX 6 BSD-compatibility objects have this bit set. It
- doesn't seem to matter. */
- new_flags &= ~EF_MIPS_XGOT;
- old_flags &= ~EF_MIPS_XGOT;
-
- /* MIPSpro generates ucode info in n64 objects. Again, we should
- just be able to ignore this. */
- new_flags &= ~EF_MIPS_UCODE;
- old_flags &= ~EF_MIPS_UCODE;
-
- /* DSOs should only be linked with CPIC code. */
- if ((ibfd->flags & DYNAMIC) != 0)
- new_flags |= EF_MIPS_PIC | EF_MIPS_CPIC;
-
- if (new_flags == old_flags)
- return TRUE;
-
- ok = TRUE;
-
- if (((new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0)
- != ((old_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0))
- {
- (*_bfd_error_handler)
- (_("%B: warning: linking abicalls files with non-abicalls files"),
- ibfd);
ok = TRUE;
}
+ else
+ ok = mips_elf_merge_obj_e_flags (ibfd, info);
- if (new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC))
- elf_elfheader (obfd)->e_flags |= EF_MIPS_CPIC;
- if (! (new_flags & EF_MIPS_PIC))
- elf_elfheader (obfd)->e_flags &= ~EF_MIPS_PIC;
-
- new_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC);
- old_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC);
-
- /* Compare the ISAs. */
- if (mips_32bit_flags_p (old_flags) != mips_32bit_flags_p (new_flags))
- {
- (*_bfd_error_handler)
- (_("%B: linking 32-bit code with 64-bit code"),
- ibfd);
- ok = FALSE;
- }
- else if (!mips_mach_extends_p (bfd_get_mach (ibfd), bfd_get_mach (obfd)))
- {
- /* OBFD's ISA isn't the same as, or an extension of, IBFD's. */
- if (mips_mach_extends_p (bfd_get_mach (obfd), bfd_get_mach (ibfd)))
- {
- /* Copy the architecture info from IBFD to OBFD. Also copy
- the 32-bit flag (if set) so that we continue to recognise
- OBFD as a 32-bit binary. */
- bfd_set_arch_info (obfd, bfd_get_arch_info (ibfd));
- elf_elfheader (obfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH);
- elf_elfheader (obfd)->e_flags
- |= new_flags & (EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE);
-
- /* Update the ABI flags isa_level, isa_rev, isa_ext fields. */
- update_mips_abiflags_isa (obfd, &mips_elf_tdata (obfd)->abiflags);
-
- /* Copy across the ABI flags if OBFD doesn't use them
- and if that was what caused us to treat IBFD as 32-bit. */
- if ((old_flags & EF_MIPS_ABI) == 0
- && mips_32bit_flags_p (new_flags)
- && !mips_32bit_flags_p (new_flags & ~EF_MIPS_ABI))
- elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ABI;
- }
- else
- {
- /* The ISAs aren't compatible. */
- (*_bfd_error_handler)
- (_("%B: linking %s module with previous %s modules"),
- ibfd,
- bfd_printable_name (ibfd),
- bfd_printable_name (obfd));
- ok = FALSE;
- }
- }
-
- new_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE);
- old_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE);
-
- /* Compare ABIs. The 64-bit ABI does not use EF_MIPS_ABI. But, it
- does set EI_CLASS differently from any 32-bit ABI. */
- if ((new_flags & EF_MIPS_ABI) != (old_flags & EF_MIPS_ABI)
- || (elf_elfheader (ibfd)->e_ident[EI_CLASS]
- != elf_elfheader (obfd)->e_ident[EI_CLASS]))
- {
- /* Only error if both are set (to different values). */
- if (((new_flags & EF_MIPS_ABI) && (old_flags & EF_MIPS_ABI))
- || (elf_elfheader (ibfd)->e_ident[EI_CLASS]
- != elf_elfheader (obfd)->e_ident[EI_CLASS]))
- {
- (*_bfd_error_handler)
- (_("%B: ABI mismatch: linking %s module with previous %s modules"),
- ibfd,
- elf_mips_abi_name (ibfd),
- elf_mips_abi_name (obfd));
- ok = FALSE;
- }
- new_flags &= ~EF_MIPS_ABI;
- old_flags &= ~EF_MIPS_ABI;
- }
-
- /* Compare ASEs. Forbid linking MIPS16 and microMIPS ASE modules together
- and allow arbitrary mixing of the remaining ASEs (retain the union). */
- if ((new_flags & EF_MIPS_ARCH_ASE) != (old_flags & EF_MIPS_ARCH_ASE))
- {
- int old_micro = old_flags & EF_MIPS_ARCH_ASE_MICROMIPS;
- int new_micro = new_flags & EF_MIPS_ARCH_ASE_MICROMIPS;
- int old_m16 = old_flags & EF_MIPS_ARCH_ASE_M16;
- int new_m16 = new_flags & EF_MIPS_ARCH_ASE_M16;
- int micro_mis = old_m16 && new_micro;
- int m16_mis = old_micro && new_m16;
-
- if (m16_mis || micro_mis)
- {
- (*_bfd_error_handler)
- (_("%B: ASE mismatch: linking %s module with previous %s modules"),
- ibfd,
- m16_mis ? "MIPS16" : "microMIPS",
- m16_mis ? "microMIPS" : "MIPS16");
- ok = FALSE;
- }
-
- elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ARCH_ASE;
-
- new_flags &= ~ EF_MIPS_ARCH_ASE;
- old_flags &= ~ EF_MIPS_ARCH_ASE;
- }
-
- /* Compare NaN encodings. */
- if ((new_flags & EF_MIPS_NAN2008) != (old_flags & EF_MIPS_NAN2008))
- {
- _bfd_error_handler (_("%B: linking %s module with previous %s modules"),
- ibfd,
- (new_flags & EF_MIPS_NAN2008
- ? "-mnan=2008" : "-mnan=legacy"),
- (old_flags & EF_MIPS_NAN2008
- ? "-mnan=2008" : "-mnan=legacy"));
- ok = FALSE;
- new_flags &= ~EF_MIPS_NAN2008;
- old_flags &= ~EF_MIPS_NAN2008;
- }
-
- /* Compare FP64 state. */
- if ((new_flags & EF_MIPS_FP64) != (old_flags & EF_MIPS_FP64))
- {
- _bfd_error_handler (_("%B: linking %s module with previous %s modules"),
- ibfd,
- (new_flags & EF_MIPS_FP64
- ? "-mfp64" : "-mfp32"),
- (old_flags & EF_MIPS_FP64
- ? "-mfp64" : "-mfp32"));
- ok = FALSE;
- new_flags &= ~EF_MIPS_FP64;
- old_flags &= ~EF_MIPS_FP64;
- }
+ ok = mips_elf_merge_obj_attributes (ibfd, info) && ok;
- /* Warn about any other mismatches */
- if (new_flags != old_flags)
- {
- (*_bfd_error_handler)
- (_("%B: uses different e_flags (0x%lx) fields than previous modules (0x%lx)"),
- ibfd, (unsigned long) new_flags,
- (unsigned long) old_flags);
- ok = FALSE;
- }
+ ok = mips_elf_merge_obj_abiflags (ibfd, obfd) && ok;
- if (! ok)
+ if (!ok)
{
bfd_set_error (bfd_error_bad_value);
return FALSE;
return "MIPS_HIPAGENO";
case DT_MIPS_RLD_MAP:
return "MIPS_RLD_MAP";
+ case DT_MIPS_RLD_MAP_REL:
+ return "MIPS_RLD_MAP_REL";
case DT_MIPS_DELTA_CLASS:
return "MIPS_DELTA_CLASS";
case DT_MIPS_DELTA_CLASS_NO:
fputs ("\n\tDSP ASE", file);
if (mask & AFL_ASE_DSPR2)
fputs ("\n\tDSP R2 ASE", file);
+ if (mask & AFL_ASE_DSPR3)
+ fputs ("\n\tDSP R3 ASE", file);
if (mask & AFL_ASE_EVA)
fputs ("\n\tEnhanced VA Scheme", file);
if (mask & AFL_ASE_MCU)
fputs ("\n\tXPA ASE", file);
if (mask == 0)
fprintf (file, "\n\t%s", _("None"));
+ else if ((mask & ~AFL_ASE_MASK) != 0)
+ fprintf (stdout, "\n\t%s (%x)", _("Unknown"), mask & ~AFL_ASE_MASK);
}
static void
case AFL_EXT_XLR:
fputs ("RMI XLR", file);
break;
+ case AFL_EXT_OCTEON3:
+ fputs ("Cavium Networks Octeon3", file);
+ break;
case AFL_EXT_OCTEON2:
fputs ("Cavium Networks Octeon2", file);
break;
fputs ("ST Microelectronics Loongson 2F", file);
break;
default:
- fputs (_("Unknown"), file);
+ fprintf (file, "%s (%d)", _("Unknown"), isa_ext);
break;
}
}
fprintf (file, " [mips32r2]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_64R2)
fprintf (file, " [mips64r2]");
+ else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R6)
+ fprintf (file, " [mips32r6]");
+ else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_64R6)
+ fprintf (file, " [mips64r6]");
else
fprintf (file, _(" [unknown ISA]"));
return n;
}
+/* Return the ABI flags associated with ABFD if available. */
+
+Elf_Internal_ABIFlags_v0 *
+bfd_mips_elf_get_abiflags (bfd *abfd)
+{
+ struct mips_elf_obj_tdata *tdata = mips_elf_tdata (abfd);
+
+ return tdata->abiflags_valid ? &tdata->abiflags : NULL;
+}
+
void
_bfd_mips_post_process_headers (bfd *abfd, struct bfd_link_info *link_info)
{
|| mips_elf_tdata (abfd)->abiflags.fp_abi == Val_GNU_MIPS_ABI_FP_64A)
i_ehdrp->e_ident[EI_ABIVERSION] = 3;
}
+
+int
+_bfd_mips_elf_compact_eh_encoding (struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
+{
+ return DW_EH_PE_pcrel | DW_EH_PE_sdata4;
+}
+
+/* Return the opcode for can't unwind. */
+
+int
+_bfd_mips_elf_cant_unwind_opcode (struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
+{
+ return COMPACT_EH_CANT_UNWIND_OPCODE;
+}
projects / deliverable / binutils-gdb.git / blobdiff