/* BFD support for handling relocation entries.
- Copyright (C) 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
+ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+ 2000, 2001
+ Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
-Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/*
SECTION
BFD maintains relocations in much the same way it maintains
symbols: they are left alone until required, then read in
- en-mass and translated into an internal form. A common
+ en-masse and translated into an internal form. A common
routine <<bfd_perform_relocation>> acts upon the
canonical form to do the fixup.
.
.typedef enum bfd_reloc_status
.{
-. {* No errors detected *}
+. {* No errors detected *}
. bfd_reloc_ok,
.
-. {* The relocation was performed, but there was an overflow. *}
+. {* The relocation was performed, but there was an overflow. *}
. bfd_reloc_overflow,
.
-. {* The address to relocate was not within the section supplied. *}
+. {* The address to relocate was not within the section supplied. *}
. bfd_reloc_outofrange,
.
-. {* Used by special functions *}
+. {* Used by special functions *}
. bfd_reloc_continue,
.
-. {* Unsupported relocation size requested. *}
+. {* Unsupported relocation size requested. *}
. bfd_reloc_notsupported,
.
-. {* Unused *}
+. {* Unused *}
. bfd_reloc_other,
.
-. {* The symbol to relocate against was undefined. *}
+. {* The symbol to relocate against was undefined. *}
. bfd_reloc_undefined,
.
-. {* The relocation was performed, but may not be ok - presently
-. generated only when linking i960 coff files with i960 b.out
-. symbols. If this type is returned, the error_message argument
-. to bfd_perform_relocation will be set. *}
+. {* The relocation was performed, but may not be ok - presently
+. generated only when linking i960 coff files with i960 b.out
+. symbols. If this type is returned, the error_message argument
+. to bfd_perform_relocation will be set. *}
. bfd_reloc_dangerous
. }
. bfd_reloc_status_type;
.
.typedef struct reloc_cache_entry
.{
-. {* A pointer into the canonical table of pointers *}
+. {* A pointer into the canonical table of pointers *}
. struct symbol_cache_entry **sym_ptr_ptr;
.
-. {* offset in section *}
+. {* offset in section *}
. bfd_size_type address;
.
-. {* addend for relocation value *}
+. {* addend for relocation value *}
. bfd_vma addend;
.
-. {* Pointer to how to perform the required relocation *}
-. const struct reloc_howto_struct *howto;
+. {* Pointer to how to perform the required relocation *}
+. reloc_howto_type *howto;
.
.} arelent;
type which modifies the bottom two bytes of a four byte word
would not touch the first byte pointed to in a big endian
world.
-
+
o <<addend>>
The <<addend>> is a value provided by the back end to be added (!)
to the relocation offset. Its interpretation is dependent upon
the howto. For example, on the 68k the code:
-
| char foo[];
| main()
| {
| unlk fp
| rts
-
This could create a reloc pointing to <<foo>>, but leave the
offset in the data, something like:
-
|RELOCATION RECORDS FOR [.text]:
|offset type value
|00000006 32 _foo
|0000000c 4e5e ; unlk fp
|0000000e 4e75 ; rts
-
Using coff and an 88k, some instructions don't have enough
space in them to represent the full address range, and
pointers have to be loaded in two parts. So you'd get something like:
-
| or.u r13,r0,hi16(_foo+0x12345678)
| ld.b r2,r13,lo16(_foo+0x12345678)
| jmp r1
-
This should create two relocs, both pointing to <<_foo>>, and with
0x12340000 in their addend field. The data would consist of:
-
|RELOCATION RECORDS FOR [.text]:
|offset type value
|00000002 HVRT16 _foo+0x12340000
|00000004 1c4d5678 ; ld.b r2,r13,0x5678
|00000008 f400c001 ; jmp r1
-
The relocation routine digs out the value from the data, adds
it to the addend to get the original offset, and then adds the
value of <<_foo>>. Note that all 32 bits have to be kept around
Both relocs contain a pointer to <<foo>>, and the offsets
contain junk.
-
|RELOCATION RECORDS FOR [.text]:
|offset type value
|00000004 HI22 _foo+0x12345678
|0000000c 81c7e008 ; ret
|00000010 81e80000 ; restore
-
o <<howto>>
The <<howto>> field can be imagined as a
.
.enum complain_overflow
.{
-. {* Do not complain on overflow. *}
+. {* Do not complain on overflow. *}
. complain_overflow_dont,
.
-. {* Complain if the bitfield overflows, whether it is considered
-. as signed or unsigned. *}
+. {* Complain if the bitfield overflows, whether it is considered
+. as signed or unsigned. *}
. complain_overflow_bitfield,
.
-. {* Complain if the value overflows when considered as signed
-. number. *}
+. {* Complain if the value overflows when considered as signed
+. number. *}
. complain_overflow_signed,
.
-. {* Complain if the value overflows when considered as an
-. unsigned number. *}
+. {* Complain if the value overflows when considered as an
+. unsigned number. *}
. complain_overflow_unsigned
.};
CODE_FRAGMENT
.struct symbol_cache_entry; {* Forward declaration *}
.
-.typedef unsigned char bfd_byte;
-.typedef const struct reloc_howto_struct reloc_howto_type;
-.
.struct reloc_howto_struct
.{
-. {* The type field has mainly a documetary use - the back end can
-. do what it wants with it, though normally the back end's
-. external idea of what a reloc number is stored
-. in this field. For example, a PC relative word relocation
-. in a coff environment has the type 023 - because that's
-. what the outside world calls a R_PCRWORD reloc. *}
+. {* The type field has mainly a documentary use - the back end can
+. do what it wants with it, though normally the back end's
+. external idea of what a reloc number is stored
+. in this field. For example, a PC relative word relocation
+. in a coff environment has the type 023 - because that's
+. what the outside world calls a R_PCRWORD reloc. *}
. unsigned int type;
.
-. {* The value the final relocation is shifted right by. This drops
-. unwanted data from the relocation. *}
+. {* The value the final relocation is shifted right by. This drops
+. unwanted data from the relocation. *}
. unsigned int rightshift;
.
-. {* The size of the item to be relocated. This is *not* a
-. power-of-two measure. To get the number of bytes operated
-. on by a type of relocation, use bfd_get_reloc_size. *}
+. {* The size of the item to be relocated. This is *not* a
+. power-of-two measure. To get the number of bytes operated
+. on by a type of relocation, use bfd_get_reloc_size. *}
. int size;
.
-. {* The number of bits in the item to be relocated. This is used
-. when doing overflow checking. *}
+. {* The number of bits in the item to be relocated. This is used
+. when doing overflow checking. *}
. unsigned int bitsize;
.
-. {* Notes that the relocation is relative to the location in the
-. data section of the addend. The relocation function will
-. subtract from the relocation value the address of the location
-. being relocated. *}
+. {* Notes that the relocation is relative to the location in the
+. data section of the addend. The relocation function will
+. subtract from the relocation value the address of the location
+. being relocated. *}
. boolean pc_relative;
.
-. {* The bit position of the reloc value in the destination.
-. The relocated value is left shifted by this amount. *}
+. {* The bit position of the reloc value in the destination.
+. The relocated value is left shifted by this amount. *}
. unsigned int bitpos;
.
-. {* What type of overflow error should be checked for when
-. relocating. *}
+. {* What type of overflow error should be checked for when
+. relocating. *}
. enum complain_overflow complain_on_overflow;
.
-. {* If this field is non null, then the supplied function is
-. called rather than the normal function. This allows really
-. strange relocation methods to be accomodated (e.g., i960 callj
-. instructions). *}
+. {* If this field is non null, then the supplied function is
+. called rather than the normal function. This allows really
+. strange relocation methods to be accomodated (e.g., i960 callj
+. instructions). *}
. bfd_reloc_status_type (*special_function)
-. PARAMS ((bfd *abfd,
-. arelent *reloc_entry,
-. struct symbol_cache_entry *symbol,
-. PTR data,
-. asection *input_section,
-. bfd *output_bfd,
-. char **error_message));
+. PARAMS ((bfd *, arelent *, struct symbol_cache_entry *, PTR, asection *,
+. bfd *, char **));
.
-. {* The textual name of the relocation type. *}
+. {* The textual name of the relocation type. *}
. char *name;
.
-. {* When performing a partial link, some formats must modify the
-. relocations rather than the data - this flag signals this.*}
+. {* Some formats record a relocation addend in the section contents
+. rather than with the relocation. For ELF formats this is the
+. distinction between USE_REL and USE_RELA (though the code checks
+. for USE_REL == 1/0). The value of this field is TRUE if the
+. addend is recorded with the section contents; when performing a
+. partial link (ld -r) the section contents (the data) will be
+. modified. The value of this field is FALSE if addends are
+. recorded with the relocation (in arelent.addend); when performing
+. a partial link the relocation will be modified.
+. All relocations for all ELF USE_RELA targets should set this field
+. to FALSE (values of TRUE should be looked on with suspicion).
+. However, the converse is not true: not all relocations of all ELF
+. USE_REL targets set this field to TRUE. Why this is so is peculiar
+. to each particular target. For relocs that aren't used in partial
+. links (e.g. GOT stuff) it doesn't matter what this is set to. *}
. boolean partial_inplace;
.
-. {* The src_mask selects which parts of the read in data
-. are to be used in the relocation sum. E.g., if this was an 8 bit
-. bit of data which we read and relocated, this would be
-. 0x000000ff. When we have relocs which have an addend, such as
-. sun4 extended relocs, the value in the offset part of a
-. relocating field is garbage so we never use it. In this case
-. the mask would be 0x00000000. *}
+. {* The src_mask selects which parts of the read in data
+. are to be used in the relocation sum. E.g., if this was an 8 bit
+. byte of data which we read and relocated, this would be
+. 0x000000ff. When we have relocs which have an addend, such as
+. sun4 extended relocs, the value in the offset part of a
+. relocating field is garbage so we never use it. In this case
+. the mask would be 0x00000000. *}
. bfd_vma src_mask;
.
-. {* The dst_mask selects which parts of the instruction are replaced
-. into the instruction. In most cases src_mask == dst_mask,
-. except in the above special case, where dst_mask would be
-. 0x000000ff, and src_mask would be 0x00000000. *}
+. {* The dst_mask selects which parts of the instruction are replaced
+. into the instruction. In most cases src_mask == dst_mask,
+. except in the above special case, where dst_mask would be
+. 0x000000ff, and src_mask would be 0x00000000. *}
. bfd_vma dst_mask;
.
-. {* When some formats create PC relative instructions, they leave
-. the value of the pc of the place being relocated in the offset
-. slot of the instruction, so that a PC relative relocation can
-. be made just by adding in an ordinary offset (e.g., sun3 a.out).
-. Some formats leave the displacement part of an instruction
-. empty (e.g., m88k bcs); this flag signals the fact.*}
+. {* When some formats create PC relative instructions, they leave
+. the value of the pc of the place being relocated in the offset
+. slot of the instruction, so that a PC relative relocation can
+. be made just by adding in an ordinary offset (e.g., sun3 a.out).
+. Some formats leave the displacement part of an instruction
+. empty (e.g., m88k bcs); this flag signals the fact. *}
. boolean pcrel_offset;
-.
.};
*/
DESCRIPTION
The HOWTO define is horrible and will go away.
-
-.#define HOWTO(C, R,S,B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
-. {(unsigned)C,R,S,B, P, BI, O,SF,NAME,INPLACE,MASKSRC,MASKDST,PC}
+.#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
+. { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
DESCRIPTION
And will be replaced with the totally magic way. But for the
moment, we are compatible, so do it this way.
+.#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
+. HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
+. NAME, false, 0, 0, IN)
+.
+
+DESCRIPTION
+ This is used to fill in an empty howto entry in an array.
-.#define NEWHOWTO( FUNCTION, NAME,SIZE,REL,IN) HOWTO(0,0,SIZE,0,REL,0,complain_overflow_dont,FUNCTION, NAME,false,0,0,IN)
+.#define EMPTY_HOWTO(C) \
+. HOWTO ((C), 0, 0, 0, false, 0, complain_overflow_dont, NULL, \
+. NULL, false, 0, 0, false)
.
+
DESCRIPTION
Helper routine to turn a symbol into a relocation value.
-.#define HOWTO_PREPARE(relocation, symbol) \
-. { \
-. if (symbol != (asymbol *)NULL) { \
-. if (bfd_is_com_section (symbol->section)) { \
-. relocation = 0; \
-. } \
-. else { \
-. relocation = symbol->value; \
-. } \
-. } \
-.}
+.#define HOWTO_PREPARE(relocation, symbol) \
+. { \
+. if (symbol != (asymbol *) NULL) \
+. { \
+. if (bfd_is_com_section (symbol->section)) \
+. { \
+. relocation = 0; \
+. } \
+. else \
+. { \
+. relocation = symbol->value; \
+. } \
+. } \
+. }
*/
bfd_get_reloc_size
SYNOPSIS
- int bfd_get_reloc_size (reloc_howto_type *);
+ unsigned int bfd_get_reloc_size (reloc_howto_type *);
DESCRIPTION
For a reloc_howto_type that operates on a fixed number of bytes,
this returns the number of bytes operated on.
*/
-int
+unsigned int
bfd_get_reloc_size (howto)
reloc_howto_type *howto;
{
case 2: return 4;
case 3: return 0;
case 4: return 8;
+ case 8: return 16;
case -2: return 4;
default: abort ();
}
How relocs are tied together in an <<asection>>:
-.typedef struct relent_chain {
+.typedef struct relent_chain
+.{
. arelent relent;
-. struct relent_chain *next;
+. struct relent_chain *next;
.} arelent_chain;
*/
+/* N_ONES produces N one bits, without overflowing machine arithmetic. */
+#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
+
+/*
+FUNCTION
+ bfd_check_overflow
+
+SYNOPSIS
+ bfd_reloc_status_type
+ bfd_check_overflow
+ (enum complain_overflow how,
+ unsigned int bitsize,
+ unsigned int rightshift,
+ unsigned int addrsize,
+ bfd_vma relocation);
+
+DESCRIPTION
+ Perform overflow checking on @var{relocation} which has
+ @var{bitsize} significant bits and will be shifted right by
+ @var{rightshift} bits, on a machine with addresses containing
+ @var{addrsize} significant bits. The result is either of
+ @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
+
+*/
+
+bfd_reloc_status_type
+bfd_check_overflow (how, bitsize, rightshift, addrsize, relocation)
+ enum complain_overflow how;
+ unsigned int bitsize;
+ unsigned int rightshift;
+ unsigned int addrsize;
+ bfd_vma relocation;
+{
+ bfd_vma fieldmask, addrmask, signmask, ss, a;
+ bfd_reloc_status_type flag = bfd_reloc_ok;
+
+ a = relocation;
+
+ /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
+ we'll be permissive: extra bits in the field mask will
+ automatically extend the address mask for purposes of the
+ overflow check. */
+ fieldmask = N_ONES (bitsize);
+ addrmask = N_ONES (addrsize) | fieldmask;
+
+ switch (how)
+ {
+ case complain_overflow_dont:
+ break;
+
+ case complain_overflow_signed:
+ /* If any sign bits are set, all sign bits must be set. That
+ is, A must be a valid negative address after shifting. */
+ a = (a & addrmask) >> rightshift;
+ signmask = ~ (fieldmask >> 1);
+ ss = a & signmask;
+ if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
+ flag = bfd_reloc_overflow;
+ break;
+
+ case complain_overflow_unsigned:
+ /* We have an overflow if the address does not fit in the field. */
+ a = (a & addrmask) >> rightshift;
+ if ((a & ~ fieldmask) != 0)
+ flag = bfd_reloc_overflow;
+ break;
+
+ case complain_overflow_bitfield:
+ /* Bitfields are sometimes signed, sometimes unsigned. We
+ explicitly allow an address wrap too, which means a bitfield
+ of n bits is allowed to store -2**n to 2**n-1. Thus overflow
+ if the value has some, but not all, bits set outside the
+ field. */
+ a >>= rightshift;
+ ss = a & ~ fieldmask;
+ if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & ~ fieldmask))
+ flag = bfd_reloc_overflow;
+ break;
+
+ default:
+ abort ();
+ }
+ return flag;
+}
/*
FUNCTION
*/
-
bfd_reloc_status_type
bfd_perform_relocation (abfd, reloc_entry, data, input_section, output_bfd,
error_message)
{
bfd_vma relocation;
bfd_reloc_status_type flag = bfd_reloc_ok;
- bfd_size_type addr = reloc_entry->address;
+ bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
bfd_vma output_base = 0;
reloc_howto_type *howto = reloc_entry->howto;
asection *reloc_target_output_section;
}
/* Is the address of the relocation really within the section? */
- if (reloc_entry->address > input_section->_cooked_size)
+ if (reloc_entry->address > input_section->_cooked_size /
+ bfd_octets_per_byte (abfd))
return bfd_reloc_outofrange;
/* Work out which section the relocation is targetted at and the
else
relocation = symbol->value;
-
reloc_target_output_section = symbol->section->output_section;
/* Convert input-section-relative symbol value to absolute. */
/* WTF?? */
if (abfd->xvec->flavour == bfd_target_coff_flavour
- && strcmp (abfd->xvec->name, "aixcoff-rs6000") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
machine word.
FIXME: We should also do overflow checking on the result after
adding in the value contained in the object file. */
- if (howto->complain_on_overflow != complain_overflow_dont)
- {
- bfd_vma check;
-
- /* Get the value that will be used for the relocation, but
- starting at bit position zero. */
- if (howto->rightshift > howto->bitpos)
- check = relocation >> (howto->rightshift - howto->bitpos);
- else
- check = relocation << (howto->bitpos - howto->rightshift);
- switch (howto->complain_on_overflow)
- {
- case complain_overflow_signed:
- {
- /* Assumes two's complement. */
- bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
- bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
-
- /* The above right shift is incorrect for a signed value.
- Fix it up by forcing on the upper bits. */
- if (howto->rightshift > howto->bitpos
- && (bfd_signed_vma) relocation < 0)
- check |= ((bfd_vma) - 1
- & ~((bfd_vma) - 1
- >> (howto->rightshift - howto->bitpos)));
- if ((bfd_signed_vma) check > reloc_signed_max
- || (bfd_signed_vma) check < reloc_signed_min)
- flag = bfd_reloc_overflow;
- }
- break;
- case complain_overflow_unsigned:
- {
- /* Assumes two's complement. This expression avoids
- overflow if howto->bitsize is the number of bits in
- bfd_vma. */
- bfd_vma reloc_unsigned_max =
- (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
-
- if ((bfd_vma) check > reloc_unsigned_max)
- flag = bfd_reloc_overflow;
- }
- break;
- case complain_overflow_bitfield:
- {
- /* Assumes two's complement. This expression avoids
- overflow if howto->bitsize is the number of bits in
- bfd_vma. */
- bfd_vma reloc_bits = (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
-
- if (((bfd_vma) check & ~reloc_bits) != 0
- && ((bfd_vma) check & ~reloc_bits) != (-1 & ~reloc_bits))
- {
- /* The above right shift is incorrect for a signed
- value. See if turning on the upper bits fixes the
- overflow. */
- if (howto->rightshift > howto->bitpos
- && (bfd_signed_vma) relocation < 0)
- {
- check |= ((bfd_vma) - 1
- & ~((bfd_vma) - 1
- >> (howto->rightshift - howto->bitpos)));
- if (((bfd_vma) check & ~reloc_bits) != (-1 & ~reloc_bits))
- flag = bfd_reloc_overflow;
- }
- else
- flag = bfd_reloc_overflow;
- }
- }
- break;
- default:
- abort ();
- }
- }
+ if (howto->complain_on_overflow != complain_overflow_dont
+ && flag == bfd_reloc_ok)
+ flag = bfd_check_overflow (howto->complain_on_overflow,
+ howto->bitsize,
+ howto->rightshift,
+ bfd_arch_bits_per_address (abfd),
+ relocation);
/*
Either we are relocating all the way, or we don't want to apply
R result
Do this:
- i i i i i o o o o o from bfd_get<size>
- and S S S S S to get the size offset we want
- + r r r r r r r r r r to get the final value to place
+ (( i i i i i o o o o o from bfd_get<size>
+ and S S S S S) to get the size offset we want
+ + r r r r r r r r r r) to get the final value to place
and D D D D D to chop to right size
-----------------------
- A A A A A
+ = A A A A A
And this:
- ... i i i i i o o o o o from bfd_get<size>
- and N N N N N get instruction
+ ( i i i i i o o o o o from bfd_get<size>
+ and N N N N N ) get instruction
-----------------------
- ... B B B B B
+ = B B B B B
And then:
- B B B B B
- or A A A A A
+ ( B B B B B
+ or A A A A A)
-----------------------
- R R R R R R R R R R put into bfd_put<size>
+ = R R R R R R R R R R put into bfd_put<size>
*/
#define DOIT(x) \
{
case 0:
{
- char x = bfd_get_8 (abfd, (char *) data + addr);
+ char x = bfd_get_8 (abfd, (char *) data + octets);
DOIT (x);
- bfd_put_8 (abfd, x, (unsigned char *) data + addr);
+ bfd_put_8 (abfd, x, (unsigned char *) data + octets);
}
break;
case 1:
- if (relocation)
- {
- short x = bfd_get_16 (abfd, (bfd_byte *) data + addr);
- DOIT (x);
- bfd_put_16 (abfd, x, (unsigned char *) data + addr);
- }
+ {
+ short x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
+ DOIT (x);
+ bfd_put_16 (abfd, (bfd_vma) x, (unsigned char *) data + octets);
+ }
break;
case 2:
- if (relocation)
- {
- long x = bfd_get_32 (abfd, (bfd_byte *) data + addr);
- DOIT (x);
- bfd_put_32 (abfd, x, (bfd_byte *) data + addr);
- }
+ {
+ long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
+ DOIT (x);
+ bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
+ }
break;
case -2:
{
- long x = bfd_get_32 (abfd, (bfd_byte *) data + addr);
+ long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
relocation = -relocation;
DOIT (x);
- bfd_put_32 (abfd, x, (bfd_byte *) data + addr);
+ bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
+ }
+ break;
+
+ case -1:
+ {
+ long x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
+ relocation = -relocation;
+ DOIT (x);
+ bfd_put_16 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
}
break;
case 4:
#ifdef BFD64
- if (relocation)
- {
- bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data + addr);
- DOIT (x);
- bfd_put_64 (abfd, x, (bfd_byte *) data + addr);
- }
+ {
+ bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data + octets);
+ DOIT (x);
+ bfd_put_64 (abfd, x, (bfd_byte *) data + octets);
+ }
#else
abort ();
#endif
*/
-
bfd_reloc_status_type
bfd_install_relocation (abfd, reloc_entry, data_start, data_start_offset,
input_section, error_message)
{
bfd_vma relocation;
bfd_reloc_status_type flag = bfd_reloc_ok;
- bfd_size_type addr = reloc_entry->address;
+ bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
bfd_vma output_base = 0;
reloc_howto_type *howto = reloc_entry->howto;
asection *reloc_target_output_section;
if (howto->special_function)
{
bfd_reloc_status_type cont;
+
/* XXX - The special_function calls haven't been fixed up to deal
with creating new relocations and section contents. */
cont = howto->special_function (abfd, reloc_entry, symbol,
else
relocation = symbol->value;
-
reloc_target_output_section = symbol->section->output_section;
/* Convert input-section-relative symbol value to absolute. */
{
/* This is a partial relocation, but inplace, so modify the
reloc record a bit.
-
+
If we've relocated with a symbol with a section, change
into a ref to the section belonging to the symbol. */
-
+
reloc_entry->address += input_section->output_offset;
-
+
/* WTF?? */
if (abfd->xvec->flavour == bfd_target_coff_flavour
- && strcmp (abfd->xvec->name, "aixcoff-rs6000") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
/* For m68k-coff, the addend was being subtracted twice during
relocation with -r. Removing the line below this comment
fixes that problem; see PR 2953.
-
+
However, Ian wrote the following, regarding removing the line below,
which explains why it is still enabled: --djm
-
+
If you put a patch like that into BFD you need to check all the COFF
linkers. I am fairly certain that patch will break coff-i386 (e.g.,
SCO); see coff_i386_reloc in coff-i386.c where I worked around the
need to compute the value in a size larger than bitsize, but we
can't reasonably do that for a reloc the same size as a host
machine word.
-
FIXME: We should also do overflow checking on the result after
adding in the value contained in the object file. */
if (howto->complain_on_overflow != complain_overflow_dont)
- {
- bfd_vma check;
-
- /* Get the value that will be used for the relocation, but
- starting at bit position zero. */
- if (howto->rightshift > howto->bitpos)
- check = relocation >> (howto->rightshift - howto->bitpos);
- else
- check = relocation << (howto->bitpos - howto->rightshift);
- switch (howto->complain_on_overflow)
- {
- case complain_overflow_signed:
- {
- /* Assumes two's complement. */
- bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
- bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
-
- /* The above right shift is incorrect for a signed value.
- Fix it up by forcing on the upper bits. */
- if (howto->rightshift > howto->bitpos
- && (bfd_signed_vma) relocation < 0)
- check |= ((bfd_vma) - 1
- & ~((bfd_vma) - 1
- >> (howto->rightshift - howto->bitpos)));
- if ((bfd_signed_vma) check > reloc_signed_max
- || (bfd_signed_vma) check < reloc_signed_min)
- flag = bfd_reloc_overflow;
- }
- break;
- case complain_overflow_unsigned:
- {
- /* Assumes two's complement. This expression avoids
- overflow if howto->bitsize is the number of bits in
- bfd_vma. */
- bfd_vma reloc_unsigned_max =
- (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
-
- if ((bfd_vma) check > reloc_unsigned_max)
- flag = bfd_reloc_overflow;
- }
- break;
- case complain_overflow_bitfield:
- {
- /* Assumes two's complement. This expression avoids
- overflow if howto->bitsize is the number of bits in
- bfd_vma. */
- bfd_vma reloc_bits = (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
-
- if (((bfd_vma) check & ~reloc_bits) != 0
- && ((bfd_vma) check & ~reloc_bits) != (-1 & ~reloc_bits))
- {
- /* The above right shift is incorrect for a signed
- value. See if turning on the upper bits fixes the
- overflow. */
- if (howto->rightshift > howto->bitpos
- && (bfd_signed_vma) relocation < 0)
- {
- check |= ((bfd_vma) - 1
- & ~((bfd_vma) - 1
- >> (howto->rightshift - howto->bitpos)));
- if (((bfd_vma) check & ~reloc_bits) != (-1 & ~reloc_bits))
- flag = bfd_reloc_overflow;
- }
- else
- flag = bfd_reloc_overflow;
- }
- }
- break;
- default:
- abort ();
- }
- }
+ flag = bfd_check_overflow (howto->complain_on_overflow,
+ howto->bitsize,
+ howto->rightshift,
+ bfd_arch_bits_per_address (abfd),
+ relocation);
/*
Either we are relocating all the way, or we don't want to apply
R result
Do this:
- i i i i i o o o o o from bfd_get<size>
- and S S S S S to get the size offset we want
- + r r r r r r r r r r to get the final value to place
+ (( i i i i i o o o o o from bfd_get<size>
+ and S S S S S) to get the size offset we want
+ + r r r r r r r r r r) to get the final value to place
and D D D D D to chop to right size
-----------------------
- A A A A A
+ = A A A A A
And this:
- ... i i i i i o o o o o from bfd_get<size>
- and N N N N N get instruction
+ ( i i i i i o o o o o from bfd_get<size>
+ and N N N N N ) get instruction
-----------------------
- ... B B B B B
+ = B B B B B
And then:
- B B B B B
- or A A A A A
+ ( B B B B B
+ or A A A A A)
-----------------------
- R R R R R R R R R R put into bfd_put<size>
+ = R R R R R R R R R R put into bfd_put<size>
*/
#define DOIT(x) \
x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
- data = (bfd_byte *) data_start + (addr - data_start_offset);
+ data = (bfd_byte *) data_start + (octets - data_start_offset);
switch (howto->size)
{
break;
case 1:
- if (relocation)
- {
- short x = bfd_get_16 (abfd, (bfd_byte *) data);
- DOIT (x);
- bfd_put_16 (abfd, x, (unsigned char *) data);
- }
+ {
+ short x = bfd_get_16 (abfd, (bfd_byte *) data);
+ DOIT (x);
+ bfd_put_16 (abfd, (bfd_vma) x, (unsigned char *) data);
+ }
break;
case 2:
- if (relocation)
- {
- long x = bfd_get_32 (abfd, (bfd_byte *) data);
- DOIT (x);
- bfd_put_32 (abfd, x, (bfd_byte *) data);
- }
+ {
+ long x = bfd_get_32 (abfd, (bfd_byte *) data);
+ DOIT (x);
+ bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data);
+ }
break;
case -2:
{
long x = bfd_get_32 (abfd, (bfd_byte *) data);
relocation = -relocation;
DOIT (x);
- bfd_put_32 (abfd, x, (bfd_byte *) data);
+ bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data);
}
break;
break;
case 4:
- if (relocation)
- {
- bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data);
- DOIT (x);
- bfd_put_64 (abfd, x, (bfd_byte *) data);
- }
+ {
+ bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data);
+ DOIT (x);
+ bfd_put_64 (abfd, x, (bfd_byte *) data);
+ }
break;
default:
return bfd_reloc_other;
bfd_perform_relocation is so hacked up it is easier to write a new
function than to try to deal with it.
- This routine does a final relocation. It should not be used when
- generating relocateable output.
+ This routine does a final relocation. Whether it is useful for a
+ relocateable link depends upon how the object format defines
+ relocations.
FIXME: This routine ignores any special_function in the HOWTO,
since the existing special_function values have been written for
bfd_vma relocation;
/* Sanity check the address. */
- if (address > input_section->_cooked_size)
+ if (address > input_section->_raw_size)
return bfd_reloc_outofrange;
/* This function assumes that we are dealing with a basic relocation
bfd_byte *location;
{
int size;
- bfd_vma x;
- boolean overflow;
+ bfd_vma x = 0;
+ bfd_reloc_status_type flag;
+ unsigned int rightshift = howto->rightshift;
+ unsigned int bitpos = howto->bitpos;
/* If the size is negative, negate RELOCATION. This isn't very
general. */
which we don't check for. We must either check at every single
operation, which would be tedious, or we must do the computations
in a type larger than bfd_vma, which would be inefficient. */
- overflow = false;
+ flag = bfd_reloc_ok;
if (howto->complain_on_overflow != complain_overflow_dont)
{
- bfd_vma check;
- bfd_signed_vma signed_check;
- bfd_vma add;
- bfd_signed_vma signed_add;
-
- if (howto->rightshift == 0)
- {
- check = relocation;
- signed_check = (bfd_signed_vma) relocation;
- }
- else
- {
- /* Drop unwanted bits from the value we are relocating to. */
- check = relocation >> howto->rightshift;
-
- /* If this is a signed value, the rightshift just dropped
- leading 1 bits (assuming twos complement). */
- if ((bfd_signed_vma) relocation >= 0)
- signed_check = check;
- else
- signed_check = (check
- | ((bfd_vma) - 1
- & ~((bfd_vma) - 1 >> howto->rightshift)));
- }
-
- /* Get the value from the object file. */
- add = x & howto->src_mask;
-
- /* Get the value from the object file with an appropriate sign.
- The expression involving howto->src_mask isolates the upper
- bit of src_mask. If that bit is set in the value we are
- adding, it is negative, and we subtract out that number times
- two. If src_mask includes the highest possible bit, then we
- can not get the upper bit, but that does not matter since
- signed_add needs no adjustment to become negative in that
- case. */
- signed_add = add;
- if ((add & (((~howto->src_mask) >> 1) & howto->src_mask)) != 0)
- signed_add -= (((~howto->src_mask) >> 1) & howto->src_mask) << 1;
-
- /* Add the value from the object file, shifted so that it is a
- straight number. */
- if (howto->bitpos == 0)
- {
- check += add;
- signed_check += signed_add;
- }
- else
- {
- check += add >> howto->bitpos;
-
- /* For the signed case we use ADD, rather than SIGNED_ADD,
- to avoid warnings from SVR4 cc. This is OK since we
- explictly handle the sign bits. */
- if (signed_add >= 0)
- signed_check += add >> howto->bitpos;
- else
- signed_check += ((add >> howto->bitpos)
- | ((bfd_vma) - 1
- & ~((bfd_vma) - 1 >> howto->bitpos)));
- }
+ bfd_vma addrmask, fieldmask, signmask, ss;
+ bfd_vma a, b, sum;
+
+ /* Get the values to be added together. For signed and unsigned
+ relocations, we assume that all values should be truncated to
+ the size of an address. For bitfields, all the bits matter.
+ See also bfd_check_overflow. */
+ fieldmask = N_ONES (howto->bitsize);
+ addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
+ a = relocation;
+ b = x & howto->src_mask;
switch (howto->complain_on_overflow)
{
case complain_overflow_signed:
- {
- /* Assumes two's complement. */
- bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
- bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
-
- if (signed_check > reloc_signed_max
- || signed_check < reloc_signed_min)
- overflow = true;
- }
+ a = (a & addrmask) >> rightshift;
+
+ /* If any sign bits are set, all sign bits must be set.
+ That is, A must be a valid negative address after
+ shifting. */
+ signmask = ~ (fieldmask >> 1);
+ ss = a & signmask;
+ if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
+ flag = bfd_reloc_overflow;
+
+ /* We only need this next bit of code if the sign bit of B
+ is below the sign bit of A. This would only happen if
+ SRC_MASK had fewer bits than BITSIZE. Note that if
+ SRC_MASK has more bits than BITSIZE, we can get into
+ trouble; we would need to verify that B is in range, as
+ we do for A above. */
+ signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
+
+ /* Set all the bits above the sign bit. */
+ b = (b ^ signmask) - signmask;
+
+ b = (b & addrmask) >> bitpos;
+
+ /* Now we can do the addition. */
+ sum = a + b;
+
+ /* See if the result has the correct sign. Bits above the
+ sign bit are junk now; ignore them. If the sum is
+ positive, make sure we did not have all negative inputs;
+ if the sum is negative, make sure we did not have all
+ positive inputs. The test below looks only at the sign
+ bits, and it really just
+ SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
+ */
+ signmask = (fieldmask >> 1) + 1;
+ if (((~ (a ^ b)) & (a ^ sum)) & signmask)
+ flag = bfd_reloc_overflow;
+
break;
+
case complain_overflow_unsigned:
- {
- /* Assumes two's complement. This expression avoids
- overflow if howto->bitsize is the number of bits in
- bfd_vma. */
- bfd_vma reloc_unsigned_max =
- (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
-
- if (check > reloc_unsigned_max)
- overflow = true;
- }
+ /* Checking for an unsigned overflow is relatively easy:
+ trim the addresses and add, and trim the result as well.
+ Overflow is normally indicated when the result does not
+ fit in the field. However, we also need to consider the
+ case when, e.g., fieldmask is 0x7fffffff or smaller, an
+ input is 0x80000000, and bfd_vma is only 32 bits; then we
+ will get sum == 0, but there is an overflow, since the
+ inputs did not fit in the field. Instead of doing a
+ separate test, we can check for this by or-ing in the
+ operands when testing for the sum overflowing its final
+ field. */
+ a = (a & addrmask) >> rightshift;
+ b = (b & addrmask) >> bitpos;
+ sum = (a + b) & addrmask;
+ if ((a | b | sum) & ~ fieldmask)
+ flag = bfd_reloc_overflow;
+
break;
+
case complain_overflow_bitfield:
- {
- /* Assumes two's complement. This expression avoids
- overflow if howto->bitsize is the number of bits in
- bfd_vma. */
- bfd_vma reloc_bits = (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
-
- if ((check & ~reloc_bits) != 0
- && (((bfd_vma) signed_check & ~reloc_bits)
- != (-1 & ~reloc_bits)))
- overflow = true;
- }
+ /* Much like the signed check, but for a field one bit
+ wider, and no trimming inputs with addrmask. We allow a
+ bitfield to represent numbers in the range -2**n to
+ 2**n-1, where n is the number of bits in the field.
+ Note that when bfd_vma is 32 bits, a 32-bit reloc can't
+ overflow, which is exactly what we want. */
+ a >>= rightshift;
+
+ signmask = ~ fieldmask;
+ ss = a & signmask;
+ if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & signmask))
+ flag = bfd_reloc_overflow;
+
+ signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
+ b = (b ^ signmask) - signmask;
+
+ b >>= bitpos;
+
+ sum = a + b;
+
+ /* We mask with addrmask here to explicitly allow an address
+ wrap-around. The Linux kernel relies on it, and it is
+ the only way to write assembler code which can run when
+ loaded at a location 0x80000000 away from the location at
+ which it is linked. */
+ signmask = fieldmask + 1;
+ if (((~ (a ^ b)) & (a ^ sum)) & signmask & addrmask)
+ flag = bfd_reloc_overflow;
+
break;
+
default:
abort ();
}
}
/* Put RELOCATION in the right bits. */
- relocation >>= (bfd_vma) howto->rightshift;
- relocation <<= (bfd_vma) howto->bitpos;
+ relocation >>= (bfd_vma) rightshift;
+ relocation <<= (bfd_vma) bitpos;
/* Add RELOCATION to the right bits of X. */
x = ((x & ~howto->dst_mask)
break;
}
- return overflow ? bfd_reloc_overflow : bfd_reloc_ok;
+ return flag;
}
/*
BFD_RELOC_32
ENUMX
BFD_RELOC_26
+ENUMX
+ BFD_RELOC_24
ENUMX
BFD_RELOC_16
ENUMX
The 24-bit relocation is used in some Intel 960 configurations.
+ENUM
+ BFD_RELOC_32_GOT_PCREL
+ENUMX
+ BFD_RELOC_16_GOT_PCREL
+ENUMX
+ BFD_RELOC_8_GOT_PCREL
+ENUMX
+ BFD_RELOC_32_GOTOFF
+ENUMX
+ BFD_RELOC_16_GOTOFF
+ENUMX
+ BFD_RELOC_LO16_GOTOFF
+ENUMX
+ BFD_RELOC_HI16_GOTOFF
+ENUMX
+ BFD_RELOC_HI16_S_GOTOFF
+ENUMX
+ BFD_RELOC_8_GOTOFF
+ENUMX
+ BFD_RELOC_64_PLT_PCREL
+ENUMX
+ BFD_RELOC_32_PLT_PCREL
+ENUMX
+ BFD_RELOC_24_PLT_PCREL
+ENUMX
+ BFD_RELOC_16_PLT_PCREL
+ENUMX
+ BFD_RELOC_8_PLT_PCREL
+ENUMX
+ BFD_RELOC_64_PLTOFF
+ENUMX
+ BFD_RELOC_32_PLTOFF
+ENUMX
+ BFD_RELOC_16_PLTOFF
+ENUMX
+ BFD_RELOC_LO16_PLTOFF
+ENUMX
+ BFD_RELOC_HI16_PLTOFF
+ENUMX
+ BFD_RELOC_HI16_S_PLTOFF
+ENUMX
+ BFD_RELOC_8_PLTOFF
+ENUMDOC
+ For ELF.
+
+ENUM
+ BFD_RELOC_68K_GLOB_DAT
+ENUMX
+ BFD_RELOC_68K_JMP_SLOT
+ENUMX
+ BFD_RELOC_68K_RELATIVE
+ENUMDOC
+ Relocations used by 68K ELF.
+
ENUM
BFD_RELOC_32_BASEREL
ENUMX
BFD_RELOC_16_BASEREL
+ENUMX
+ BFD_RELOC_LO16_BASEREL
+ENUMX
+ BFD_RELOC_HI16_BASEREL
+ENUMX
+ BFD_RELOC_HI16_S_BASEREL
ENUMX
BFD_RELOC_8_BASEREL
+ENUMX
+ BFD_RELOC_RVA
ENUMDOC
Linkage-table relative.
handled specially, because the value the register will have is
decided relatively late.
-
ENUM
BFD_RELOC_I960_CALLJ
ENUMDOC
BFD_RELOC_SPARC_JMP_SLOT
ENUMX
BFD_RELOC_SPARC_RELATIVE
+ENUMX
+ BFD_RELOC_SPARC_UA16
ENUMX
BFD_RELOC_SPARC_UA32
+ENUMX
+ BFD_RELOC_SPARC_UA64
ENUMDOC
SPARC ELF relocations. There is probably some overlap with other
relocation types already defined.
ENUMX
BFD_RELOC_SPARC_WDISP19
ENUMX
- BFD_RELOC_SPARC_GLOB_JMP
+ BFD_RELOC_SPARC_7
ENUMX
- BFD_RELOC_SPARC_LO7
+ BFD_RELOC_SPARC_6
+ENUMX
+ BFD_RELOC_SPARC_5
+ENUMEQX
+ BFD_RELOC_SPARC_DISP64
+ BFD_RELOC_64_PCREL
+ENUMX
+ BFD_RELOC_SPARC_PLT64
+ENUMX
+ BFD_RELOC_SPARC_HIX22
+ENUMX
+ BFD_RELOC_SPARC_LOX10
+ENUMX
+ BFD_RELOC_SPARC_H44
+ENUMX
+ BFD_RELOC_SPARC_M44
+ENUMX
+ BFD_RELOC_SPARC_L44
+ENUMX
+ BFD_RELOC_SPARC_REGISTER
+ENUMDOC
+ SPARC64 relocations
+
+ENUM
+ BFD_RELOC_SPARC_REV32
ENUMDOC
- Some relocations we're using for SPARC V9 -- subject to change.
+ SPARC little endian relocation
ENUM
BFD_RELOC_ALPHA_GPDISP_HI16
ENUMDOC
- Alpha ECOFF relocations. Some of these treat the symbol or "addend"
- in some special way.
+ Alpha ECOFF and ELF relocations. Some of these treat the symbol or
+ "addend" in some special way.
For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
writing; when reading, it will be the absolute section symbol. The
addend is the displacement in bytes of the "lda" instruction from
relocations out, and is filled in with the file's GP value on
reading, for convenience.
+ENUM
+ BFD_RELOC_ALPHA_GPDISP
+ENUMDOC
+ The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
+ relocation except that there is no accompanying GPDISP_LO16
+ relocation.
+
ENUM
BFD_RELOC_ALPHA_LITERAL
+ENUMX
+ BFD_RELOC_ALPHA_ELF_LITERAL
ENUMX
BFD_RELOC_ALPHA_LITUSE
ENUMDOC
in with the file's GP value on reading, for convenience, as with the
GPDISP_LO16 reloc.
+ The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
+ It should refer to the symbol to be referenced, as with 16_GOTOFF,
+ but it generates output not based on the position within the .got
+ section, but relative to the GP value chosen for the file during the
+ final link stage.
+
The LITUSE reloc, on the instruction using the loaded address, gives
information to the linker that it might be able to use to optimize
away some literal section references. The symbol is ignored (read
2 - byte-manipulation (byte offset reg)
3 - jsr (target of branch)
- The GNU linker currently doesn't do any of this optimizing.
-
ENUM
BFD_RELOC_ALPHA_HINT
ENUMDOC
"hint" field of a jmp/jsr/ret instruction, for possible branch-
prediction logic which may be provided on some processors.
+ENUM
+ BFD_RELOC_ALPHA_LINKAGE
+ENUMDOC
+ The LINKAGE relocation outputs a linkage pair in the object file,
+ which is filled by the linker.
+
+ENUM
+ BFD_RELOC_ALPHA_CODEADDR
+ENUMDOC
+ The CODEADDR relocation outputs a STO_CA in the object file,
+ which is filled by the linker.
+
+ENUM
+ BFD_RELOC_ALPHA_GPREL_HI16
+ENUMX
+ BFD_RELOC_ALPHA_GPREL_LO16
+ENUMDOC
+ The GPREL_HI/LO relocations together form a 32-bit offset from the
+ GP register.
+
ENUM
BFD_RELOC_MIPS_JMP
ENUMDOC
Bits 27..2 of the relocation address shifted right 2 bits;
simple reloc otherwise.
+ENUM
+ BFD_RELOC_MIPS16_JMP
+ENUMDOC
+ The MIPS16 jump instruction.
+
+ENUM
+ BFD_RELOC_MIPS16_GPREL
+ENUMDOC
+ MIPS16 GP relative reloc.
+
ENUM
BFD_RELOC_HI16
ENUMDOC
ENUMEQX
BFD_RELOC_MIPS_GPREL32
BFD_RELOC_GPREL32
+ENUMX
+ BFD_RELOC_MIPS_GOT_HI16
+ENUMX
+ BFD_RELOC_MIPS_GOT_LO16
+ENUMX
+ BFD_RELOC_MIPS_CALL_HI16
+ENUMX
+ BFD_RELOC_MIPS_CALL_LO16
+ENUMX
+ BFD_RELOC_MIPS_SUB
+ENUMX
+ BFD_RELOC_MIPS_GOT_PAGE
+ENUMX
+ BFD_RELOC_MIPS_GOT_OFST
+ENUMX
+ BFD_RELOC_MIPS_GOT_DISP
+ENUMX
+ BFD_RELOC_MIPS_SHIFT5
+ENUMX
+ BFD_RELOC_MIPS_SHIFT6
+ENUMX
+ BFD_RELOC_MIPS_INSERT_A
+ENUMX
+ BFD_RELOC_MIPS_INSERT_B
+ENUMX
+ BFD_RELOC_MIPS_DELETE
+ENUMX
+ BFD_RELOC_MIPS_HIGHEST
+ENUMX
+ BFD_RELOC_MIPS_HIGHER
+ENUMX
+ BFD_RELOC_MIPS_SCN_DISP
+ENUMX
+ BFD_RELOC_MIPS_REL16
+ENUMX
+ BFD_RELOC_MIPS_RELGOT
+ENUMX
+ BFD_RELOC_MIPS_JALR
+COMMENT
ENUMDOC
MIPS ELF relocations.
+COMMENT
+
ENUM
BFD_RELOC_386_GOT32
ENUMX
i386/elf relocations
ENUM
- BFD_RELOC_NS32K_IMM_8
+ BFD_RELOC_X86_64_GOT32
ENUMX
- BFD_RELOC_NS32K_IMM_16
+ BFD_RELOC_X86_64_PLT32
ENUMX
- BFD_RELOC_NS32K_IMM_32
+ BFD_RELOC_X86_64_COPY
ENUMX
- BFD_RELOC_NS32K_IMM_8_PCREL
+ BFD_RELOC_X86_64_GLOB_DAT
ENUMX
- BFD_RELOC_NS32K_IMM_16_PCREL
+ BFD_RELOC_X86_64_JUMP_SLOT
ENUMX
- BFD_RELOC_NS32K_IMM_32_PCREL
+ BFD_RELOC_X86_64_RELATIVE
ENUMX
- BFD_RELOC_NS32K_DISP_8
+ BFD_RELOC_X86_64_GOTPCREL
+ENUMX
+ BFD_RELOC_X86_64_32S
+ENUMDOC
+ x86-64/elf relocations
+
+ENUM
+ BFD_RELOC_NS32K_IMM_8
+ENUMX
+ BFD_RELOC_NS32K_IMM_16
+ENUMX
+ BFD_RELOC_NS32K_IMM_32
+ENUMX
+ BFD_RELOC_NS32K_IMM_8_PCREL
+ENUMX
+ BFD_RELOC_NS32K_IMM_16_PCREL
+ENUMX
+ BFD_RELOC_NS32K_IMM_32_PCREL
+ENUMX
+ BFD_RELOC_NS32K_DISP_8
ENUMX
BFD_RELOC_NS32K_DISP_16
ENUMX
- BFD_RELOC_NS32K_DISP_32
+ BFD_RELOC_NS32K_DISP_32
+ENUMX
+ BFD_RELOC_NS32K_DISP_8_PCREL
+ENUMX
+ BFD_RELOC_NS32K_DISP_16_PCREL
+ENUMX
+ BFD_RELOC_NS32K_DISP_32_PCREL
+ENUMDOC
+ ns32k relocations
+
+ENUM
+ BFD_RELOC_PDP11_DISP_8_PCREL
+ENUMX
+ BFD_RELOC_PDP11_DISP_6_PCREL
+ENUMDOC
+ PDP11 relocations
+
+ENUM
+ BFD_RELOC_PJ_CODE_HI16
+ENUMX
+ BFD_RELOC_PJ_CODE_LO16
+ENUMX
+ BFD_RELOC_PJ_CODE_DIR16
+ENUMX
+ BFD_RELOC_PJ_CODE_DIR32
+ENUMX
+ BFD_RELOC_PJ_CODE_REL16
+ENUMX
+ BFD_RELOC_PJ_CODE_REL32
+ENUMDOC
+ Picojava relocs. Not all of these appear in object files.
+
+ENUM
+ BFD_RELOC_PPC_B26
+ENUMX
+ BFD_RELOC_PPC_BA26
+ENUMX
+ BFD_RELOC_PPC_TOC16
+ENUMX
+ BFD_RELOC_PPC_B16
+ENUMX
+ BFD_RELOC_PPC_B16_BRTAKEN
+ENUMX
+ BFD_RELOC_PPC_B16_BRNTAKEN
+ENUMX
+ BFD_RELOC_PPC_BA16
+ENUMX
+ BFD_RELOC_PPC_BA16_BRTAKEN
+ENUMX
+ BFD_RELOC_PPC_BA16_BRNTAKEN
+ENUMX
+ BFD_RELOC_PPC_COPY
+ENUMX
+ BFD_RELOC_PPC_GLOB_DAT
+ENUMX
+ BFD_RELOC_PPC_JMP_SLOT
+ENUMX
+ BFD_RELOC_PPC_RELATIVE
+ENUMX
+ BFD_RELOC_PPC_LOCAL24PC
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR32
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR16
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR16_LO
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR16_HI
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR16_HA
+ENUMX
+ BFD_RELOC_PPC_EMB_SDAI16
+ENUMX
+ BFD_RELOC_PPC_EMB_SDA2I16
+ENUMX
+ BFD_RELOC_PPC_EMB_SDA2REL
+ENUMX
+ BFD_RELOC_PPC_EMB_SDA21
+ENUMX
+ BFD_RELOC_PPC_EMB_MRKREF
+ENUMX
+ BFD_RELOC_PPC_EMB_RELSEC16
+ENUMX
+ BFD_RELOC_PPC_EMB_RELST_LO
+ENUMX
+ BFD_RELOC_PPC_EMB_RELST_HI
+ENUMX
+ BFD_RELOC_PPC_EMB_RELST_HA
+ENUMX
+ BFD_RELOC_PPC_EMB_BIT_FLD
+ENUMX
+ BFD_RELOC_PPC_EMB_RELSDA
+ENUMX
+ BFD_RELOC_PPC64_HIGHER
+ENUMX
+ BFD_RELOC_PPC64_HIGHER_S
+ENUMX
+ BFD_RELOC_PPC64_HIGHEST
+ENUMX
+ BFD_RELOC_PPC64_HIGHEST_S
+ENUMX
+ BFD_RELOC_PPC64_TOC16_LO
+ENUMX
+ BFD_RELOC_PPC64_TOC16_HI
+ENUMX
+ BFD_RELOC_PPC64_TOC16_HA
+ENUMX
+ BFD_RELOC_PPC64_TOC
+ENUMX
+ BFD_RELOC_PPC64_PLTGOT16
+ENUMX
+ BFD_RELOC_PPC64_PLTGOT16_LO
+ENUMX
+ BFD_RELOC_PPC64_PLTGOT16_HI
+ENUMX
+ BFD_RELOC_PPC64_PLTGOT16_HA
+ENUMX
+ BFD_RELOC_PPC64_ADDR16_DS
+ENUMX
+ BFD_RELOC_PPC64_ADDR16_LO_DS
+ENUMX
+ BFD_RELOC_PPC64_GOT16_DS
+ENUMX
+ BFD_RELOC_PPC64_GOT16_LO_DS
+ENUMX
+ BFD_RELOC_PPC64_PLT16_LO_DS
+ENUMX
+ BFD_RELOC_PPC64_SECTOFF_DS
+ENUMX
+ BFD_RELOC_PPC64_SECTOFF_LO_DS
+ENUMX
+ BFD_RELOC_PPC64_TOC16_DS
+ENUMX
+ BFD_RELOC_PPC64_TOC16_LO_DS
+ENUMX
+ BFD_RELOC_PPC64_PLTGOT16_DS
+ENUMX
+ BFD_RELOC_PPC64_PLTGOT16_LO_DS
+ENUMDOC
+ Power(rs6000) and PowerPC relocations.
+
+ENUM
+ BFD_RELOC_I370_D12
+ENUMDOC
+ IBM 370/390 relocations
+
+ENUM
+ BFD_RELOC_CTOR
+ENUMDOC
+ The type of reloc used to build a contructor table - at the moment
+ probably a 32 bit wide absolute relocation, but the target can choose.
+ It generally does map to one of the other relocation types.
+
+ENUM
+ BFD_RELOC_ARM_PCREL_BRANCH
+ENUMDOC
+ ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
+ not stored in the instruction.
+ENUM
+ BFD_RELOC_ARM_PCREL_BLX
+ENUMDOC
+ ARM 26 bit pc-relative branch. The lowest bit must be zero and is
+ not stored in the instruction. The 2nd lowest bit comes from a 1 bit
+ field in the instruction.
+ENUM
+ BFD_RELOC_THUMB_PCREL_BLX
+ENUMDOC
+ Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
+ not stored in the instruction. The 2nd lowest bit comes from a 1 bit
+ field in the instruction.
+ENUM
+ BFD_RELOC_ARM_IMMEDIATE
+ENUMX
+ BFD_RELOC_ARM_ADRL_IMMEDIATE
+ENUMX
+ BFD_RELOC_ARM_OFFSET_IMM
+ENUMX
+ BFD_RELOC_ARM_SHIFT_IMM
+ENUMX
+ BFD_RELOC_ARM_SWI
+ENUMX
+ BFD_RELOC_ARM_MULTI
+ENUMX
+ BFD_RELOC_ARM_CP_OFF_IMM
+ENUMX
+ BFD_RELOC_ARM_ADR_IMM
+ENUMX
+ BFD_RELOC_ARM_LDR_IMM
+ENUMX
+ BFD_RELOC_ARM_LITERAL
+ENUMX
+ BFD_RELOC_ARM_IN_POOL
+ENUMX
+ BFD_RELOC_ARM_OFFSET_IMM8
+ENUMX
+ BFD_RELOC_ARM_HWLITERAL
+ENUMX
+ BFD_RELOC_ARM_THUMB_ADD
+ENUMX
+ BFD_RELOC_ARM_THUMB_IMM
+ENUMX
+ BFD_RELOC_ARM_THUMB_SHIFT
+ENUMX
+ BFD_RELOC_ARM_THUMB_OFFSET
+ENUMX
+ BFD_RELOC_ARM_GOT12
+ENUMX
+ BFD_RELOC_ARM_GOT32
+ENUMX
+ BFD_RELOC_ARM_JUMP_SLOT
+ENUMX
+ BFD_RELOC_ARM_COPY
+ENUMX
+ BFD_RELOC_ARM_GLOB_DAT
+ENUMX
+ BFD_RELOC_ARM_PLT32
+ENUMX
+ BFD_RELOC_ARM_RELATIVE
+ENUMX
+ BFD_RELOC_ARM_GOTOFF
+ENUMX
+ BFD_RELOC_ARM_GOTPC
+ENUMDOC
+ These relocs are only used within the ARM assembler. They are not
+ (at present) written to any object files.
+
+ENUM
+ BFD_RELOC_SH_PCDISP8BY2
+ENUMX
+ BFD_RELOC_SH_PCDISP12BY2
+ENUMX
+ BFD_RELOC_SH_IMM4
+ENUMX
+ BFD_RELOC_SH_IMM4BY2
+ENUMX
+ BFD_RELOC_SH_IMM4BY4
+ENUMX
+ BFD_RELOC_SH_IMM8
+ENUMX
+ BFD_RELOC_SH_IMM8BY2
+ENUMX
+ BFD_RELOC_SH_IMM8BY4
+ENUMX
+ BFD_RELOC_SH_PCRELIMM8BY2
+ENUMX
+ BFD_RELOC_SH_PCRELIMM8BY4
+ENUMX
+ BFD_RELOC_SH_SWITCH16
+ENUMX
+ BFD_RELOC_SH_SWITCH32
+ENUMX
+ BFD_RELOC_SH_USES
+ENUMX
+ BFD_RELOC_SH_COUNT
+ENUMX
+ BFD_RELOC_SH_ALIGN
+ENUMX
+ BFD_RELOC_SH_CODE
+ENUMX
+ BFD_RELOC_SH_DATA
+ENUMX
+ BFD_RELOC_SH_LABEL
+ENUMX
+ BFD_RELOC_SH_LOOP_START
+ENUMX
+ BFD_RELOC_SH_LOOP_END
+ENUMX
+ BFD_RELOC_SH_COPY
+ENUMX
+ BFD_RELOC_SH_GLOB_DAT
+ENUMX
+ BFD_RELOC_SH_JMP_SLOT
+ENUMX
+ BFD_RELOC_SH_RELATIVE
+ENUMX
+ BFD_RELOC_SH_GOTPC
+ENUMDOC
+ Hitachi SH relocs. Not all of these appear in object files.
+
+ENUM
+ BFD_RELOC_THUMB_PCREL_BRANCH9
+ENUMX
+ BFD_RELOC_THUMB_PCREL_BRANCH12
+ENUMX
+ BFD_RELOC_THUMB_PCREL_BRANCH23
+ENUMDOC
+ Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
+ be zero and is not stored in the instruction.
+
+ENUM
+ BFD_RELOC_ARC_B22_PCREL
+ENUMDOC
+ ARC Cores relocs.
+ ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
+ not stored in the instruction. The high 20 bits are installed in bits 26
+ through 7 of the instruction.
+ENUM
+ BFD_RELOC_ARC_B26
+ENUMDOC
+ ARC 26 bit absolute branch. The lowest two bits must be zero and are not
+ stored in the instruction. The high 24 bits are installed in bits 23
+ through 0.
+
+ENUM
+ BFD_RELOC_D10V_10_PCREL_R
+ENUMDOC
+ Mitsubishi D10V relocs.
+ This is a 10-bit reloc with the right 2 bits
+ assumed to be 0.
+ENUM
+ BFD_RELOC_D10V_10_PCREL_L
+ENUMDOC
+ Mitsubishi D10V relocs.
+ This is a 10-bit reloc with the right 2 bits
+ assumed to be 0. This is the same as the previous reloc
+ except it is in the left container, i.e.,
+ shifted left 15 bits.
+ENUM
+ BFD_RELOC_D10V_18
+ENUMDOC
+ This is an 18-bit reloc with the right 2 bits
+ assumed to be 0.
+ENUM
+ BFD_RELOC_D10V_18_PCREL
+ENUMDOC
+ This is an 18-bit reloc with the right 2 bits
+ assumed to be 0.
+
+ENUM
+ BFD_RELOC_D30V_6
+ENUMDOC
+ Mitsubishi D30V relocs.
+ This is a 6-bit absolute reloc.
+ENUM
+ BFD_RELOC_D30V_9_PCREL
+ENUMDOC
+ This is a 6-bit pc-relative reloc with
+ the right 3 bits assumed to be 0.
+ENUM
+ BFD_RELOC_D30V_9_PCREL_R
+ENUMDOC
+ This is a 6-bit pc-relative reloc with
+ the right 3 bits assumed to be 0. Same
+ as the previous reloc but on the right side
+ of the container.
+ENUM
+ BFD_RELOC_D30V_15
+ENUMDOC
+ This is a 12-bit absolute reloc with the
+ right 3 bitsassumed to be 0.
+ENUM
+ BFD_RELOC_D30V_15_PCREL
+ENUMDOC
+ This is a 12-bit pc-relative reloc with
+ the right 3 bits assumed to be 0.
+ENUM
+ BFD_RELOC_D30V_15_PCREL_R
+ENUMDOC
+ This is a 12-bit pc-relative reloc with
+ the right 3 bits assumed to be 0. Same
+ as the previous reloc but on the right side
+ of the container.
+ENUM
+ BFD_RELOC_D30V_21
+ENUMDOC
+ This is an 18-bit absolute reloc with
+ the right 3 bits assumed to be 0.
+ENUM
+ BFD_RELOC_D30V_21_PCREL
+ENUMDOC
+ This is an 18-bit pc-relative reloc with
+ the right 3 bits assumed to be 0.
+ENUM
+ BFD_RELOC_D30V_21_PCREL_R
+ENUMDOC
+ This is an 18-bit pc-relative reloc with
+ the right 3 bits assumed to be 0. Same
+ as the previous reloc but on the right side
+ of the container.
+ENUM
+ BFD_RELOC_D30V_32
+ENUMDOC
+ This is a 32-bit absolute reloc.
+ENUM
+ BFD_RELOC_D30V_32_PCREL
+ENUMDOC
+ This is a 32-bit pc-relative reloc.
+
+ENUM
+ BFD_RELOC_M32R_24
+ENUMDOC
+ Mitsubishi M32R relocs.
+ This is a 24 bit absolute address.
+ENUM
+ BFD_RELOC_M32R_10_PCREL
+ENUMDOC
+ This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
+ENUM
+ BFD_RELOC_M32R_18_PCREL
+ENUMDOC
+ This is an 18-bit reloc with the right 2 bits assumed to be 0.
+ENUM
+ BFD_RELOC_M32R_26_PCREL
+ENUMDOC
+ This is a 26-bit reloc with the right 2 bits assumed to be 0.
+ENUM
+ BFD_RELOC_M32R_HI16_ULO
+ENUMDOC
+ This is a 16-bit reloc containing the high 16 bits of an address
+ used when the lower 16 bits are treated as unsigned.
+ENUM
+ BFD_RELOC_M32R_HI16_SLO
+ENUMDOC
+ This is a 16-bit reloc containing the high 16 bits of an address
+ used when the lower 16 bits are treated as signed.
+ENUM
+ BFD_RELOC_M32R_LO16
+ENUMDOC
+ This is a 16-bit reloc containing the lower 16 bits of an address.
+ENUM
+ BFD_RELOC_M32R_SDA16
+ENUMDOC
+ This is a 16-bit reloc containing the small data area offset for use in
+ add3, load, and store instructions.
+
+ENUM
+ BFD_RELOC_V850_9_PCREL
+ENUMDOC
+ This is a 9-bit reloc
+ENUM
+ BFD_RELOC_V850_22_PCREL
+ENUMDOC
+ This is a 22-bit reloc
+
+ENUM
+ BFD_RELOC_V850_SDA_16_16_OFFSET
+ENUMDOC
+ This is a 16 bit offset from the short data area pointer.
+ENUM
+ BFD_RELOC_V850_SDA_15_16_OFFSET
+ENUMDOC
+ This is a 16 bit offset (of which only 15 bits are used) from the
+ short data area pointer.
+ENUM
+ BFD_RELOC_V850_ZDA_16_16_OFFSET
+ENUMDOC
+ This is a 16 bit offset from the zero data area pointer.
+ENUM
+ BFD_RELOC_V850_ZDA_15_16_OFFSET
+ENUMDOC
+ This is a 16 bit offset (of which only 15 bits are used) from the
+ zero data area pointer.
+ENUM
+ BFD_RELOC_V850_TDA_6_8_OFFSET
+ENUMDOC
+ This is an 8 bit offset (of which only 6 bits are used) from the
+ tiny data area pointer.
+ENUM
+ BFD_RELOC_V850_TDA_7_8_OFFSET
+ENUMDOC
+ This is an 8bit offset (of which only 7 bits are used) from the tiny
+ data area pointer.
+ENUM
+ BFD_RELOC_V850_TDA_7_7_OFFSET
+ENUMDOC
+ This is a 7 bit offset from the tiny data area pointer.
+ENUM
+ BFD_RELOC_V850_TDA_16_16_OFFSET
+ENUMDOC
+ This is a 16 bit offset from the tiny data area pointer.
+COMMENT
+ENUM
+ BFD_RELOC_V850_TDA_4_5_OFFSET
+ENUMDOC
+ This is a 5 bit offset (of which only 4 bits are used) from the tiny
+ data area pointer.
+ENUM
+ BFD_RELOC_V850_TDA_4_4_OFFSET
+ENUMDOC
+ This is a 4 bit offset from the tiny data area pointer.
+ENUM
+ BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
+ENUMDOC
+ This is a 16 bit offset from the short data area pointer, with the
+ bits placed non-contigously in the instruction.
+ENUM
+ BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
+ENUMDOC
+ This is a 16 bit offset from the zero data area pointer, with the
+ bits placed non-contigously in the instruction.
+ENUM
+ BFD_RELOC_V850_CALLT_6_7_OFFSET
+ENUMDOC
+ This is a 6 bit offset from the call table base pointer.
+ENUM
+ BFD_RELOC_V850_CALLT_16_16_OFFSET
+ENUMDOC
+ This is a 16 bit offset from the call table base pointer.
+COMMENT
+
+ENUM
+ BFD_RELOC_MN10300_32_PCREL
+ENUMDOC
+ This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
+ instruction.
+ENUM
+ BFD_RELOC_MN10300_16_PCREL
+ENUMDOC
+ This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
+ instruction.
+
+ENUM
+ BFD_RELOC_TIC30_LDP
+ENUMDOC
+ This is a 8bit DP reloc for the tms320c30, where the most
+ significant 8 bits of a 24 bit word are placed into the least
+ significant 8 bits of the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_PARTLS7
+ENUMDOC
+ This is a 7bit reloc for the tms320c54x, where the least
+ significant 7 bits of a 16 bit word are placed into the least
+ significant 7 bits of the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_PARTMS9
+ENUMDOC
+ This is a 9bit DP reloc for the tms320c54x, where the most
+ significant 9 bits of a 16 bit word are placed into the least
+ significant 9 bits of the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_23
+ENUMDOC
+ This is an extended address 23-bit reloc for the tms320c54x.
+
+ENUM
+ BFD_RELOC_TIC54X_16_OF_23
+ENUMDOC
+ This is a 16-bit reloc for the tms320c54x, where the least
+ significant 16 bits of a 23-bit extended address are placed into
+ the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_MS7_OF_23
+ENUMDOC
+ This is a reloc for the tms320c54x, where the most
+ significant 7 bits of a 23-bit extended address are placed into
+ the opcode.
+
+ENUM
+ BFD_RELOC_FR30_48
+ENUMDOC
+ This is a 48 bit reloc for the FR30 that stores 32 bits.
+ENUM
+ BFD_RELOC_FR30_20
+ENUMDOC
+ This is a 32 bit reloc for the FR30 that stores 20 bits split up into
+ two sections.
+ENUM
+ BFD_RELOC_FR30_6_IN_4
+ENUMDOC
+ This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
+ 4 bits.
+ENUM
+ BFD_RELOC_FR30_8_IN_8
+ENUMDOC
+ This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
+ into 8 bits.
+ENUM
+ BFD_RELOC_FR30_9_IN_8
+ENUMDOC
+ This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
+ into 8 bits.
+ENUM
+ BFD_RELOC_FR30_10_IN_8
+ENUMDOC
+ This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
+ into 8 bits.
+ENUM
+ BFD_RELOC_FR30_9_PCREL
+ENUMDOC
+ This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
+ short offset into 8 bits.
+ENUM
+ BFD_RELOC_FR30_12_PCREL
+ENUMDOC
+ This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
+ short offset into 11 bits.
+
+ENUM
+ BFD_RELOC_MCORE_PCREL_IMM8BY4
+ENUMX
+ BFD_RELOC_MCORE_PCREL_IMM11BY2
+ENUMX
+ BFD_RELOC_MCORE_PCREL_IMM4BY2
+ENUMX
+ BFD_RELOC_MCORE_PCREL_32
+ENUMX
+ BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
+ENUMX
+ BFD_RELOC_MCORE_RVA
+ENUMDOC
+ Motorola Mcore relocations.
+
+ENUM
+ BFD_RELOC_MMIX_GETA
+ENUMX
+ BFD_RELOC_MMIX_GETA_1
+ENUMX
+ BFD_RELOC_MMIX_GETA_2
+ENUMX
+ BFD_RELOC_MMIX_GETA_3
+ENUMDOC
+ These are relocations for the GETA instruction.
+ENUM
+ BFD_RELOC_MMIX_CBRANCH
+ENUMX
+ BFD_RELOC_MMIX_CBRANCH_J
+ENUMX
+ BFD_RELOC_MMIX_CBRANCH_1
+ENUMX
+ BFD_RELOC_MMIX_CBRANCH_2
+ENUMX
+ BFD_RELOC_MMIX_CBRANCH_3
+ENUMDOC
+ These are relocations for a conditional branch instruction.
+ENUM
+ BFD_RELOC_MMIX_PUSHJ
+ENUMX
+ BFD_RELOC_MMIX_PUSHJ_1
+ENUMX
+ BFD_RELOC_MMIX_PUSHJ_2
+ENUMX
+ BFD_RELOC_MMIX_PUSHJ_3
+ENUMDOC
+ These are relocations for the PUSHJ instruction.
+ENUM
+ BFD_RELOC_MMIX_JMP
+ENUMX
+ BFD_RELOC_MMIX_JMP_1
+ENUMX
+ BFD_RELOC_MMIX_JMP_2
+ENUMX
+ BFD_RELOC_MMIX_JMP_3
+ENUMDOC
+ These are relocations for the JMP instruction.
+ENUM
+ BFD_RELOC_MMIX_ADDR19
+ENUMDOC
+ This is a relocation for a relative address as in a GETA instruction or
+ a branch.
+ENUM
+ BFD_RELOC_MMIX_ADDR27
+ENUMDOC
+ This is a relocation for a relative address as in a JMP instruction.
+ENUM
+ BFD_RELOC_MMIX_REG_OR_BYTE
+ENUMDOC
+ This is a relocation for an instruction field that may be a general
+ register or a value 0..255.
+ENUM
+ BFD_RELOC_MMIX_REG
+ENUMDOC
+ This is a relocation for an instruction field that may be a general
+ register.
+ENUM
+ BFD_RELOC_MMIX_BASE_PLUS_OFFSET
+ENUMDOC
+ This is a relocation for two instruction fields holding a register and
+ an offset, the equivalent of the relocation.
+ENUM
+ BFD_RELOC_MMIX_LOCAL
+ENUMDOC
+ This relocation is an assertion that the expression is not allocated as
+ a global register. It does not modify contents.
+
+ENUM
+ BFD_RELOC_AVR_7_PCREL
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit pc relative
+ short offset into 7 bits.
+ENUM
+ BFD_RELOC_AVR_13_PCREL
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 13 bit pc relative
+ short offset into 12 bits.
+ENUM
+ BFD_RELOC_AVR_16_PM
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 17 bit value (usually
+ program memory address) into 16 bits.
+ENUM
+ BFD_RELOC_AVR_LO8_LDI
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+ data memory address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_HI8_LDI
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+ of data memory address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_HH8_LDI
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+ of program memory address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_LO8_LDI_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (usually data memory address) into 8 bit immediate value of SUBI insn.
+ENUM
+ BFD_RELOC_AVR_HI8_LDI_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (high 8 bit of data memory address) into 8 bit immediate value of
+ SUBI insn.
+ENUM
+ BFD_RELOC_AVR_HH8_LDI_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (most high 8 bit of program memory address) into 8 bit immediate value
+ of LDI or SUBI insn.
+ENUM
+ BFD_RELOC_AVR_LO8_LDI_PM
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+ command address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_HI8_LDI_PM
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+ of command address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_HH8_LDI_PM
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+ of command address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_LO8_LDI_PM_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (usually command address) into 8 bit immediate value of SUBI insn.
+ENUM
+ BFD_RELOC_AVR_HI8_LDI_PM_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (high 8 bit of 16 bit command address) into 8 bit immediate value
+ of SUBI insn.
+ENUM
+ BFD_RELOC_AVR_HH8_LDI_PM_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (high 6 bit of 22 bit command address) into 8 bit immediate
+ value of SUBI insn.
+ENUM
+ BFD_RELOC_AVR_CALL
+ENUMDOC
+ This is a 32 bit reloc for the AVR that stores 23 bit value
+ into 22 bits.
+
+ENUM
+ BFD_RELOC_390_12
+ENUMDOC
+ Direct 12 bit.
+ENUM
+ BFD_RELOC_390_GOT12
+ENUMDOC
+ 12 bit GOT offset.
+ENUM
+ BFD_RELOC_390_PLT32
+ENUMDOC
+ 32 bit PC relative PLT address.
+ENUM
+ BFD_RELOC_390_COPY
+ENUMDOC
+ Copy symbol at runtime.
+ENUM
+ BFD_RELOC_390_GLOB_DAT
+ENUMDOC
+ Create GOT entry.
+ENUM
+ BFD_RELOC_390_JMP_SLOT
+ENUMDOC
+ Create PLT entry.
+ENUM
+ BFD_RELOC_390_RELATIVE
+ENUMDOC
+ Adjust by program base.
+ENUM
+ BFD_RELOC_390_GOTPC
+ENUMDOC
+ 32 bit PC relative offset to GOT.
+ENUM
+ BFD_RELOC_390_GOT16
+ENUMDOC
+ 16 bit GOT offset.
+ENUM
+ BFD_RELOC_390_PC16DBL
+ENUMDOC
+ PC relative 16 bit shifted by 1.
+ENUM
+ BFD_RELOC_390_PLT16DBL
+ENUMDOC
+ 16 bit PC rel. PLT shifted by 1.
+ENUM
+ BFD_RELOC_390_PC32DBL
+ENUMDOC
+ PC relative 32 bit shifted by 1.
+ENUM
+ BFD_RELOC_390_PLT32DBL
+ENUMDOC
+ 32 bit PC rel. PLT shifted by 1.
+ENUM
+ BFD_RELOC_390_GOTPCDBL
+ENUMDOC
+ 32 bit PC rel. GOT shifted by 1.
+ENUM
+ BFD_RELOC_390_GOT64
+ENUMDOC
+ 64 bit GOT offset.
+ENUM
+ BFD_RELOC_390_PLT64
+ENUMDOC
+ 64 bit PC relative PLT address.
+ENUM
+ BFD_RELOC_390_GOTENT
+ENUMDOC
+ 32 bit rel. offset to GOT entry.
+
+ENUM
+ BFD_RELOC_VTABLE_INHERIT
+ENUMX
+ BFD_RELOC_VTABLE_ENTRY
+ENUMDOC
+ These two relocations are used by the linker to determine which of
+ the entries in a C++ virtual function table are actually used. When
+ the --gc-sections option is given, the linker will zero out the entries
+ that are not used, so that the code for those functions need not be
+ included in the output.
+
+ VTABLE_INHERIT is a zero-space relocation used to describe to the
+ linker the inheritence tree of a C++ virtual function table. The
+ relocation's symbol should be the parent class' vtable, and the
+ relocation should be located at the child vtable.
+
+ VTABLE_ENTRY is a zero-space relocation that describes the use of a
+ virtual function table entry. The reloc's symbol should refer to the
+ table of the class mentioned in the code. Off of that base, an offset
+ describes the entry that is being used. For Rela hosts, this offset
+ is stored in the reloc's addend. For Rel hosts, we are forced to put
+ this offset in the reloc's section offset.
+
+ENUM
+ BFD_RELOC_IA64_IMM14
ENUMX
- BFD_RELOC_NS32K_DISP_8_PCREL
+ BFD_RELOC_IA64_IMM22
ENUMX
- BFD_RELOC_NS32K_DISP_16_PCREL
+ BFD_RELOC_IA64_IMM64
ENUMX
- BFD_RELOC_NS32K_DISP_32_PCREL
+ BFD_RELOC_IA64_DIR32MSB
+ENUMX
+ BFD_RELOC_IA64_DIR32LSB
+ENUMX
+ BFD_RELOC_IA64_DIR64MSB
+ENUMX
+ BFD_RELOC_IA64_DIR64LSB
+ENUMX
+ BFD_RELOC_IA64_GPREL22
+ENUMX
+ BFD_RELOC_IA64_GPREL64I
+ENUMX
+ BFD_RELOC_IA64_GPREL32MSB
+ENUMX
+ BFD_RELOC_IA64_GPREL32LSB
+ENUMX
+ BFD_RELOC_IA64_GPREL64MSB
+ENUMX
+ BFD_RELOC_IA64_GPREL64LSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF22
+ENUMX
+ BFD_RELOC_IA64_LTOFF64I
+ENUMX
+ BFD_RELOC_IA64_PLTOFF22
+ENUMX
+ BFD_RELOC_IA64_PLTOFF64I
+ENUMX
+ BFD_RELOC_IA64_PLTOFF64MSB
+ENUMX
+ BFD_RELOC_IA64_PLTOFF64LSB
+ENUMX
+ BFD_RELOC_IA64_FPTR64I
+ENUMX
+ BFD_RELOC_IA64_FPTR32MSB
+ENUMX
+ BFD_RELOC_IA64_FPTR32LSB
+ENUMX
+ BFD_RELOC_IA64_FPTR64MSB
+ENUMX
+ BFD_RELOC_IA64_FPTR64LSB
+ENUMX
+ BFD_RELOC_IA64_PCREL21B
+ENUMX
+ BFD_RELOC_IA64_PCREL21BI
+ENUMX
+ BFD_RELOC_IA64_PCREL21M
+ENUMX
+ BFD_RELOC_IA64_PCREL21F
+ENUMX
+ BFD_RELOC_IA64_PCREL22
+ENUMX
+ BFD_RELOC_IA64_PCREL60B
+ENUMX
+ BFD_RELOC_IA64_PCREL64I
+ENUMX
+ BFD_RELOC_IA64_PCREL32MSB
+ENUMX
+ BFD_RELOC_IA64_PCREL32LSB
+ENUMX
+ BFD_RELOC_IA64_PCREL64MSB
+ENUMX
+ BFD_RELOC_IA64_PCREL64LSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR22
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR64I
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR32MSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR32LSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR64MSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR64LSB
+ENUMX
+ BFD_RELOC_IA64_SEGREL32MSB
+ENUMX
+ BFD_RELOC_IA64_SEGREL32LSB
+ENUMX
+ BFD_RELOC_IA64_SEGREL64MSB
+ENUMX
+ BFD_RELOC_IA64_SEGREL64LSB
+ENUMX
+ BFD_RELOC_IA64_SECREL32MSB
+ENUMX
+ BFD_RELOC_IA64_SECREL32LSB
+ENUMX
+ BFD_RELOC_IA64_SECREL64MSB
+ENUMX
+ BFD_RELOC_IA64_SECREL64LSB
+ENUMX
+ BFD_RELOC_IA64_REL32MSB
+ENUMX
+ BFD_RELOC_IA64_REL32LSB
+ENUMX
+ BFD_RELOC_IA64_REL64MSB
+ENUMX
+ BFD_RELOC_IA64_REL64LSB
+ENUMX
+ BFD_RELOC_IA64_LTV32MSB
+ENUMX
+ BFD_RELOC_IA64_LTV32LSB
+ENUMX
+ BFD_RELOC_IA64_LTV64MSB
+ENUMX
+ BFD_RELOC_IA64_LTV64LSB
+ENUMX
+ BFD_RELOC_IA64_IPLTMSB
+ENUMX
+ BFD_RELOC_IA64_IPLTLSB
+ENUMX
+ BFD_RELOC_IA64_COPY
+ENUMX
+ BFD_RELOC_IA64_TPREL22
+ENUMX
+ BFD_RELOC_IA64_TPREL64MSB
+ENUMX
+ BFD_RELOC_IA64_TPREL64LSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF_TP22
+ENUMX
+ BFD_RELOC_IA64_LTOFF22X
+ENUMX
+ BFD_RELOC_IA64_LDXMOV
ENUMDOC
- ns32k relocations
+ Intel IA64 Relocations.
ENUM
- BFD_RELOC_PPC_B26
+ BFD_RELOC_M68HC11_HI8
ENUMDOC
- PowerPC/POWER (RS/6000) relocs.
- 26 bit relative branch. Low two bits must be zero. High 24
- bits installed in bits 6 through 29 of instruction.
+ Motorola 68HC11 reloc.
+ This is the 8 bits high part of an absolute address.
ENUM
- BFD_RELOC_PPC_BA26
+ BFD_RELOC_M68HC11_LO8
ENUMDOC
- 26 bit absolute branch, like BFD_RELOC_PPC_B26 but absolute.
+ Motorola 68HC11 reloc.
+ This is the 8 bits low part of an absolute address.
ENUM
- BFD_RELOC_PPC_TOC16
+ BFD_RELOC_M68HC11_3B
ENUMDOC
- 16 bit TOC relative reference.
+ Motorola 68HC11 reloc.
+ This is the 3 bits of a value.
ENUM
- BFD_RELOC_CTOR
+ BFD_RELOC_CRIS_BDISP8
+ENUMX
+ BFD_RELOC_CRIS_UNSIGNED_5
+ENUMX
+ BFD_RELOC_CRIS_SIGNED_6
+ENUMX
+ BFD_RELOC_CRIS_UNSIGNED_6
+ENUMX
+ BFD_RELOC_CRIS_UNSIGNED_4
ENUMDOC
- The type of reloc used to build a contructor table - at the moment
- probably a 32 bit wide absolute relocation, but the target can choose.
- It generally does map to one of the other relocation types.
-
+ These relocs are only used within the CRIS assembler. They are not
+ (at present) written to any object files.
ENUM
- BFD_RELOC_ARM_PCREL_BRANCH
+ BFD_RELOC_CRIS_COPY
+ENUMX
+ BFD_RELOC_CRIS_GLOB_DAT
+ENUMX
+ BFD_RELOC_CRIS_JUMP_SLOT
+ENUMX
+ BFD_RELOC_CRIS_RELATIVE
ENUMDOC
- ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
- not stored in the instruction.
+ Relocs used in ELF shared libraries for CRIS.
ENUM
- BFD_RELOC_ARM_IMMEDIATE
+ BFD_RELOC_CRIS_32_GOT
+ENUMDOC
+ 32-bit offset to symbol-entry within GOT.
+ENUM
+ BFD_RELOC_CRIS_16_GOT
+ENUMDOC
+ 16-bit offset to symbol-entry within GOT.
+ENUM
+ BFD_RELOC_CRIS_32_GOTPLT
+ENUMDOC
+ 32-bit offset to symbol-entry within GOT, with PLT handling.
+ENUM
+ BFD_RELOC_CRIS_16_GOTPLT
+ENUMDOC
+ 16-bit offset to symbol-entry within GOT, with PLT handling.
+ENUM
+ BFD_RELOC_CRIS_32_GOTREL
+ENUMDOC
+ 32-bit offset to symbol, relative to GOT.
+ENUM
+ BFD_RELOC_CRIS_32_PLT_GOTREL
+ENUMDOC
+ 32-bit offset to symbol with PLT entry, relative to GOT.
+ENUM
+ BFD_RELOC_CRIS_32_PLT_PCREL
+ENUMDOC
+ 32-bit offset to symbol with PLT entry, relative to this relocation.
+
+ENUM
+ BFD_RELOC_860_COPY
ENUMX
- BFD_RELOC_ARM_OFFSET_IMM
+ BFD_RELOC_860_GLOB_DAT
ENUMX
- BFD_RELOC_ARM_SHIFT_IMM
+ BFD_RELOC_860_JUMP_SLOT
ENUMX
- BFD_RELOC_ARM_SWI
+ BFD_RELOC_860_RELATIVE
ENUMX
- BFD_RELOC_ARM_MULTI
+ BFD_RELOC_860_PC26
ENUMX
- BFD_RELOC_ARM_CP_OFF_IMM
+ BFD_RELOC_860_PLT26
+ENUMX
+ BFD_RELOC_860_PC16
+ENUMX
+ BFD_RELOC_860_LOW0
+ENUMX
+ BFD_RELOC_860_SPLIT0
+ENUMX
+ BFD_RELOC_860_LOW1
+ENUMX
+ BFD_RELOC_860_SPLIT1
+ENUMX
+ BFD_RELOC_860_LOW2
+ENUMX
+ BFD_RELOC_860_SPLIT2
+ENUMX
+ BFD_RELOC_860_LOW3
+ENUMX
+ BFD_RELOC_860_LOGOT0
+ENUMX
+ BFD_RELOC_860_SPGOT0
+ENUMX
+ BFD_RELOC_860_LOGOT1
+ENUMX
+ BFD_RELOC_860_SPGOT1
+ENUMX
+ BFD_RELOC_860_LOGOTOFF0
+ENUMX
+ BFD_RELOC_860_SPGOTOFF0
+ENUMX
+ BFD_RELOC_860_LOGOTOFF1
+ENUMX
+ BFD_RELOC_860_SPGOTOFF1
+ENUMX
+ BFD_RELOC_860_LOGOTOFF2
+ENUMX
+ BFD_RELOC_860_LOGOTOFF3
+ENUMX
+ BFD_RELOC_860_LOPC
+ENUMX
+ BFD_RELOC_860_HIGHADJ
+ENUMX
+ BFD_RELOC_860_HAGOT
+ENUMX
+ BFD_RELOC_860_HAGOTOFF
+ENUMX
+ BFD_RELOC_860_HAPC
+ENUMX
+ BFD_RELOC_860_HIGH
+ENUMX
+ BFD_RELOC_860_HIGOT
+ENUMX
+ BFD_RELOC_860_HIGOTOFF
ENUMDOC
- These relocs are only used within the ARM assembler. They are not
- (at present) written to any object files.
+ Intel i860 Relocations.
-COMMENT
-{* start-sanitize-arc *}
ENUM
- BFD_RELOC_ARC_B22_PCREL
+ BFD_RELOC_OPENRISC_ABS_26
+ENUMX
+ BFD_RELOC_OPENRISC_REL_26
ENUMDOC
- Argonaut RISC Core (ARC) relocs.
- ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
- not stored in the instruction. High 20 bits installed in bits 7 through 26
- of instruction.
-COMMENT
-{* end-sanitize-arc *}
+ OpenRISC Relocations.
+
+ENUM
+ BFD_RELOC_H8_DIR16A8
+ENUMX
+ BFD_RELOC_H8_DIR16R8
+ENUMX
+ BFD_RELOC_H8_DIR24A8
+ENUMX
+ BFD_RELOC_H8_DIR24R8
+ENUMX
+ BFD_RELOC_H8_DIR32A16
+ENUMDOC
+ H8 elf Relocations.
ENDSENUM
BFD_RELOC_UNUSED
-
CODE_FRAGMENT
.
.typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
*/
-
/*
FUNCTION
bfd_reloc_type_lookup
SYNOPSIS
- const struct reloc_howto_struct *
+ reloc_howto_type *
bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code);
DESCRIPTION
*/
-
-const struct reloc_howto_struct *
+reloc_howto_type *
bfd_reloc_type_lookup (abfd, code)
bfd *abfd;
bfd_reloc_code_real_type code;
static reloc_howto_type bfd_howto_32 =
HOWTO (0, 00, 2, 32, false, 0, complain_overflow_bitfield, 0, "VRT32", false, 0xffffffff, 0xffffffff, true);
-
/*
INTERNAL_FUNCTION
bfd_default_reloc_type_lookup
SYNOPSIS
- const struct reloc_howto_struct *bfd_default_reloc_type_lookup
+ reloc_howto_type *bfd_default_reloc_type_lookup
(bfd *abfd, bfd_reloc_code_real_type code);
DESCRIPTION
Provides a default relocation lookup routine for any architecture.
-
*/
-const struct reloc_howto_struct *
+reloc_howto_type *
bfd_default_reloc_type_lookup (abfd, code)
bfd *abfd;
bfd_reloc_code_real_type code;
default:
BFD_FAIL ();
}
- return (const struct reloc_howto_struct *) NULL;
+ return (reloc_howto_type *) NULL;
}
/*
/*ARGSUSED*/
boolean
bfd_generic_relax_section (abfd, section, link_info, again)
- bfd *abfd;
- asection *section;
- struct bfd_link_info *link_info;
+ bfd *abfd ATTRIBUTE_UNUSED;
+ asection *section ATTRIBUTE_UNUSED;
+ struct bfd_link_info *link_info ATTRIBUTE_UNUSED;
boolean *again;
{
*again = false;
return true;
}
+/*
+INTERNAL_FUNCTION
+ bfd_generic_gc_sections
+
+SYNOPSIS
+ boolean bfd_generic_gc_sections
+ (bfd *, struct bfd_link_info *);
+
+DESCRIPTION
+ Provides default handling for relaxing for back ends which
+ don't do section gc -- i.e., does nothing.
+*/
+
+/*ARGSUSED*/
+boolean
+bfd_generic_gc_sections (abfd, link_info)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ struct bfd_link_info *link_info ATTRIBUTE_UNUSED;
+{
+ return true;
+}
+
+/*
+INTERNAL_FUNCTION
+ bfd_generic_merge_sections
+
+SYNOPSIS
+ boolean bfd_generic_merge_sections
+ (bfd *, struct bfd_link_info *);
+
+DESCRIPTION
+ Provides default handling for SEC_MERGE section merging for back ends
+ which don't have SEC_MERGE support -- i.e., does nothing.
+*/
+
+/*ARGSUSED*/
+boolean
+bfd_generic_merge_sections (abfd, link_info)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ struct bfd_link_info *link_info ATTRIBUTE_UNUSED;
+{
+ return true;
+}
+
/*
INTERNAL_FUNCTION
bfd_generic_get_relocated_section_contents
if (reloc_size < 0)
goto error_return;
- reloc_vector = (arelent **) malloc (reloc_size);
+ reloc_vector = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
if (reloc_vector == NULL && reloc_size != 0)
- {
- bfd_set_error (bfd_error_no_memory);
- goto error_return;
- }
+ goto error_return;
/* read in the section */
if (!bfd_get_section_contents (input_bfd,
input_section,
(PTR) data,
- 0,
+ (bfd_vma) 0,
input_section->_raw_size))
goto error_return;
case bfd_reloc_undefined:
if (!((*link_info->callbacks->undefined_symbol)
(link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
- input_bfd, input_section, (*parent)->address)))
+ input_bfd, input_section, (*parent)->address,
+ true)))
goto error_return;
break;
case bfd_reloc_dangerous:
projects / deliverable / binutils-gdb.git / blobdiff