/* BFD support for handling relocation entries.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003
+ 2000, 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
Written by Cygnus Support.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
/*
SECTION
}
/* Is the address of the relocation really within the section? */
- if (reloc_entry->address > (input_section->_cooked_size
- / bfd_octets_per_byte (abfd)))
+ if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
/* Work out which section the relocation is targeted at and the
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
-#if 1
/* For m68k-coff, the addend was being subtracted twice during
relocation with -r. Removing the line below this comment
fixes that problem; see PR 2953.
right
*/
relocation -= reloc_entry->addend;
-#endif
reloc_entry->addend = 0;
}
else
}
/* Is the address of the relocation really within the section? */
- if (reloc_entry->address > (input_section->_cooked_size
- / bfd_octets_per_byte (abfd)))
+ if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
/* Work out which section the relocation is targeted at and the
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
-#if 1
-/* For m68k-coff, the addend was being subtracted twice during
- relocation with -r. Removing the line below this comment
- fixes that problem; see PR 2953.
+
+ /* For m68k-coff, the addend was being subtracted twice during
+ relocation with -r. Removing the line below this comment
+ fixes that problem; see PR 2953.
However, Ian wrote the following, regarding removing the line below,
which explains why it is still enabled: --djm
7) if they are different you have to figure out which version is
right. */
relocation -= reloc_entry->addend;
-#endif
- reloc_entry->addend = 0;
+ /* FIXME: There should be no target specific code here... */
+ if (strcmp (abfd->xvec->name, "coff-z8k") != 0)
+ reloc_entry->addend = 0;
}
else
{
bfd_vma relocation;
/* Sanity check the address. */
- if (address > input_section->_raw_size)
+ if (address > bfd_get_section_limit (input_bfd, input_section))
return bfd_reloc_outofrange;
/* This function assumes that we are dealing with a basic relocation
The 24-bit relocation is used in some Intel 960 configurations.
+ENUM
+ BFD_RELOC_32_SECREL
+ENUMDOC
+ Section relative relocations. Some targets need this for DWARF2.
+
ENUM
BFD_RELOC_32_GOT_PCREL
ENUMX
BFD_RELOC_LO16
ENUMDOC
Low 16 bits.
+
ENUM
- BFD_RELOC_PCREL_HI16_S
+ BFD_RELOC_HI16_PCREL
ENUMDOC
- Like BFD_RELOC_HI16_S, but PC relative.
+ High 16 bits of 32-bit pc-relative value
+ENUM
+ BFD_RELOC_HI16_S_PCREL
+ENUMDOC
+ High 16 bits of 32-bit pc-relative value, adjusted
+ENUM
+ BFD_RELOC_LO16_PCREL
+ENUMDOC
+ Low 16 bits of pc-relative value
+
+ENUM
+ BFD_RELOC_MIPS16_HI16
+ENUMDOC
+ MIPS16 high 16 bits of 32-bit value.
+ENUM
+ BFD_RELOC_MIPS16_HI16_S
+ENUMDOC
+ MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
+ extended and added to form the final result. If the low 16
+ bits form a negative number, we need to add one to the high value
+ to compensate for the borrow when the low bits are added.
ENUM
- BFD_RELOC_PCREL_LO16
+ BFD_RELOC_MIPS16_LO16
ENUMDOC
- Like BFD_RELOC_LO16, but PC relative.
+ MIPS16 low 16 bits.
ENUM
BFD_RELOC_MIPS_LITERAL
BFD_RELOC_MIPS_RELGOT
ENUMX
BFD_RELOC_MIPS_JALR
+ENUMX
+ BFD_RELOC_MIPS_TLS_DTPMOD32
+ENUMX
+ BFD_RELOC_MIPS_TLS_DTPREL32
+ENUMX
+ BFD_RELOC_MIPS_TLS_DTPMOD64
+ENUMX
+ BFD_RELOC_MIPS_TLS_DTPREL64
+ENUMX
+ BFD_RELOC_MIPS_TLS_GD
+ENUMX
+ BFD_RELOC_MIPS_TLS_LDM
+ENUMX
+ BFD_RELOC_MIPS_TLS_DTPREL_HI16
+ENUMX
+ BFD_RELOC_MIPS_TLS_DTPREL_LO16
+ENUMX
+ BFD_RELOC_MIPS_TLS_GOTTPREL
+ENUMX
+ BFD_RELOC_MIPS_TLS_TPREL32
+ENUMX
+ BFD_RELOC_MIPS_TLS_TPREL64
+ENUMX
+ BFD_RELOC_MIPS_TLS_TPREL_HI16
+ENUMX
+ BFD_RELOC_MIPS_TLS_TPREL_LO16
ENUMDOC
MIPS ELF relocations.
COMMENT
BFD_RELOC_FRV_GPRELHI
ENUMX
BFD_RELOC_FRV_GPRELLO
+ENUMX
+ BFD_RELOC_FRV_GOT12
+ENUMX
+ BFD_RELOC_FRV_GOTHI
+ENUMX
+ BFD_RELOC_FRV_GOTLO
+ENUMX
+ BFD_RELOC_FRV_FUNCDESC
+ENUMX
+ BFD_RELOC_FRV_FUNCDESC_GOT12
+ENUMX
+ BFD_RELOC_FRV_FUNCDESC_GOTHI
+ENUMX
+ BFD_RELOC_FRV_FUNCDESC_GOTLO
+ENUMX
+ BFD_RELOC_FRV_FUNCDESC_VALUE
+ENUMX
+ BFD_RELOC_FRV_FUNCDESC_GOTOFF12
+ENUMX
+ BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
+ENUMX
+ BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
+ENUMX
+ BFD_RELOC_FRV_GOTOFF12
+ENUMX
+ BFD_RELOC_FRV_GOTOFFHI
+ENUMX
+ BFD_RELOC_FRV_GOTOFFLO
+ENUMX
+ BFD_RELOC_FRV_GETTLSOFF
+ENUMX
+ BFD_RELOC_FRV_TLSDESC_VALUE
+ENUMX
+ BFD_RELOC_FRV_GOTTLSDESC12
+ENUMX
+ BFD_RELOC_FRV_GOTTLSDESCHI
+ENUMX
+ BFD_RELOC_FRV_GOTTLSDESCLO
+ENUMX
+ BFD_RELOC_FRV_TLSMOFF12
+ENUMX
+ BFD_RELOC_FRV_TLSMOFFHI
+ENUMX
+ BFD_RELOC_FRV_TLSMOFFLO
+ENUMX
+ BFD_RELOC_FRV_GOTTLSOFF12
+ENUMX
+ BFD_RELOC_FRV_GOTTLSOFFHI
+ENUMX
+ BFD_RELOC_FRV_GOTTLSOFFLO
+ENUMX
+ BFD_RELOC_FRV_TLSOFF
+ENUMX
+ BFD_RELOC_FRV_TLSDESC_RELAX
+ENUMX
+ BFD_RELOC_FRV_GETTLSOFF_RELAX
+ENUMX
+ BFD_RELOC_FRV_TLSOFF_RELAX
+ENUMX
+ BFD_RELOC_FRV_TLSMOFF
ENUMDOC
Fujitsu Frv Relocations.
COMMENT
BFD_RELOC_X86_64_GOTTPOFF
ENUMX
BFD_RELOC_X86_64_TPOFF32
+ENUMX
+ BFD_RELOC_X86_64_GOTOFF64
+ENUMX
+ BFD_RELOC_X86_64_GOTPC32
ENUMDOC
x86-64/elf relocations
Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
not stored in the instruction. The 2nd lowest bit comes from a 1 bit
field in the instruction.
+
+ENUM
+ BFD_RELOC_THUMB_PCREL_BRANCH7
+ENUMX
+ BFD_RELOC_THUMB_PCREL_BRANCH9
+ENUMX
+ BFD_RELOC_THUMB_PCREL_BRANCH12
+ENUMX
+ BFD_RELOC_THUMB_PCREL_BRANCH20
+ENUMX
+ BFD_RELOC_THUMB_PCREL_BRANCH23
+ENUMX
+ BFD_RELOC_THUMB_PCREL_BRANCH25
+ENUMDOC
+ Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
+ The lowest bit must be zero and is not stored in the instruction.
+ Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
+ "nn" one smaller in all cases. Note further that BRANCH23
+ corresponds to R_ARM_THM_CALL.
+
+ENUM
+ BFD_RELOC_ARM_OFFSET_IMM
+ENUMDOC
+ 12-bit immediate offset, used in ARM-format ldr and str instructions.
+
+ENUM
+ BFD_RELOC_ARM_THUMB_OFFSET
+ENUMDOC
+ 5-bit immediate offset, used in Thumb-format ldr and str instructions.
+
+ENUM
+ BFD_RELOC_ARM_TARGET1
+ENUMDOC
+ Pc-relative or absolute relocation depending on target. Used for
+ entries in .init_array sections.
+ENUM
+ BFD_RELOC_ARM_ROSEGREL32
+ENUMDOC
+ Read-only segment base relative address.
+ENUM
+ BFD_RELOC_ARM_SBREL32
+ENUMDOC
+ Data segment base relative address.
+ENUM
+ BFD_RELOC_ARM_TARGET2
+ENUMDOC
+ This reloc is used for references to RTTI data from exception handling
+ tables. The actual definition depends on the target. It may be a
+ pc-relative or some form of GOT-indirect relocation.
+ENUM
+ BFD_RELOC_ARM_PREL31
+ENUMDOC
+ 31-bit PC relative address.
+
+ENUM
+ BFD_RELOC_ARM_JUMP_SLOT
+ENUMX
+ BFD_RELOC_ARM_GLOB_DAT
+ENUMX
+ BFD_RELOC_ARM_GOT32
+ENUMX
+ BFD_RELOC_ARM_PLT32
+ENUMX
+ BFD_RELOC_ARM_RELATIVE
+ENUMX
+ BFD_RELOC_ARM_GOTOFF
+ENUMX
+ BFD_RELOC_ARM_GOTPC
+ENUMDOC
+ Relocations for setting up GOTs and PLTs for shared libraries.
+
+ENUM
+ BFD_RELOC_ARM_TLS_GD32
+ENUMX
+ BFD_RELOC_ARM_TLS_LDO32
+ENUMX
+ BFD_RELOC_ARM_TLS_LDM32
+ENUMX
+ BFD_RELOC_ARM_TLS_DTPOFF32
+ENUMX
+ BFD_RELOC_ARM_TLS_DTPMOD32
+ENUMX
+ BFD_RELOC_ARM_TLS_TPOFF32
+ENUMX
+ BFD_RELOC_ARM_TLS_IE32
+ENUMX
+ BFD_RELOC_ARM_TLS_LE32
+ENUMDOC
+ ARM thread-local storage relocations.
+
ENUM
BFD_RELOC_ARM_IMMEDIATE
ENUMX
BFD_RELOC_ARM_ADRL_IMMEDIATE
ENUMX
- BFD_RELOC_ARM_OFFSET_IMM
+ BFD_RELOC_ARM_T32_IMMEDIATE
+ENUMX
+ BFD_RELOC_ARM_T32_IMM12
+ENUMX
+ BFD_RELOC_ARM_T32_ADD_PC12
ENUMX
BFD_RELOC_ARM_SHIFT_IMM
+ENUMX
+ BFD_RELOC_ARM_SMI
ENUMX
BFD_RELOC_ARM_SWI
ENUMX
BFD_RELOC_ARM_IN_POOL
ENUMX
BFD_RELOC_ARM_OFFSET_IMM8
+ENUMX
+ BFD_RELOC_ARM_T32_OFFSET_U8
+ENUMX
+ BFD_RELOC_ARM_T32_OFFSET_IMM
ENUMX
BFD_RELOC_ARM_HWLITERAL
ENUMX
BFD_RELOC_ARM_THUMB_IMM
ENUMX
BFD_RELOC_ARM_THUMB_SHIFT
+ENUMDOC
+ These relocs are only used within the ARM assembler. They are not
+ (at present) written to any object files.
+
+ENUM
+ BFD_RELOC_SH_PCDISP8BY2
ENUMX
- BFD_RELOC_ARM_THUMB_OFFSET
-ENUMX
- BFD_RELOC_ARM_GOT12
-ENUMX
- BFD_RELOC_ARM_GOT32
+ BFD_RELOC_SH_PCDISP12BY2
ENUMX
- BFD_RELOC_ARM_JUMP_SLOT
+ BFD_RELOC_SH_IMM3
ENUMX
- BFD_RELOC_ARM_COPY
+ BFD_RELOC_SH_IMM3U
ENUMX
- BFD_RELOC_ARM_GLOB_DAT
+ BFD_RELOC_SH_DISP12
ENUMX
- BFD_RELOC_ARM_PLT32
+ BFD_RELOC_SH_DISP12BY2
ENUMX
- BFD_RELOC_ARM_RELATIVE
+ BFD_RELOC_SH_DISP12BY4
ENUMX
- BFD_RELOC_ARM_GOTOFF
+ BFD_RELOC_SH_DISP12BY8
ENUMX
- BFD_RELOC_ARM_GOTPC
-ENUMDOC
- These relocs are only used within the ARM assembler. They are not
- (at present) written to any object files.
-
-ENUM
- BFD_RELOC_SH_PCDISP8BY2
+ BFD_RELOC_SH_DISP20
ENUMX
- BFD_RELOC_SH_PCDISP12BY2
+ BFD_RELOC_SH_DISP20BY8
ENUMX
BFD_RELOC_SH_IMM4
ENUMX
ENUMDOC
Renesas / SuperH SH relocs. Not all of these appear in object files.
-ENUM
- BFD_RELOC_THUMB_PCREL_BRANCH9
-ENUMX
- BFD_RELOC_THUMB_PCREL_BRANCH12
-ENUMX
- BFD_RELOC_THUMB_PCREL_BRANCH23
-ENUMDOC
- Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
- be zero and is not stored in the instruction.
-
ENUM
BFD_RELOC_ARC_B22_PCREL
ENUMDOC
ENUMDOC
DLX relocs
+ENUM
+ BFD_RELOC_M32C_HI8
+ENUMDOC
+ Renesas M16C/M32C Relocations.
+
ENUM
BFD_RELOC_M32R_24
ENUMDOC
BFD_RELOC_M32R_RELATIVE
ENUMX
BFD_RELOC_M32R_GOTOFF
+ENUMX
+ BFD_RELOC_M32R_GOTOFF_HI_ULO
+ENUMX
+ BFD_RELOC_M32R_GOTOFF_HI_SLO
+ENUMX
+ BFD_RELOC_M32R_GOTOFF_LO
ENUMX
BFD_RELOC_M32R_GOTPC24
ENUMX
BFD_RELOC_V850_ALIGN
ENUMDOC
Used to maintain alignment whilst relaxing.
+ENUM
+ BFD_RELOC_V850_LO16_SPLIT_OFFSET
+ENUMDOC
+ This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
+ instructions.
ENUM
BFD_RELOC_MN10300_32_PCREL
ENUMDOC
ENUMDOC
This is a 32 bit reloc for the AVR that stores 23 bit value
into 22 bits.
+ENUM
+ BFD_RELOC_AVR_LDI
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores all needed bits
+ for absolute addressing with ldi with overflow check to linktime
+ENUM
+ BFD_RELOC_AVR_6
+ENUMDOC
+ This is a 6 bit reloc for the AVR that stores offset for ldd/std
+ instructions
+ENUM
+ BFD_RELOC_AVR_6_ADIW
+ENUMDOC
+ This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
+ instructions
ENUM
BFD_RELOC_390_12
This is a 24-bit reloc that represents the address with a 16-bit
value and a 8-bit page number. The symbol address is transformed
to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
+ENUM
+ BFD_RELOC_M68HC12_5B
+ENUMDOC
+ Motorola 68HC12 reloc.
+ This is the 5 bits of a value.
+
+ENUM
+ BFD_RELOC_16C_NUM08
+ENUMX
+ BFD_RELOC_16C_NUM08_C
+ENUMX
+ BFD_RELOC_16C_NUM16
+ENUMX
+ BFD_RELOC_16C_NUM16_C
+ENUMX
+ BFD_RELOC_16C_NUM32
+ENUMX
+ BFD_RELOC_16C_NUM32_C
+ENUMX
+ BFD_RELOC_16C_DISP04
+ENUMX
+ BFD_RELOC_16C_DISP04_C
+ENUMX
+ BFD_RELOC_16C_DISP08
+ENUMX
+ BFD_RELOC_16C_DISP08_C
+ENUMX
+ BFD_RELOC_16C_DISP16
+ENUMX
+ BFD_RELOC_16C_DISP16_C
+ENUMX
+ BFD_RELOC_16C_DISP24
+ENUMX
+ BFD_RELOC_16C_DISP24_C
+ENUMX
+ BFD_RELOC_16C_DISP24a
+ENUMX
+ BFD_RELOC_16C_DISP24a_C
+ENUMX
+ BFD_RELOC_16C_REG04
+ENUMX
+ BFD_RELOC_16C_REG04_C
+ENUMX
+ BFD_RELOC_16C_REG04a
+ENUMX
+ BFD_RELOC_16C_REG04a_C
+ENUMX
+ BFD_RELOC_16C_REG14
+ENUMX
+ BFD_RELOC_16C_REG14_C
+ENUMX
+ BFD_RELOC_16C_REG16
+ENUMX
+ BFD_RELOC_16C_REG16_C
+ENUMX
+ BFD_RELOC_16C_REG20
+ENUMX
+ BFD_RELOC_16C_REG20_C
+ENUMX
+ BFD_RELOC_16C_ABS20
+ENUMX
+ BFD_RELOC_16C_ABS20_C
+ENUMX
+ BFD_RELOC_16C_ABS24
+ENUMX
+ BFD_RELOC_16C_ABS24_C
+ENUMX
+ BFD_RELOC_16C_IMM04
+ENUMX
+ BFD_RELOC_16C_IMM04_C
+ENUMX
+ BFD_RELOC_16C_IMM16
+ENUMX
+ BFD_RELOC_16C_IMM16_C
+ENUMX
+ BFD_RELOC_16C_IMM20
+ENUMX
+ BFD_RELOC_16C_IMM20_C
+ENUMX
+ BFD_RELOC_16C_IMM24
+ENUMX
+ BFD_RELOC_16C_IMM24_C
+ENUMX
+ BFD_RELOC_16C_IMM32
+ENUMX
+ BFD_RELOC_16C_IMM32_C
+ENUMDOC
+ NS CR16C Relocations.
+
+ENUM
+ BFD_RELOC_CRX_REL4
+ENUMX
+ BFD_RELOC_CRX_REL8
+ENUMX
+ BFD_RELOC_CRX_REL8_CMP
+ENUMX
+ BFD_RELOC_CRX_REL16
+ENUMX
+ BFD_RELOC_CRX_REL24
+ENUMX
+ BFD_RELOC_CRX_REL32
+ENUMX
+ BFD_RELOC_CRX_REGREL12
+ENUMX
+ BFD_RELOC_CRX_REGREL22
+ENUMX
+ BFD_RELOC_CRX_REGREL28
+ENUMX
+ BFD_RELOC_CRX_REGREL32
+ENUMX
+ BFD_RELOC_CRX_ABS16
+ENUMX
+ BFD_RELOC_CRX_ABS32
+ENUMX
+ BFD_RELOC_CRX_NUM8
+ENUMX
+ BFD_RELOC_CRX_NUM16
+ENUMX
+ BFD_RELOC_CRX_NUM32
+ENUMX
+ BFD_RELOC_CRX_IMM16
+ENUMX
+ BFD_RELOC_CRX_IMM32
+ENUMX
+ BFD_RELOC_CRX_SWITCH8
+ENUMX
+ BFD_RELOC_CRX_SWITCH16
+ENUMX
+ BFD_RELOC_CRX_SWITCH32
+ENUMDOC
+ NS CRX Relocations.
ENUM
BFD_RELOC_CRIS_BDISP8
BFD_RELOC_CRIS_SIGNED_6
ENUMX
BFD_RELOC_CRIS_UNSIGNED_6
+ENUMX
+ BFD_RELOC_CRIS_SIGNED_8
+ENUMX
+ BFD_RELOC_CRIS_UNSIGNED_8
+ENUMX
+ BFD_RELOC_CRIS_SIGNED_16
+ENUMX
+ BFD_RELOC_CRIS_UNSIGNED_16
+ENUMX
+ BFD_RELOC_CRIS_LAPCQ_OFFSET
ENUMX
BFD_RELOC_CRIS_UNSIGNED_4
ENUMDOC
ENUMDOC
Relocations used by VAX ELF.
+ENUM
+ BFD_RELOC_MS1_PC16
+ENUMDOC
+ Morpho MS1 - 16 bit immediate relocation.
+ENUM
+ BFD_RELOC_MS1_HI16
+ENUMDOC
+ Morpho MS1 - Hi 16 bits of an address.
+ENUM
+ BFD_RELOC_MS1_LO16
+ENUMDOC
+ Morpho MS1 - Low 16 bits of an address.
+ENUM
+ BFD_RELOC_MS1_GNU_VTINHERIT
+ENUMDOC
+ Morpho MS1 - Used to tell the linker which vtable entries are used.
+ENUM
+ BFD_RELOC_MS1_GNU_VTENTRY
+ENUMDOC
+ Morpho MS1 - Used to tell the linker which vtable entries are used.
+
ENUM
BFD_RELOC_MSP430_10_PCREL
ENUMX
BFD_RELOC_MSP430_16_PCREL_BYTE
ENUMX
BFD_RELOC_MSP430_16_BYTE
+ENUMX
+ BFD_RELOC_MSP430_2X_PCREL
+ENUMX
+ BFD_RELOC_MSP430_RL_PCREL
ENUMDOC
msp430 specific relocation codes
ENUMDOC
Xtensa relocation used in ELF object files for symbols that may require
PLT entries. Otherwise, this is just a generic 32-bit relocation.
+ENUM
+ BFD_RELOC_XTENSA_DIFF8
+ENUMX
+ BFD_RELOC_XTENSA_DIFF16
+ENUMX
+ BFD_RELOC_XTENSA_DIFF32
+ENUMDOC
+ Xtensa relocations to mark the difference of two local symbols.
+ These are only needed to support linker relaxation and can be ignored
+ when not relaxing. The field is set to the value of the difference
+ assuming no relaxation. The relocation encodes the position of the
+ first symbol so the linker can determine whether to adjust the field
+ value.
+ENUM
+ BFD_RELOC_XTENSA_SLOT0_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT1_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT2_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT3_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT4_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT5_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT6_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT7_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT8_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT9_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT10_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT11_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT12_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT13_OP
+ENUMX
+ BFD_RELOC_XTENSA_SLOT14_OP
+ENUMDOC
+ Generic Xtensa relocations for instruction operands. Only the slot
+ number is encoded in the relocation. The relocation applies to the
+ last PC-relative immediate operand, or if there are no PC-relative
+ immediates, to the last immediate operand.
+ENUM
+ BFD_RELOC_XTENSA_SLOT0_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT1_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT2_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT3_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT4_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT5_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT6_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT7_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT8_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT9_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT10_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT11_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT12_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT13_ALT
+ENUMX
+ BFD_RELOC_XTENSA_SLOT14_ALT
+ENUMDOC
+ Alternate Xtensa relocations. Only the slot is encoded in the
+ relocation. The meaning of these relocations is opcode-specific.
ENUM
BFD_RELOC_XTENSA_OP0
ENUMX
ENUMX
BFD_RELOC_XTENSA_OP2
ENUMDOC
- Generic Xtensa relocations. Only the operand number is encoded
- in the relocation. The details are determined by extracting the
- instruction opcode.
+ Xtensa relocations for backward compatibility. These have all been
+ replaced by BFD_RELOC_XTENSA_SLOT0_OP.
ENUM
BFD_RELOC_XTENSA_ASM_EXPAND
ENUMDOC
internally by the linker after analysis of a
BFD_RELOC_XTENSA_ASM_EXPAND.
+ENUM
+ BFD_RELOC_Z8K_DISP7
+ENUMDOC
+ DJNZ offset.
+ENUM
+ BFD_RELOC_Z8K_CALLR
+ENUMDOC
+ CALR offset.
+ENUM
+ BFD_RELOC_Z8K_IMM4L
+ENUMDOC
+ 4 bit value.
+
ENDSENUM
BFD_RELOC_UNUSED
CODE_FRAGMENT
DESCRIPTION
Provides default handling for relaxing for back ends which
- don't do relaxing -- i.e., does nothing except make sure that the
- final size of the section is set.
+ don't do relaxing.
*/
bfd_boolean
struct bfd_link_info *link_info ATTRIBUTE_UNUSED,
bfd_boolean *again)
{
- /* We're not relaxing the section, so just copy the size info if it's
- zero. Someone else, like bfd_merge_sections, might have set it, so
- don't overwrite a non-zero value. */
- if (section->_cooked_size == 0)
- section->_cooked_size = section->_raw_size;
*again = FALSE;
return TRUE;
}
bfd_boolean
bfd_generic_gc_sections (bfd *abfd ATTRIBUTE_UNUSED,
- struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
+ struct bfd_link_info *info ATTRIBUTE_UNUSED)
{
return TRUE;
}
long reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
arelent **reloc_vector = NULL;
long reloc_count;
+ bfd_size_type sz;
if (reloc_size < 0)
goto error_return;
goto error_return;
/* Read in the section. */
- if (!bfd_get_section_contents (input_bfd,
- input_section,
- data,
- 0,
- input_section->_raw_size))
+ sz = input_section->rawsize ? input_section->rawsize : input_section->size;
+ if (!bfd_get_section_contents (input_bfd, input_section, data, 0, sz))
goto error_return;
- /* Don't set input_section->_cooked_size here. The caller has set
- _cooked_size or called bfd_relax_section, which sets _cooked_size.
- Despite using this generic relocation function, some targets perform
- target-specific relaxation or string merging, which happens before
- this function is called. We do not want to clobber the _cooked_size
- they computed. */
-
- input_section->reloc_done = TRUE;
-
reloc_count = bfd_canonicalize_reloc (input_bfd,
input_section,
reloc_vector,
break;
case bfd_reloc_overflow:
if (!((*link_info->callbacks->reloc_overflow)
- (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
+ (link_info, NULL,
+ bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
(*parent)->howto->name, (*parent)->addend,
input_bfd, input_section, (*parent)->address)))
goto error_return;
projects / deliverable / binutils-gdb.git / blobdiff