#include "elf/metag.h"
#include "elf/microblaze.h"
#include "elf/mips.h"
+#include "elf/riscv.h"
#include "elf/mmix.h"
#include "elf/mn10200.h"
#include "elf/mn10300.h"
case EM_OR1K:
case EM_PPC64:
case EM_PPC:
+ case EM_RISCV:
case EM_RL78:
case EM_RX:
case EM_S390:
rtype = elf_mips_reloc_type (type);
break;
+ case EM_RISCV:
+ rtype = elf_riscv_reloc_type (type);
+ break;
+
case EM_ALPHA:
rtype = elf_alpha_reloc_type (type);
break;
case EM_CR16:
case EM_MICROBLAZE:
case EM_MICROBLAZE_OLD: return "Xilinx MicroBlaze";
+ case EM_RISCV: return "RISC-V";
case EM_RL78: return "Renesas RL78";
case EM_RX: return "Renesas RX";
case EM_METAG: return "Imagination Technologies Meta processor architecture";
case EM_CSR_KALIMBA: return "CSR Kalimba architecture family";
case EM_Z80: return "Zilog Z80";
case EM_AMDGPU: return "AMD GPU architecture";
- case EM_RISCV: return "RISC-V";
default:
snprintf (buff, sizeof (buff), _("<unknown>: 0x%x"), e_machine);
return buff;
decode_NDS32_machine_flags (e_flags, buf, sizeof buf);
break;
+ case EM_RISCV:
+ if (e_flags & EF_RISCV_RVC)
+ strcat (buf, ", RVC");
+ if (e_flags & EF_RISCV_SOFT_FLOAT)
+ strcat (buf, ", soft-float ABI");
+ break;
+
case EM_SH:
switch ((e_flags & EF_SH_MACH_MASK))
{
return reloc_type == 1; /* R_PPC64_ADDR32. */
case EM_PPC:
return reloc_type == 1; /* R_PPC_ADDR32. */
+ case EM_RISCV:
+ return reloc_type == 1; /* R_RISCV_32. */
case EM_RL78:
return reloc_type == 1; /* R_RL78_DIR32. */
case EM_RX:
return reloc_type == 80; /* R_PARISC_DIR64. */
case EM_PPC64:
return reloc_type == 38; /* R_PPC64_ADDR64. */
+ case EM_RISCV:
+ return reloc_type == 2; /* R_RISCV_64. */
case EM_SPARC32PLUS:
case EM_SPARCV9:
case EM_SPARC:
case EM_PARISC: /* R_PARISC_NONE. */
case EM_PPC64: /* R_PPC64_NONE. */
case EM_PPC: /* R_PPC_NONE. */
+ case EM_RISCV: /* R_RISCV_NONE. */
case EM_S390: /* R_390_NONE. */
case EM_S390_OLD:
case EM_SH: /* R_SH_NONE. */