#include "elf/m32r.h"
#include "elf/m68k.h"
#include "elf/m68hc11.h"
+#include "elf/s12z.h"
#include "elf/mcore.h"
#include "elf/mep.h"
#include "elf/metag.h"
rtype = elf_m68hc11_reloc_type (type);
break;
+ case EM_S12Z:
+ rtype = elf_s12z_reloc_type (type);
+ break;
+
case EM_68K:
rtype = elf_m68k_reloc_type (type);
break;
if (e_flags & EF_RISCV_RVC)
strcat (buf, ", RVC");
+ if (e_flags & EF_RISCV_RVE)
+ strcat (buf, ", RVE");
+
switch (e_flags & EF_RISCV_FLOAT_ABI)
{
case EF_RISCV_FLOAT_ABI_SOFT:
case SHT_PREINIT_ARRAY: return "PREINIT_ARRAY";
case SHT_GNU_HASH: return "GNU_HASH";
case SHT_GROUP: return "GROUP";
- case SHT_SYMTAB_SHNDX: return "SYMTAB SECTION INDICIES";
+ case SHT_SYMTAB_SHNDX: return "SYMTAB SECTION INDICES";
case SHT_GNU_verdef: return "VERDEF";
case SHT_GNU_verneed: return "VERNEED";
case SHT_GNU_versym: return "VERSYM";
shndx = (Elf_External_Sym_Shndx *) get_data (NULL, filedata,
entry->hdr->sh_offset,
1, entry->hdr->sh_size,
- _("symbol table section indicies"));
+ _("symbol table section indices"));
if (shndx == NULL)
goto exit_point;
/* PR17531: file: heap-buffer-overflow */
shndx = (Elf_External_Sym_Shndx *) get_data (NULL, filedata,
entry->hdr->sh_offset,
1, entry->hdr->sh_size,
- _("symbol table section indicies"));
+ _("symbol table section indices"));
if (shndx == NULL)
goto exit_point;
/* PR17531: file: heap-buffer-overflow */
}
else if (do_section_details)
{
- printf (" %-15.15s ",
- get_section_type_name (filedata, section->sh_type));
+ putchar (' ');
print_vma (section->sh_addr, LONG_HEX);
if ((long) section->sh_offset == section->sh_offset)
printf (" %16.16lx", (unsigned long) section->sh_offset);
error (_("section [%5u] in group section [%5u] > maximum section [%5u]\n"),
entry, i, filedata->file_header.e_shnum - 1);
if (num_group_errors == 10)
- warn (_("Further error messages about overlarge group section indicies suppressed\n"));
+ warn (_("Further error messages about overlarge group section indices suppressed\n"));
}
continue;
}
vers_data = byte_get (data, 2);
- if ((vers_data & VERSYM_HIDDEN) == 0 && vers_data <= 1)
+ if ((vers_data & VERSYM_HIDDEN) == 0 && vers_data == 0)
return NULL;
/* Usually we'd only see verdef for defined symbols, and verneed for
ivd.vd_ndx = 0;
ivd.vd_aux = 0;
ivd.vd_next = 0;
+ ivd.vd_flags = 0;
}
else
{
ivd.vd_ndx = BYTE_GET (evd.vd_ndx);
ivd.vd_aux = BYTE_GET (evd.vd_aux);
ivd.vd_next = BYTE_GET (evd.vd_next);
+ ivd.vd_flags = BYTE_GET (evd.vd_flags);
}
off += ivd.vd_next;
if (ivd.vd_ndx == (vers_data & VERSYM_VERSION))
{
+ if (ivd.vd_ndx == 1 && ivd.vd_flags == VER_FLG_BASE)
+ return NULL;
+
off -= ivd.vd_next;
off += ivd.vd_aux;
case EM_68HC11:
case EM_68HC12:
return reloc_type == 6; /* R_M68HC11_32. */
+ case EM_S12Z:
+ return reloc_type == 6; /* R_S12Z_EXT32. */
case EM_MCORE:
return reloc_type == 1; /* R_MCORE_ADDR32. */
case EM_CYGNUS_MEP:
return reloc_type == 9; /* R_NIOS_16. */
case EM_OR1K:
return reloc_type == 2; /* R_OR1K_16. */
+ case EM_RISCV:
+ return reloc_type == 55; /* R_RISCV_SET16. */
case EM_TI_PRU:
return reloc_type == 8; /* R_PRU_BFD_RELOC_16. */
case EM_TI_C6000:
}
}
+/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
+ a 8-bit absolute RELA relocation used in DWARF debug sections. */
+
+static bfd_boolean
+is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
+{
+ switch (filedata->file_header.e_machine)
+ {
+ case EM_RISCV:
+ return reloc_type == 54; /* R_RISCV_SET8. */
+ default:
+ return FALSE;
+ }
+}
+
+/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
+ a 6-bit absolute RELA relocation used in DWARF debug sections. */
+
+static bfd_boolean
+is_6bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
+{
+ switch (filedata->file_header.e_machine)
+ {
+ case EM_RISCV:
+ return reloc_type == 53; /* R_RISCV_SET6. */
+ default:
+ return FALSE;
+ }
+}
+
/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
a 32-bit inplace add RELA relocation used in DWARF debug sections. */
}
}
+/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
+ a 6-bit inplace sub RELA relocation used in DWARF debug sections. */
+
+static bfd_boolean
+is_6bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type)
+{
+ switch (filedata->file_header.e_machine)
+ {
+ case EM_RISCV:
+ return reloc_type == 52; /* R_RISCV_SUB6. */
+ default:
+ return FALSE;
+ }
+}
+
/* Returns TRUE iff RELOC_TYPE is a NONE relocation used for discarded
relocation entries (possibly formerly used for SHT_GROUP sections). */
reloc_size = 3;
else if (is_16bit_abs_reloc (filedata, reloc_type))
reloc_size = 2;
+ else if (is_8bit_abs_reloc (filedata, reloc_type)
+ || is_6bit_abs_reloc (filedata, reloc_type))
+ reloc_size = 1;
else if ((reloc_subtract = is_32bit_inplace_sub_reloc (filedata,
reloc_type))
|| is_32bit_inplace_add_reloc (filedata, reloc_type))
reloc_size = 1;
reloc_inplace = TRUE;
}
+ else if ((reloc_subtract = is_6bit_inplace_sub_reloc (filedata,
+ reloc_type)))
+ {
+ reloc_size = 1;
+ reloc_inplace = TRUE;
+ }
else
{
static unsigned int prev_reloc = 0;
|| filedata->file_header.e_machine == EM_CYGNUS_D30V)
&& reloc_type == 12)
|| reloc_inplace)
- addend += byte_get (rloc, reloc_size);
+ {
+ if (is_6bit_inplace_sub_reloc (filedata, reloc_type))
+ addend += byte_get (rloc, reloc_size) & 0x3f;
+ else
+ addend += byte_get (rloc, reloc_size);
+ }
if (is_32bit_pcrel_reloc (filedata, reloc_type)
|| is_64bit_pcrel_reloc (filedata, reloc_type))
byte_put (rloc, (addend + sym->st_value) - rp->r_offset,
reloc_size);
}
+ else if (is_6bit_abs_reloc (filedata, reloc_type)
+ || is_6bit_inplace_sub_reloc (filedata, reloc_type))
+ {
+ if (reloc_subtract)
+ addend -= sym->st_value;
+ else
+ addend += sym->st_value;
+ addend = (addend & 0x3f) | (byte_get (rloc, reloc_size) & 0xc0);
+ byte_put (rloc, addend, reloc_size);
+ }
else if (reloc_subtract)
byte_put (rloc, addend - sym->st_value, reloc_size);
else
fputs ("\n\tXPA ASE", stdout);
if (mask & AFL_ASE_MIPS16E2)
fputs ("\n\tMIPS16e2 ASE", stdout);
+ if (mask & AFL_ASE_CRC)
+ fputs ("\n\tCRC ASE", stdout);
+ if (mask & AFL_ASE_GINV)
+ fputs ("\n\tGINV ASE", stdout);
+ if (mask & AFL_ASE_LOONGSON_MMI)
+ fputs ("\n\tLoongson MMI ASE", stdout);
if (mask == 0)
fprintf (stdout, "\n\t%s", _("None"));
else if ((mask & ~AFL_ASE_MASK) != 0)
case NT_PPC_TM_CVMX:
return _("NT_PPC_TM_CVMX (ppc checkpointed Altivec registers)");
case NT_PPC_TM_CVSX:
- return _("NT_PPC_TM_VSX (ppc checkpointed VSX registers)");
+ return _("NT_PPC_TM_CVSX (ppc checkpointed VSX registers)");
case NT_PPC_TM_SPR:
return _("NT_PPC_TM_SPR (ppc TM special purpose registers)");
case NT_PPC_TM_CTAR:
return saved_sym;
}
+/* Returns true iff addr1 and addr2 are in the same section. */
+
+static bfd_boolean
+same_section (Filedata * filedata, unsigned long addr1, unsigned long addr2)
+{
+ Elf_Internal_Shdr * a1;
+ Elf_Internal_Shdr * a2;
+
+ a1 = find_section_by_address (filedata, addr1);
+ a2 = find_section_by_address (filedata, addr2);
+
+ return a1 == a2 && a1 != NULL;
+}
+
static bfd_boolean
print_gnu_build_attribute_description (Elf_Internal_Note * pnote,
Filedata * filedata)
if (is_open_attr)
{
- /* FIXME: Need to properly allow for section alignment. 16 is just the alignment used on x86_64. */
- if (global_end > 0 && start > BFD_ALIGN (global_end, 16))
+ /* FIXME: Need to properly allow for section alignment.
+ 16 is just the alignment used on x86_64. */
+ if (global_end > 0
+ && start > BFD_ALIGN (global_end, 16)
+ /* Build notes are not guaranteed to be organised in order of
+ increasing address, but we should find the all of the notes
+ for one section in the same place. */
+ && same_section (filedata, start, global_end))
warn (_("Gap in build notes detected from %#lx to %#lx\n"),
global_end + 1, start - 1);
l += strnlen (arch.sym_table + l, arch.sym_size - l) + 1;
}
- if (arch.uses_64bit_indicies)
+ if (arch.uses_64bit_indices)
l = (l + 7) & ~ 7;
else
l += l & 1;