#include "elf/m32r.h"
#include "elf/m68k.h"
#include "elf/m68hc11.h"
+#include "elf/s12z.h"
#include "elf/mcore.h"
#include "elf/mep.h"
#include "elf/metag.h"
#include "elf/mt.h"
#include "elf/msp430.h"
#include "elf/nds32.h"
+#include "elf/nfp.h"
#include "elf/nios2.h"
#include "elf/or1k.h"
#include "elf/pj.h"
width = - width;
extra_padding = TRUE;
}
- assert (width != 0);
+ else if (width == 0)
+ return 0;
if (do_wide)
/* Set the remaining width to a very large value.
case EM_CYGNUS_M32R:
case EM_SCORE:
case EM_XGATE:
+ case EM_NFP:
return FALSE;
/* Targets that use RELA relocations. */
rtype = elf_m68hc11_reloc_type (type);
break;
+ case EM_S12Z:
+ rtype = elf_s12z_reloc_type (type);
+ break;
+
case EM_68K:
rtype = elf_m68k_reloc_type (type);
break;
case EM_TI_PRU:
rtype = elf_pru_reloc_type (type);
break;
+
+ case EM_NFP:
+ if (EF_NFP_MACH (filedata->file_header.e_flags) == E_NFP_MACH_3200)
+ rtype = elf_nfp3200_reloc_type (type);
+ else
+ rtype = elf_nfp_reloc_type (type);
+ break;
}
if (rtype == NULL)
case EM_PARISC: return "HPPA";
case EM_VPP550: return "Fujitsu VPP500";
case EM_SPARC32PLUS: return "Sparc v8+" ;
- case EM_960: return "Intel 90860";
+ case EM_960: return "Intel 80960";
case EM_PPC: return "PowerPC";
/* 20 */
case EM_PPC64: return "PowerPC64";
case EM_RISCV: return "RISC-V";
case EM_LANAI: return "Lanai 32-bit processor";
case EM_BPF: return "Linux BPF";
+ case EM_NFP: return "Netronome Flow Processor";
/* Large numbers... */
case EM_MT: return "Morpho Techologies MT processor";
case EM_CYGNUS_MEP: return "Toshiba MeP Media Engine";
case EM_ADAPTEVA_EPIPHANY: return "Adapteva EPIPHANY";
case EM_CYGNUS_FRV: return "Fujitsu FR-V";
+ case EM_S12Z: return "Freescale S12Z";
default:
snprintf (buff, sizeof (buff), _("<unknown>: 0x%x"), e_machine);
e_flags &= ~ EF_ARM_RELEXEC;
}
+ if (e_flags & EF_ARM_PIC)
+ {
+ strcat (buf, ", position independent");
+ e_flags &= ~ EF_ARM_PIC;
+ }
+
/* Now handle EABI specific flags. */
switch (eabi)
{
decode_NDS32_machine_flags (e_flags, buf, sizeof buf);
break;
+ case EM_NFP:
+ switch (EF_NFP_MACH (e_flags))
+ {
+ case E_NFP_MACH_3200:
+ strcat (buf, ", NFP-32xx");
+ break;
+ case E_NFP_MACH_6000:
+ strcat (buf, ", NFP-6xxx");
+ break;
+ }
+ break;
+
case EM_RISCV:
if (e_flags & EF_RISCV_RVC)
strcat (buf, ", RVC");
+ if (e_flags & EF_RISCV_RVE)
+ strcat (buf, ", RVE");
+
switch (e_flags & EF_RISCV_FLOAT_ABI)
{
case EF_RISCV_FLOAT_ABI_SOFT:
switch (osabi)
{
case ELFOSABI_ARM: return "ARM";
+ case ELFOSABI_ARM_FDPIC: return "ARM FDPIC";
default:
break;
}
}
}
+static const char *
+get_nfp_section_type_name (unsigned int sh_type)
+{
+ switch (sh_type)
+ {
+ case SHT_NFP_MECONFIG: return "NFP_MECONFIG";
+ case SHT_NFP_INITREG: return "NFP_INITREG";
+ case SHT_NFP_UDEBUG: return "NFP_UDEBUG";
+ default: return NULL;
+ }
+}
+
static const char *
get_v850_section_type_name (unsigned int sh_type)
{
case EM_MSP430:
result = get_msp430x_section_type_name (sh_type);
break;
+ case EM_NFP:
+ result = get_nfp_section_type_name (sh_type);
+ break;
case EM_V800:
case EM_V850:
case EM_CYGNUS_V850:
if (archive_file_offset != 0)
str_tab_len = archive_file_size - offset;
else
- str_tab_len = filedata->file_size;
+ str_tab_len = filedata->file_size - offset;
if (str_tab_len < 1)
{
vers_data = byte_get (data, 2);
- if ((vers_data & VERSYM_HIDDEN) == 0 && vers_data <= 1)
+ if ((vers_data & VERSYM_HIDDEN) == 0 && vers_data == 0)
return NULL;
/* Usually we'd only see verdef for defined symbols, and verneed for
ivd.vd_ndx = 0;
ivd.vd_aux = 0;
ivd.vd_next = 0;
+ ivd.vd_flags = 0;
}
else
{
ivd.vd_ndx = BYTE_GET (evd.vd_ndx);
ivd.vd_aux = BYTE_GET (evd.vd_aux);
ivd.vd_next = BYTE_GET (evd.vd_next);
+ ivd.vd_flags = BYTE_GET (evd.vd_flags);
}
off += ivd.vd_next;
if (ivd.vd_ndx == (vers_data & VERSYM_VERSION))
{
+ if (ivd.vd_ndx == 1 && ivd.vd_flags == VER_FLG_BASE)
+ return NULL;
+
off -= ivd.vd_next;
off += ivd.vd_aux;
case EM_68HC11:
case EM_68HC12:
return reloc_type == 6; /* R_M68HC11_32. */
+ case EM_S12Z:
+ return reloc_type == 6; /* R_S12Z_EXT32. */
case EM_MCORE:
return reloc_type == 1; /* R_MCORE_ADDR32. */
case EM_CYGNUS_MEP:
case EM_OR1K:
return reloc_type == 1; /* R_OR1K_32. */
case EM_PARISC:
- return (reloc_type == 1 /* R_PARISC_DIR32. */
+ return (reloc_type == 1 /* R_PARISC_DIR32. */
+ || reloc_type == 2 /* R_PARISC_DIR21L. */
|| reloc_type == 41); /* R_PARISC_SECREL32. */
case EM_PJ:
case EM_PJ_OLD:
return reloc_type == 9; /* R_NIOS_16. */
case EM_OR1K:
return reloc_type == 2; /* R_OR1K_16. */
+ case EM_RISCV:
+ return reloc_type == 55; /* R_RISCV_SET16. */
case EM_TI_PRU:
return reloc_type == 8; /* R_PRU_BFD_RELOC_16. */
case EM_TI_C6000:
}
}
+/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
+ a 8-bit absolute RELA relocation used in DWARF debug sections. */
+
+static bfd_boolean
+is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
+{
+ switch (filedata->file_header.e_machine)
+ {
+ case EM_RISCV:
+ return reloc_type == 54; /* R_RISCV_SET8. */
+ default:
+ return FALSE;
+ }
+}
+
+/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
+ a 6-bit absolute RELA relocation used in DWARF debug sections. */
+
+static bfd_boolean
+is_6bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
+{
+ switch (filedata->file_header.e_machine)
+ {
+ case EM_RISCV:
+ return reloc_type == 53; /* R_RISCV_SET6. */
+ default:
+ return FALSE;
+ }
+}
+
/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
a 32-bit inplace add RELA relocation used in DWARF debug sections. */
}
}
+/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
+ a 6-bit inplace sub RELA relocation used in DWARF debug sections. */
+
+static bfd_boolean
+is_6bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type)
+{
+ switch (filedata->file_header.e_machine)
+ {
+ case EM_RISCV:
+ return reloc_type == 52; /* R_RISCV_SUB6. */
+ default:
+ return FALSE;
+ }
+}
+
/* Returns TRUE iff RELOC_TYPE is a NONE relocation used for discarded
relocation entries (possibly formerly used for SHT_GROUP sections). */
reloc_size = 3;
else if (is_16bit_abs_reloc (filedata, reloc_type))
reloc_size = 2;
+ else if (is_8bit_abs_reloc (filedata, reloc_type)
+ || is_6bit_abs_reloc (filedata, reloc_type))
+ reloc_size = 1;
else if ((reloc_subtract = is_32bit_inplace_sub_reloc (filedata,
reloc_type))
|| is_32bit_inplace_add_reloc (filedata, reloc_type))
reloc_size = 1;
reloc_inplace = TRUE;
}
+ else if ((reloc_subtract = is_6bit_inplace_sub_reloc (filedata,
+ reloc_type)))
+ {
+ reloc_size = 1;
+ reloc_inplace = TRUE;
+ }
else
{
static unsigned int prev_reloc = 0;
|| filedata->file_header.e_machine == EM_CYGNUS_D30V)
&& reloc_type == 12)
|| reloc_inplace)
- addend += byte_get (rloc, reloc_size);
+ {
+ if (is_6bit_inplace_sub_reloc (filedata, reloc_type))
+ addend += byte_get (rloc, reloc_size) & 0x3f;
+ else
+ addend += byte_get (rloc, reloc_size);
+ }
if (is_32bit_pcrel_reloc (filedata, reloc_type)
|| is_64bit_pcrel_reloc (filedata, reloc_type))
byte_put (rloc, (addend + sym->st_value) - rp->r_offset,
reloc_size);
}
+ else if (is_6bit_abs_reloc (filedata, reloc_type)
+ || is_6bit_inplace_sub_reloc (filedata, reloc_type))
+ {
+ if (reloc_subtract)
+ addend -= sym->st_value;
+ else
+ addend += sym->st_value;
+ addend = (addend & 0x3f) | (byte_get (rloc, reloc_size) & 0xc0);
+ byte_put (rloc, addend, reloc_size);
+ }
else if (reloc_subtract)
byte_put (rloc, addend - sym->st_value, reloc_size);
else
fputs ("\n\tXPA ASE", stdout);
if (mask & AFL_ASE_MIPS16E2)
fputs ("\n\tMIPS16e2 ASE", stdout);
+ if (mask & AFL_ASE_CRC)
+ fputs ("\n\tCRC ASE", stdout);
+ if (mask & AFL_ASE_GINV)
+ fputs ("\n\tGINV ASE", stdout);
if (mask == 0)
fprintf (stdout, "\n\t%s", _("None"));
else if ((mask & ~AFL_ASE_MASK) != 0)
if (strtab[sym->st_name] == 0)
continue;
+ /* The AArch64 and ARM architectures define mapping symbols
+ (eg $d, $x, $t) which we want to ignore. */
+ if (strtab[sym->st_name] == '$'
+ && strtab[sym->st_name + 1] != 0
+ && strtab[sym->st_name + 2] == 0)
+ continue;
+
if (is_open_attr)
{
/* For OPEN attributes we prefer GLOBAL over LOCAL symbols
return saved_sym;
}
+/* Returns true iff addr1 and addr2 are in the same section. */
+
+static bfd_boolean
+same_section (Filedata * filedata, unsigned long addr1, unsigned long addr2)
+{
+ Elf_Internal_Shdr * a1;
+ Elf_Internal_Shdr * a2;
+
+ a1 = find_section_by_address (filedata, addr1);
+ a2 = find_section_by_address (filedata, addr2);
+
+ return a1 == a2 && a1 != NULL;
+}
+
static bfd_boolean
print_gnu_build_attribute_description (Elf_Internal_Note * pnote,
Filedata * filedata)
name = NULL;
sym = get_symbol_for_build_attribute (filedata, start, is_open_attr, & name);
+ /* As of version 5 of the annobin plugin, filename symbols are biased by 2
+ in order to avoid them being confused with the start address of the
+ first function in the file... */
+ if (sym == NULL && is_open_attr)
+ sym = get_symbol_for_build_attribute (filedata, start + 2, is_open_attr,
+ & name);
if (end == 0 && sym != NULL && sym->st_size > 0)
end = start + sym->st_size;
if (is_open_attr)
{
- /* FIXME: Need to properly allow for section alignment. 16 is just the alignment used on x86_64. */
- if (global_end > 0 && start > BFD_ALIGN (global_end, 16))
+ /* FIXME: Need to properly allow for section alignment.
+ 16 is just the alignment used on x86_64. */
+ if (global_end > 0
+ && start > BFD_ALIGN (global_end, 16)
+ /* Build notes are not guaranteed to be organised in order of
+ increasing address, but we should find the all of the notes
+ for one section in the same place. */
+ && same_section (filedata, start, global_end))
warn (_("Gap in build notes detected from %#lx to %#lx\n"),
global_end + 1, start - 1);
projects / deliverable / binutils-gdb.git / blobdiff