ubsan: m32c: left shift of negative value

[deliverable/binutils-gdb.git] / cpu / ChangeLog

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 49940034bb062ff218cd5658da92a51ec24d55d3..3e8f019e353eab91735db1884f25dbb8cce15e85 100644 (file)
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,89 @@
+2020-01-30  Alan Modra  <amodra@gmail.com>
+
+       * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
+       (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
+       (f-dst32-rn-prefixed-QI): Likewise.
+       (f-dsp-32-s32): Mask before shifting left.
+       (f-dsp-48-u32, f-dsp-48-s32): Likewise.
+       (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
+       shifting left.
+       (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
+       (h-gr-SI): Mask before shifting.
+
+2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * bpf.cpu (define-alu-insn-un): The unary BPF instructions
+       (neg and neg32) use OP_SRC_K even if they operate only in
+       registers.
+
+2020-01-18  Nick Clifton  <nickc@redhat.com>
+
+       Binutils 2.34 branch created.
+
+2020-01-13  Alan Modra  <amodra@gmail.com>
+
+       * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
+       left shift signed values.
+
+2020-01-06  Alan Modra  <amodra@gmail.com>
+
+       * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
+       bits before shifting rather than masking after shifting.
+       (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
+       (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
+       (f-dsp-64-u16, f-dsp-8-s24): Likewise.
+       (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
+
+2020-01-04  Alan Modra  <amodra@gmail.com>
+
+       * m32r.cpu (f-disp8): Avoid left shift of negative values.
+       (f-disp16, f-disp24): Likewise.
+
+2019-12-23  Alan Modra  <amodra@gmail.com>
+
+       * iq2000.cpu (f-offset): Avoid left shift of negative values.
+
+2019-12-20  Alan Modra  <amodra@gmail.com>
+
+       * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
+
+2019-12-17  Alan Modra  <amodra@gmail.com>
+
+       * bpf.cpu (f-imm64): Avoid signed overflow.
+
+2019-12-16  Alan Modra  <amodra@gmail.com>
+
+       * xstormy16.cpu (f-rel12a): Avoid signed overflow.
+
+2019-12-11  Alan Modra  <amodra@gmail.com>
+
+       * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
+       * lm32.cpu (f-branch, f-vall): Likewise.
+       * m32.cpu (f-lab-8-16): Likewise.
+
+2019-12-11  Alan Modra  <amodra@gmail.com>
+
+       * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
+       shift left to avoid UB on left shift of negative values.
+
+2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * bpf.cpu: Fix comment describing the 128-bit instruction format.
+
+2019-09-09  Phil Blundell  <pb@pbcl.net>
+
+       binutils 2.33 branch created.
+
+2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
+       %a and %ctx.
+
+2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * bpf.cpu (dlabs): New pmacro.
+       (dlind): Likewise.
+
 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 
        * bpf.cpu (dlsi): ldabs and ldind instructions do not take an