* m32c.cpu (jsri): Fix order so register names aren't treated as

[deliverable/binutils-gdb.git] / cpu / ChangeLog

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index f2d1d7d4203e085cecfa6d10ce7ffc37637d79d0..86bd136ca744dba809dc260d20628b02153a9306 100644 (file)
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,10 @@
+2005-12-13  DJ Delorie  <dj@redhat.com>
+
+       * m32c.cpu (jsri): Fix order so register names aren't treated as
+       symbols.
+       (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
+       indexwd, indexws): Fix encodings.
+
 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 
        * mt.cpu: Rename from ms1.cpu.