ubsan: m32c: left shift of negative value

[deliverable/binutils-gdb.git] / cpu / ChangeLog

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index cd40af4113209f8687cedb24476672630a832b0f..f67c869a86889cf01169f231f39606770b1b78b3 100644 (file)
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,34 @@
+2020-02-03  Alan Modra  <amodra@gmail.com>
+
+       * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
+
+2020-02-01  Alan Modra  <amodra@gmail.com>
+
+       * frv.cpu (f-u12): Multiply rather than left shift signed values.
+       (f-label16, f-label24): Likewise.
+
+2020-01-30  Alan Modra  <amodra@gmail.com>
+
+       * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
+       (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
+       (f-dst32-rn-prefixed-QI): Likewise.
+       (f-dsp-32-s32): Mask before shifting left.
+       (f-dsp-48-u32, f-dsp-48-s32): Likewise.
+       (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
+       shifting left.
+       (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
+       (h-gr-SI): Mask before shifting.
+
+2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * bpf.cpu (define-alu-insn-un): The unary BPF instructions
+       (neg and neg32) use OP_SRC_K even if they operate only in
+       registers.
+
+2020-01-18  Nick Clifton  <nickc@redhat.com>
+
+       Binutils 2.34 branch created.
+
 2020-01-13  Alan Modra  <amodra@gmail.com>
 
        * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't