Merge remote-tracking branch 'clk/clk-next'

[deliverable/linux.git] / drivers / clk / berlin / bg2q.c

diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
index f144547cf76ca94767eac93de9e8d82a0b4d7c7d..0718e831475fdace5f7bd0c06190147da1fb3870 100644 (file)
--- a/drivers/clk/berlin/bg2q.c
+++ b/drivers/clk/berlin/bg2q.c
@@ -46,8 +46,7 @@
 #define REG_SDIO1XIN_CLKCTL    0x015c
 
 #define        MAX_CLKS 28
-static struct clk *clks[MAX_CLKS];
-static struct clk_onecell_data clk_data;
+static struct clk_hw_onecell_data *clk_data;
 static DEFINE_SPINLOCK(lock);
 static void __iomem *gbase;
 static void __iomem *cpupll_base;
@@ -293,7 +292,15 @@ static void __init berlin2q_clock_setup(struct device_node *np)
        struct device_node *parent_np = of_get_parent(np);
        const char *parent_names[9];
        struct clk *clk;
-       int n;
+       struct clk_hw **hws;
+       int n, ret;
+
+       clk_data = kzalloc(sizeof(*clk_data) +
+                          sizeof(*clk_data->hws) * MAX_CLKS, GFP_KERNEL);
+       if (!clk_data)
+               return;
+       clk_data->num = MAX_CLKS;
+       hws = clk_data->hws;
 
        gbase = of_iomap(parent_np, 0);
        if (!gbase) {
@@ -317,14 +324,14 @@ static void __init berlin2q_clock_setup(struct device_node *np)
        }
 
        /* simple register PLLs */
-       clk = berlin2_pll_register(&bg2q_pll_map, gbase + REG_SYSPLLCTL0,
+       ret = berlin2_pll_register(&bg2q_pll_map, gbase + REG_SYSPLLCTL0,
                                   clk_names[SYSPLL], clk_names[REFCLK], 0);
-       if (IS_ERR(clk))
+       if (ret)
                goto bg2q_fail;
 
-       clk = berlin2_pll_register(&bg2q_pll_map, cpupll_base,
+       ret = berlin2_pll_register(&bg2q_pll_map, cpupll_base,
                                   clk_names[CPUPLL], clk_names[REFCLK], 0);
-       if (IS_ERR(clk))
+       if (ret)
                goto bg2q_fail;
 
        /* TODO: add BG2Q AVPLL */
@@ -342,7 +349,7 @@ static void __init berlin2q_clock_setup(struct device_node *np)
                for (k = 0; k < dd->num_parents; k++)
                        parent_names[k] = clk_names[dd->parent_ids[k]];
 
-               clks[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase,
+               hws[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase,
                                dd->name, dd->div_flags, parent_names,
                                dd->num_parents, dd->flags, &lock);
        }
@@ -351,22 +358,22 @@ static void __init berlin2q_clock_setup(struct device_node *np)
        for (n = 0; n < ARRAY_SIZE(bg2q_gates); n++) {
                const struct berlin2_gate_data *gd = &bg2q_gates[n];
 
-               clks[CLKID_GFX2DAXI + n] = clk_register_gate(NULL, gd->name,
+               hws[CLKID_GFX2DAXI + n] = clk_hw_register_gate(NULL, gd->name,
                            gd->parent_name, gd->flags, gbase + REG_CLKENABLE,
                            gd->bit_idx, 0, &lock);
        }
 
        /* cpuclk divider is fixed to 1 */
-       clks[CLKID_CPU] =
-               clk_register_fixed_factor(NULL, "cpu", clk_names[CPUPLL],
+       hws[CLKID_CPU] =
+               clk_hw_register_fixed_factor(NULL, "cpu", clk_names[CPUPLL],
                                          0, 1, 1);
        /* twdclk is derived from cpu/3 */
-       clks[CLKID_TWD] =
-               clk_register_fixed_factor(NULL, "twd", "cpu", 0, 1, 3);
+       hws[CLKID_TWD] =
+               clk_hw_register_fixed_factor(NULL, "twd", "cpu", 0, 1, 3);
 
        /* check for errors on leaf clocks */
        for (n = 0; n < MAX_CLKS; n++) {
-               if (!IS_ERR(clks[n]))
+               if (!IS_ERR(hws[n]))
                        continue;
 
                pr_err("%s: Unable to register leaf clock %d\n",
@@ -375,9 +382,7 @@ static void __init berlin2q_clock_setup(struct device_node *np)
        }
 
        /* register clk-provider */
-       clk_data.clks = clks;
-       clk_data.clk_num = MAX_CLKS;
-       of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+       of_clk_add_hw_provider(np, of_clk_hw_onecell_get, &clk_data);
 
        return;