Merge remote-tracking branch 'lightnvm/for-next'

[deliverable/linux.git] / drivers / clk / sunxi-ng / ccu_div.h

diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
index 653ade5769b32560f5f876f87a32999a0f972fc4..34c338832c0da6f5e9635bc08781f5f78626283b 100644 (file)
--- a/drivers/clk/sunxi-ng/ccu_div.h
+++ b/drivers/clk/sunxi-ng/ccu_div.h
@@ -19,10 +19,29 @@
 #include "ccu_common.h"
 #include "ccu_mux.h"
 
+/**
+ * struct _ccu_div - Internal divider description
+ * @shift: Bit offset of the divider in its register
+ * @width: Width of the divider field in its register
+ * @max: Maximum value allowed for that divider. This is the
+ *       arithmetic value, not the maximum value to be set in the
+ *       register.
+ * @flags: clk_divider flags to apply on this divider
+ * @table: Divider table pointer (if applicable)
+ *
+ * That structure represents a single divider, and is meant to be
+ * embedded in other structures representing the various clock
+ * classes.
+ *
+ * It is basically a wrapper around the clk_divider functions
+ * arguments.
+ */
 struct _ccu_div {
        u8                      shift;
        u8                      width;
 
+       u32                     max;
+
        u32                     flags;
 
        struct clk_div_table    *table;
@@ -36,14 +55,25 @@ struct _ccu_div {
                .table  = _table,                                       \
        }
 
-#define _SUNXI_CCU_DIV_FLAGS(_shift, _width, _flags)                   \
-       _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, NULL, _flags)
-
 #define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table)                   \
        _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, 0)
 
+#define _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, _flags) \
+       {                                                               \
+               .shift  = _shift,                                       \
+               .width  = _width,                                       \
+               .flags  = _flags,                                       \
+               .max    = _max,                                         \
+       }
+
+#define _SUNXI_CCU_DIV_FLAGS(_shift, _width, _flags)                   \
+       _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, 0, _flags)
+
+#define _SUNXI_CCU_DIV_MAX(_shift, _width, _max)                       \
+       _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, 0)
+
 #define _SUNXI_CCU_DIV(_shift, _width)                                 \
-       _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, NULL, 0)
+       _SUNXI_CCU_DIV_FLAGS(_shift, _width, 0)
 
 struct ccu_div {
        u32                     enable;
@@ -77,13 +107,16 @@ struct ccu_div {
                                      _shift, _width, _table, 0,        \
                                      _flags)
 
-#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,      \
-                                 _mshift, _mwidth, _muxshift, _muxwidth, \
-                                 _gate, _flags)                        \
+#define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name,                        \
+                                       _parents, _table,               \
+                                       _reg,                           \
+                                       _mshift, _mwidth,               \
+                                       _muxshift, _muxwidth,           \
+                                       _gate, _flags)                  \
        struct ccu_div _struct = {                                      \
                .enable = _gate,                                        \
                .div    = _SUNXI_CCU_DIV(_mshift, _mwidth),             \
-               .mux    = SUNXI_CLK_MUX(_muxshift, _muxwidth),          \
+               .mux    = _SUNXI_CCU_MUX_TABLE(_muxshift, _muxwidth, _table), \
                .common = {                                             \
                        .reg            = _reg,                         \
                        .hw.init        = CLK_HW_INIT_PARENTS(_name,    \
@@ -93,12 +126,23 @@ struct ccu_div {
                },                                                      \
        }
 
+#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,      \
+                                 _mshift, _mwidth, _muxshift, _muxwidth, \
+                                 _gate, _flags)                        \
+       SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name,                 \
+                                       _parents, NULL,                 \
+                                       _reg, _mshift, _mwidth,         \
+                                       _muxshift, _muxwidth,           \
+                                       _gate, _flags)
+
 #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg,           \
                             _mshift, _mwidth, _muxshift, _muxwidth,    \
                             _flags)                                    \
-       SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,       \
-                                 _mshift, _mwidth, _muxshift, _muxwidth, \
-                                 0, _flags)
+       SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name,                 \
+                                       _parents, NULL,                 \
+                                       _reg, _mshift, _mwidth,         \
+                                       _muxshift, _muxwidth,           \
+                                       0, _flags)
 
 
 #define SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg,           \