Merge tag 'configfs-for-linus' of git://git.infradead.org/users/hch/configfs

[deliverable/linux.git] / drivers / dma / ioat / dma.h

diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index b8f48074789f2a4907d5c0a219846e067552b9cf..a9bc1a15b0d1642fd8214d38f04c72661c00a2bd 100644 (file)
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -62,7 +62,6 @@ enum ioat_irq_mode {
  * struct ioatdma_device - internal representation of a IOAT device
  * @pdev: PCI-Express device
  * @reg_base: MMIO register space base address
- * @dma_pool: for allocating DMA descriptors
  * @completion_pool: DMA buffers for completion ops
  * @sed_hw_pool: DMA super descriptor pools
  * @dma_dev: embedded struct dma_device
@@ -76,8 +75,7 @@ enum ioat_irq_mode {
 struct ioatdma_device {
        struct pci_dev *pdev;
        void __iomem *reg_base;
-       struct pci_pool *dma_pool;
-       struct pci_pool *completion_pool;
+       struct dma_pool *completion_pool;
 #define MAX_SED_POOLS  5
        struct dma_pool *sed_hw_pool[MAX_SED_POOLS];
        struct dma_device dma_dev;
@@ -88,6 +86,16 @@ struct ioatdma_device {
        struct dca_provider *dca;
        enum ioat_irq_mode irq_mode;
        u32 cap;
+
+       /* shadow version for CB3.3 chan reset errata workaround */
+       u64 msixtba0;
+       u64 msixdata0;
+       u32 msixpba;
+};
+
+struct ioat_descs {
+       void *virt;
+       dma_addr_t hw;
 };
 
 struct ioatdma_chan {
@@ -100,7 +108,6 @@ struct ioatdma_chan {
        #define IOAT_COMPLETION_ACK 1
        #define IOAT_RESET_PENDING 2
        #define IOAT_KOBJ_INIT_FAIL 3
-       #define IOAT_RESHAPE_PENDING 4
        #define IOAT_RUN 5
        #define IOAT_CHAN_ACTIVE 6
        struct timer_list timer;
@@ -133,6 +140,8 @@ struct ioatdma_chan {
        u16 produce;
        struct ioat_ring_ent **ring;
        spinlock_t prep_lock;
+       struct ioat_descs descs[2];
+       int desc_chunks;
 };
 
 struct ioat_sysfs_entry {
@@ -302,10 +311,8 @@ static inline bool is_ioat_bug(unsigned long err)
 }
 
 #define IOAT_MAX_ORDER 16
-#define ioat_get_alloc_order() \
-       (min(ioat_ring_alloc_order, IOAT_MAX_ORDER))
-#define ioat_get_max_alloc_order() \
-       (min(ioat_ring_max_alloc_order, IOAT_MAX_ORDER))
+#define IOAT_MAX_DESCS 65536
+#define IOAT_DESCS_PER_2M 32768
 
 static inline u32 ioat_ring_size(struct ioatdma_chan *ioat_chan)
 {