dmaengine: shdma: Add more register documentation

[deliverable/linux.git] / drivers / dma / sh / shdmac.c

diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c
index dda7e7563f5dce28fd85b9617f0fc6bb16821382..1a6f6595c6c163f66c44e972211cd41696440001 100644 (file)
--- a/drivers/dma/sh/shdmac.c
+++ b/drivers/dma/sh/shdmac.c
@@ -18,31 +18,32 @@
  *
  */
 
+#include <linux/delay.h>
+#include <linux/dmaengine.h>
+#include <linux/err.h>
 #include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/kdebug.h>
 #include <linux/module.h>
+#include <linux/notifier.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/dmaengine.h>
-#include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
+#include <linux/rculist.h>
 #include <linux/sh_dma.h>
-#include <linux/notifier.h>
-#include <linux/kdebug.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
-#include <linux/rculist.h>
 
 #include "../dmaengine.h"
 #include "shdma.h"
 
-/* DMA register */
-#define SAR    0x00
-#define DAR    0x04
-#define TCR    0x08
-#define CHCR   0x0C
-#define DMAOR  0x40
+/* DMA registers */
+#define SAR    0x00    /* Source Address Register */
+#define DAR    0x04    /* Destination Address Register */
+#define TCR    0x08    /* Transfer Count Register */
+#define CHCR   0x0C    /* Channel Control Register */
+#define DMAOR  0x40    /* DMA Operation Register */
 
 #define TEND   0x18 /* USB-DMAC */