drm/i915: Add csr programming registers to dmc debugfs entry

[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_reg.h

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 083991271060bd70081a91bb1828e3926aa1ce06..2183a6e1f1343b93102f8b9df129dee33e0e231e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5698,6 +5698,16 @@ enum skl_disp_power_wells {
 #define GAMMA_MODE_MODE_SPLIT  (3 << 0)
 
 /* DMC/CSR */
+#define CSR_PROGRAM(i)         (0x80000 + (i) * 4)
+#define CSR_SSP_BASE_ADDR_GEN9 0x00002FC0
+#define CSR_HTP_ADDR_SKL       0x00500034
+#define CSR_SSP_BASE           0x8F074
+#define CSR_HTP_SKL            0x8F004
+#define CSR_LAST_WRITE         0x8F034
+#define CSR_LAST_WRITE_VALUE   0xc003b400
+/* MMIO address range for CSR program (0x80000 - 0x82FFF) */
+#define CSR_MMIO_START_RANGE   0x80000
+#define CSR_MMIO_END_RANGE     0x8FFFF
 #define SKL_CSR_DC3_DC5_COUNT  0x80030
 #define SKL_CSR_DC5_DC6_COUNT  0x8002C
 #define BXT_CSR_DC3_DC5_COUNT  0x80038